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14 条记录 (耗时 0.021 秒)

    APPARATUS AND METHOD FOR REDUCING PITCH IN AN INTEGRATED CIRCUIT
    3.
    发明申请
    APPARATUS AND METHOD FOR REDUCING PITCH IN AN INTEGRATED CIRCUIT 有权
    用于减少集成电路中的电位的装置和方法

    公开(公告)号：US20100133705A1

    公开(公告)日：2010-06-03

    申请号：US12326231

    申请日：2008-12-02

    申请人： Raymond Albert Fillion ,  Kevin M. Durocher ,  Richard Joseph Saia ,  Paul Alan McConnelee

    发明人： Raymond Albert Fillion ,  Kevin M. Durocher ,  Richard Joseph Saia ,  Paul Alan McConnelee

    IPC分类号： H01L23/488 ,  H01L21/60

    CPC分类号： H01L23/53295 ,  H01L21/76804 ,  H01L21/76816 ,  H01L2924/0002 ,  H01L2924/00

    摘要： An apparatus and method, the apparatus includes an electronic chip package including an electronic chip having a first and a second contact pad formed thereon, a first dielectric layer coupled to the electronic chip, a second dielectric layer coupled to the first dielectric layer such that a dielectric boundary lies therebetween, a first and a second cover pad positioned along the dielectric boundary, a metal interconnect formed along a first multi-layer via and coupled to the first cover pad and contact pad, and a metal interconnect formed along a second multi-layer via and coupled to the second cover pad and contact pad. The first multi-layer via extends through the second dielectric layer, the first cover pad, and the first dielectric layer to the first contact pad. The second multi-layer via extends through the second dielectric layer, the second cover pad, and the first dielectric layer to the second contact pad.

    摘要翻译： 一种装置和方法，该装置包括电子芯片封装，其包括电子芯片，该电子芯片具有形成在其上的第一和第二接触焊盘，耦合到电子芯片的第一介电层，耦合到第一介电层的第二介电层， 电介质边界位于其间，沿着电介质边界定位的第一和第二覆盖垫，沿着第一多层通孔形成并耦合到第一覆盖焊盘和接触焊盘的金属互连以及沿着第二多层通孔形成的金属互连， 并且耦合到第二盖板和接触垫。 第一多层通孔延伸穿过第二介电层，第一覆盖层和第一介电层到第一接触焊盘。 第二多层通孔延伸穿过第二介电层，第二覆盖层和第一介电层延伸到第二接触焊盘。

    Electronic chip package with reduced contact pad pitch
    4.
    发明授权
    Electronic chip package with reduced contact pad pitch 有权
    具有降低接触垫间距的电子芯片封装

    公开(公告)号：US07964974B2

    公开(公告)日：2011-06-21

    申请号：US12326231

    申请日：2008-12-02

    申请人： Raymond Albert Fillion ,  Kevin M. Durocher ,  Richard Joseph Saia ,  Paul Alan McConnelee

    发明人： Raymond Albert Fillion ,  Kevin M. Durocher ,  Richard Joseph Saia ,  Paul Alan McConnelee

    IPC分类号： H01L23/48 ,  H01L23/52 ,  H01L29/40

    CPC分类号： H01L23/53295 ,  H01L21/76804 ,  H01L21/76816 ,  H01L2924/0002 ,  H01L2924/00

    摘要： An apparatus and method, the apparatus includes an electronic chip package including an electronic chip having a first and a second contact pad formed thereon, a first dielectric layer coupled to the electronic chip, a second dielectric layer coupled to the first dielectric layer such that a dielectric boundary lies therebetween, a first and a second cover pad positioned along the dielectric boundary, a metal interconnect formed along a first multi-layer via and coupled to the first cover pad and contact pad, and a metal interconnect formed along a second multi-layer via and coupled to the second cover pad and contact pad. The first multi-layer via extends through the second dielectric layer, the first cover pad, and the first dielectric layer to the first contact pad. The second multi-layer via extends through the second dielectric layer, the second cover pad, and the first dielectric layer to the second contact pad.

    摘要翻译： 一种装置和方法，该装置包括电子芯片封装，其包括电子芯片，该电子芯片具有形成在其上的第一和第二接触焊盘，耦合到电子芯片的第一介电层，耦合到第一介电层的第二介电层， 电介质边界位于其间，沿着电介质边界定位的第一和第二覆盖垫，沿着第一多层通孔形成并耦合到第一覆盖焊盘和接触焊盘的金属互连以及沿着第二多层通孔形成的金属互连， 并且耦合到第二盖板和接触垫。 第一多层通孔延伸穿过第二介电层，第一覆盖层和第一介电层到第一接触焊盘。 第二多层通孔延伸穿过第二介电层，第二覆盖层和第一介电层延伸到第二接触焊盘。

    Techniques for fabricating a resistor on a flexible base material
    8.
    发明授权
    Techniques for fabricating a resistor on a flexible base material 有权
    在柔性基材上制造电阻器的技术

    公开(公告)号：US06709944B1

    公开(公告)日：2004-03-23

    申请号：US10261052

    申请日：2002-09-30

    申请人： Kevin M. Durocher ,  Richard J. Saia ,  Vikram B. Krishnamurthy

    发明人： Kevin M. Durocher ,  Richard J. Saia ,  Vikram B. Krishnamurthy

    IPC分类号： H01L2702

    CPC分类号： H01C17/12 ,  B29C59/14 ,  H01C7/006 ,  H05K1/0346 ,  H05K1/167 ,  H05K3/381 ,  H05K3/388 ,  H05K2201/0154 ,  H05K2201/0317 ,  H05K2203/095 ,  H05K2203/1136

    摘要： A technique for fabricating a resistor on a flexible substrate. Specifically, at least a portion of a polyimide substrate is activated by exposure to a ion sputter etch techniques. A metal layer is disposed over the activated portion of the substrate, thereby resulting in the formation of a highly resistive metal-carbide region. Interconnect layers are disposed over the metal-carbide region and patterned to form terminals at opposite ends of the metal carbide region. The metal-carbide region is patterned to form a resistor between the terminals. Alternatively, only a selected area of the polyimide substrate is activated. The selected area forms the area in which the metal-carbide region is formed. Interconnect layers are disposed over the metal-carbide region and patterned to form terminals at opposite ends of the metal-carbide region.

    摘要翻译： 一种在柔性基板上制造电阻器的技术。 具体地，通过暴露于离子溅射蚀刻技术来活化聚酰亚胺基底的至少一部分。 金属层设置在基板的激活部分上，从而形成高电阻金属碳化物区域。 互连层设置在金属碳化物区域上并被图案化以在金属碳化物区域的相对端形成端子。 将金属碳化物区域图案化以在端子之间形成电阻器。 或者，仅激活聚酰亚胺基板的选定区域。 所选区域形成形成金属碳化物区域的区域。 互连层设置在金属碳化物区域上并被图案化以在金属碳化物区域的相对端形成端子。