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1.发明申请Methods for manufacturing a chip arrangement, methods for manufacturing a chip package, a chip package and chip arrangements 有权用于制造芯片布置的方法，用于制造芯片封装的方法，芯片封装和芯片布置公开(公告)号：US20140070376A1
公开(公告)日：2014-03-13
申请号：US13609306
申请日：2012-09-11
申请人： Reinhard Hess , Katharina Umminger , Gabriel Maier , Markus Menath , Gunther Mackh , Hannes Eder , Alexander Heinrich
发明人： Reinhard Hess , Katharina Umminger , Gabriel Maier , Markus Menath , Gunther Mackh , Hannes Eder , Alexander Heinrich
IPC分类号： H01L21/768 , H01L29/02
CPC分类号： H01L23/3171 , H01L21/02107 , H01L21/30655 , H01L21/568 , H01L21/6835 , H01L21/76898 , H01L21/78 , H01L23/3185 , H01L23/485 , H01L24/05 , H01L2224/0236 , H01L2224/02372 , H01L2224/02375 , H01L2224/02381 , H01L2224/0239 , H01L2224/024 , H01L2224/05548 , H01L2224/0556 , H01L2224/0557 , H01L2224/05611 , H01L2224/05618 , H01L2224/05624 , H01L2224/05639 , H01L2224/05644 , H01L2224/05647 , H01L2224/05655 , H01L2224/0566 , H01L2224/05664 , H01L2924/00014 , H01L2924/00012 , H01L2924/01029 , H01L2924/01013 , H01L2924/01047 , H01L2924/0105 , H01L2924/01079 , H01L2924/01046 , H01L2924/0103 , H01L2924/01028 , H01L2924/01026 , H01L2224/05552
摘要： A method for manufacturing a chip arrangement is provided, the method including: forming a hole in a carrier including at least one chip, wherein forming a hole in the carrier includes: selectively removing carrier material, thereby forming a cavity in the carrier, forming passivation material over one or more cavity walls exposed by the selective removal of the carrier material; selectively removing a portion of the passivation material and further carrier material exposed by the selective removal of the passivation material, wherein a further portion of the passivation material remains over at least one cavity side wall; the method further including subsequently forming a layer over the further portion of passivation material remaining over the at least one cavity side wall.
摘要翻译： 提供了一种制造芯片布置的方法，该方法包括：在载体中形成一个孔，该载体包括至少一个芯片，其中在载体中形成孔包括：选择性地去除载体材料，从而在载体中形成空腔，形成钝化 通过选择性去除载体材料暴露的一个或多个腔壁上的材料; 选择性地去除钝化材料的一部分和通过选择性去除钝化材料暴露的另外的载体材料，其中钝化材料的另一部分保留在至少一个空腔侧壁上; 该方法还包括随后在保留在至少一个空腔侧壁上的钝化材料的另一部分上形成层。
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2.发明授权Methods for manufacturing a chip arrangement, methods for manufacturing a chip package, a chip package and chip arrangements 有权用于制造芯片布置的方法，用于制造芯片封装的方法，芯片封装和芯片布置公开(公告)号：US08951915B2
公开(公告)日：2015-02-10
申请号：US13609306
申请日：2012-09-11
申请人： Reinhard Hess , Katharina Umminger , Gabriel Maier , Markus Menath , Gunther Mackh , Hannes Eder , Alexander Heinrich
发明人： Reinhard Hess , Katharina Umminger , Gabriel Maier , Markus Menath , Gunther Mackh , Hannes Eder , Alexander Heinrich
IPC分类号： H01L21/44
CPC分类号： H01L23/3171 , H01L21/02107 , H01L21/30655 , H01L21/568 , H01L21/6835 , H01L21/76898 , H01L21/78 , H01L23/3185 , H01L23/485 , H01L24/05 , H01L2224/0236 , H01L2224/02372 , H01L2224/02375 , H01L2224/02381 , H01L2224/0239 , H01L2224/024 , H01L2224/05548 , H01L2224/0556 , H01L2224/0557 , H01L2224/05611 , H01L2224/05618 , H01L2224/05624 , H01L2224/05639 , H01L2224/05644 , H01L2224/05647 , H01L2224/05655 , H01L2224/0566 , H01L2224/05664 , H01L2924/00014 , H01L2924/00012 , H01L2924/01029 , H01L2924/01013 , H01L2924/01047 , H01L2924/0105 , H01L2924/01079 , H01L2924/01046 , H01L2924/0103 , H01L2924/01028 , H01L2924/01026 , H01L2224/05552
摘要： A method for manufacturing a chip arrangement is provided, the method including: forming a hole in a carrier including at least one chip, wherein forming a hole in the carrier includes: selectively removing carrier material, thereby forming a cavity in the carrier, forming passivation material over one or more cavity walls exposed by the selective removal of the carrier material; selectively removing a portion of the passivation material and further carrier material exposed by the selective removal of the passivation material, wherein a further portion of the passivation material remains over at least one cavity side wall; the method further including subsequently forming a layer over the further portion of passivation material remaining over the at least one cavity side wall.
摘要翻译： 提供了一种制造芯片布置的方法，该方法包括：在载体中形成一个孔，该载体包括至少一个芯片，其中在载体中形成孔包括：选择性地去除载体材料，从而在载体中形成空腔，形成钝化 通过选择性去除载体材料暴露的一个或多个腔壁上的材料; 选择性地去除钝化材料的一部分和通过选择性去除钝化材料暴露的另外的载体材料，其中钝化材料的另一部分保留在至少一个空腔侧壁上; 该方法还包括随后在保留在至少一个空腔侧壁上的钝化材料的另一部分上形成层。
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公开(公告)号：US08697574B2
公开(公告)日：2014-04-15
申请号：US12567551
申请日：2009-09-25
申请人： Gunther Mackh , Uwe Seidel , Rainer Leuschner
发明人： Gunther Mackh , Uwe Seidel , Rainer Leuschner
IPC分类号： H01L21/44
CPC分类号： H01L28/10 , H01L21/76898 , H01L23/481 , H01L23/5227 , H01L23/645 , H01L25/0657 , H01L2225/06513 , H01L2225/06527 , H01L2225/06541 , H01L2924/0002 , H01L2924/00
摘要： Through substrate features in semiconductor substrates are described. In one embodiment, the semiconductor device includes a through substrate via disposed in a first region of a semiconductor substrate. A through substrate conductor coil is disposed in a second region of the semiconductor substrate.
摘要翻译： 描述了半导体衬底中的衬底特征。 在一个实施例中，半导体器件包括设置在半导体衬底的第一区域中的贯穿衬底通孔。 贯穿基板导体线圈设置在半导体基板的第二区域中。
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公开(公告)号：US08436707B2
公开(公告)日：2013-05-07
申请号：US12686164
申请日：2010-01-12
申请人： Carsten Ahrens , Gunther Mackh , Klemens Pruegl
发明人： Carsten Ahrens , Gunther Mackh , Klemens Pruegl
IPC分类号： H01F27/02
CPC分类号： H01F27/2804 , H01F5/00 , H01F17/0006 , H01F17/04 , H01F27/255 , H01F41/046 , H01F2017/048 , H01L23/5227 , H01L27/08 , H01L28/10 , H01L2224/45147 , H01L2224/48091 , H01L2224/48247 , H01L2224/48471 , H01L2924/00011 , H01L2924/01047 , H01L2924/30107 , H05K3/10 , Y10T29/49075 , Y10T29/49155 , H01L2924/00014 , H01L2924/00 , H01L2924/01005
摘要： In one embodiment, an inductor has a substrate, a conductor disposed above the substrate and a seamless ferromagnetic material surrounding at least a first portion of the conductor.
摘要翻译： 在一个实施例中，电感器具有衬底，布置在衬底上方的导体和围绕导体的至少第一部分的无缝铁磁材料。
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公开(公告)号：US20130075869A1
公开(公告)日：2013-03-28
申请号：US13247162
申请日：2011-09-28
申请人： Gunther Mackh , Gerhard Leschik , Adolf Koller , Harald Seidl
发明人： Gunther Mackh , Gerhard Leschik , Adolf Koller , Harald Seidl
IPC分类号： H01L23/544 , G06F17/50 , H01L21/78
CPC分类号： H01L21/78 , G06F17/5068 , H01L21/82 , H01L23/585 , H01L2924/0002 , H01L2924/00
摘要： A chip includes a dielectric layer and a fill structure in the dielectric layer, wherein the fill structure extends along a dicing edge of the chip, with the fill structure abutting the dicing edge.
摘要翻译： 芯片包括电介质层中的电介质层和填充结构，其中填充结构沿芯片的切割边缘延伸，填充结构邻接切割边缘。
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公开(公告)号：US06884688B2
公开(公告)日：2005-04-26
申请号：US10263097
申请日：2002-10-02
申请人： Kai Esmark , Harald Gossner , Gunther Mackh , Richard Owen , Franz Zängl
发明人： Kai Esmark , Harald Gossner , Gunther Mackh , Richard Owen , Franz Zängl
IPC分类号： H01L21/8238 , H01L27/02 , H01L29/08 , H01L29/78 , H01L21/336
CPC分类号： H01L29/0847 , H01L21/823814 , H01L27/0266 , H01L29/7833 , H01L29/7836
摘要： A MOS transistor includes a drain zone, a source zone, and a gate electrode. Doping atoms of the first conductivity type are implanted in the region of the drain zone and the source zone by at least two further implantation steps such that a pn junction between the drain zone and a substrate region is vertically shifted and a voltage ratio of the MOS transistor between a lateral breakdown voltage and a vertical breakdown voltage can be set.
摘要翻译： MOS晶体管包括漏极区，源极区和栅电极。 第一导电类型的掺杂原子通过至少两个另外的注入步骤注入到漏区和源区的区域中，使得漏区和衬底区之间的pn结垂直移位，MOS的电压比 可以设置横向击穿电压和垂直击穿电压之间的晶体管。
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公开(公告)号：US08822329B2
公开(公告)日：2014-09-02
申请号：US12567950
申请日：2009-09-28
申请人： Rainer Leuschner , Gunther Mackh , Uwe Seidel
发明人： Rainer Leuschner , Gunther Mackh , Uwe Seidel
IPC分类号： H01L23/535 , H01L21/768 , H01L23/522
CPC分类号： H01L21/76898 , H01L21/76807 , H01L21/7681 , H01L21/76816 , H01L21/76831 , H01L21/76843 , H01L21/76846 , H01L21/76847 , H01L21/76877 , H01L23/5226 , H01L2924/0002 , H01L2924/00
摘要： One or more embodiments relate to a method for making a semiconductor structure, the method including: forming a first conductive interconnect at least partially through the substrate; and forming a second conductive interconnect over the substrate, wherein the first conductive interconnect and the second conductive interconnect are formed at least partially simultaneously.
摘要翻译： 一个或多个实施例涉及一种用于制造半导体结构的方法，所述方法包括：至少部分地通过所述衬底形成第一导电互连; 以及在所述衬底上形成第二导电互连，其中所述第一导电互连和所述第二导电互连至少部分地同时形成。
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公开(公告)号：US20140057412A1
公开(公告)日：2014-02-27
申请号：US13594946
申请日：2012-08-27
申请人： Gunther Mackh , Gerhard Leschik
发明人： Gunther Mackh , Gerhard Leschik
IPC分类号： H01L21/268 , H01L21/78
CPC分类号： H01L23/5258 , B23K26/40 , B23K2103/50 , H01L21/268 , H01L23/544 , H01L2223/5444 , H01L2924/0002 , H01L2924/00
摘要： A method for fusing a laser fuse in accordance with various embodiments may include: providing a semiconductor workpiece having a substrate region and at least one laser fuse; fusing the at least one laser fuse from a back side of the substrate region by means of an infrared laser beam.
摘要翻译： 根据各种实施例的用于熔合激光熔丝的方法可以包括：提供具有衬底区域和至少一个激光熔丝的半导体工件; 通过红外激光束将至少一个激光熔丝从衬底区域的背面熔合。
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公开(公告)号：US20110169596A1
公开(公告)日：2011-07-14
申请号：US12686164
申请日：2010-01-12
申请人： Carsten Ahrens , Gunther Mackh , Klemens Pruegl
发明人： Carsten Ahrens , Gunther Mackh , Klemens Pruegl
IPC分类号： H01F5/00 , H01L21/3205 , H05K3/00 , H01B13/00
CPC分类号： H01F27/2804 , H01F5/00 , H01F17/0006 , H01F17/04 , H01F27/255 , H01F41/046 , H01F2017/048 , H01L23/5227 , H01L27/08 , H01L28/10 , H01L2224/45147 , H01L2224/48091 , H01L2224/48247 , H01L2224/48471 , H01L2924/00011 , H01L2924/01047 , H01L2924/30107 , H05K3/10 , Y10T29/49075 , Y10T29/49155 , H01L2924/00014 , H01L2924/00 , H01L2924/01005
摘要： In one embodiment, an inductor has a substrate, a conductor disposed above the substrate and a seemless ferromagnetic material surrounding at least a first portion of the conductor.
摘要翻译： 在一个实施例中，电感器具有衬底，布置在衬底上方的导体和围绕导体的至少第一部分的无磁铁磁材料。
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公开(公告)号：US08809165B2
公开(公告)日：2014-08-19
申请号：US13594946
申请日：2012-08-27
申请人： Gunther Mackh , Gerhard Leschik
发明人： Gunther Mackh , Gerhard Leschik
IPC分类号： H01L21/00
CPC分类号： H01L23/5258 , B23K26/40 , B23K2103/50 , H01L21/268 , H01L23/544 , H01L2223/5444 , H01L2924/0002 , H01L2924/00
摘要： A method for fusing a laser fuse in accordance with various embodiments may include: providing a semiconductor workpiece having a substrate region and at least one laser fuse; fusing the at least one laser fuse from a back side of the substrate region by means of an infrared laser beam.
摘要翻译： 根据各种实施例的用于熔合激光熔丝的方法可以包括：提供具有衬底区域和至少一个激光熔丝的半导体工件; 通过红外激光束将至少一个激光熔丝从衬底区域的背面熔合。
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