公开(公告)号：US5664989A

公开(公告)日：1997-09-09

申请号：US683265

申请日：1996-07-18

申请人： Rempei Nakata ,  Hisashi Kaneko ,  Nobuo Hayasaka ,  Takeshi Nishioka ,  Yoshikuni Tateyama ,  Yutaka Nakano ,  Yasutaka Sasaki

发明人： Rempei Nakata ,  Hisashi Kaneko ,  Nobuo Hayasaka ,  Takeshi Nishioka ,  Yoshikuni Tateyama ,  Yutaka Nakano ,  Yasutaka Sasaki

IPC分类号： B24B37/20 ,  B24B37/22 ,  B24B37/24 ,  B24D13/14 ,  C08J5/14 ,  H01L21/304 ,  B24B1/00

CPC分类号： B24B37/22

摘要： A polishing pad comprises at least a first layer having a first main surface serving to polish a substrate to be polished and a second main surface, and a second layer positioned to face the second main surface of the first layer and having fine bags arranged therein, fluid being hermetically sealed in the fine bag.

摘要翻译： 抛光垫至少包括具有用于抛光待抛光基板的第一主表面和第二主表面的第一层，以及设置成面对第一层的第二主表面并且具有布置在其中的细小袋的第二层， 流体密封在细袋中。

公开(公告)号：US5770095A

公开(公告)日：1998-06-23

申请号：US500753

申请日：1995-07-11

申请人： Yasutaka Sasaki ,  Nobuo Hayasaka ,  Hisashi Kaneko ,  Hideaki Hirabayashi ,  Masatoshi Higuchi

发明人： Yasutaka Sasaki ,  Nobuo Hayasaka ,  Hisashi Kaneko ,  Hideaki Hirabayashi ,  Masatoshi Higuchi

IPC分类号： C09K13/06 ,  C23F1/18 ,  C23F3/00 ,  H01L21/304 ,  H01L21/3205 ,  H01L21/321 ,  H01L21/768 ,  H01L21/00 ,  B44C1/22 ,  C23F1/00

CPC分类号： C23F3/00 ,  H01L21/3212 ,  H01L21/7684

摘要： The present invention provides a polishing method including the steps of forming a film made of material containing a metal as a main component over a substrate having depressed portions on a surface thereof so as to fill the depressed portions with the film, and polishing the film by a chemical mechanical polishing method using a polishing agent containing a chemical agent responsible for forming a protection film on a surface of the film by reacting with the material containing a metal as a main component, thereby forming a conductive film in the depressed portions. The present invention also provides a polishing agent, which is used in forming a film made of material containing a metal as a main component in depressed portions of a substrate having depressed portions on a surface thereof by using a chemical mechanical polishing method, including a chemical agent responsible for forming a protection film on the surface of a substrate to be polished by reacting with the material containing a metal as a main component.

摘要翻译： 本发明提供了一种抛光方法，包括以下步骤：在其表面上具有凹陷部分的基底上形成由含有金属作为主要成分的材料制成的膜，以便用该膜填充凹陷部分，并且通过 使用包含负责通过与包含金属作为主要成分的材料在膜的表面上形成保护膜的化学试剂的抛光剂的化学机械抛光方法，从而在凹陷部分中形成导电膜。 本发明还提供了一种抛光剂，其用于通过使用化学机械抛光方法在其表面上形成具有凹陷部的基板的凹部中的以金属为主要成分的材料制成的膜，所述化学机械抛光方法包括化学 负责通过与含有金属作为主要成分的材料反应而在要抛光的基材的表面上形成保护膜的试剂。

公开(公告)号：US06436849B1

公开(公告)日：2002-08-20

申请号：US09963385

申请日：2001-09-27

申请人： Masahiko Hasunuma ,  Hideshi Miyajima ,  Hisashi Kaneko ,  Rempei Nakata

发明人： Masahiko Hasunuma ,  Hideshi Miyajima ,  Hisashi Kaneko ,  Rempei Nakata

IPC分类号： H01L2131

CPC分类号： H01L21/67253 ,  H01L21/67017 ,  H01L21/76828

摘要： A method for manufacturing a semiconductor device, comprising controlling a humidity in an atmosphere around a low dielectric constant insulating film at 30% or less, during a processing period and a transfer period between processing equipments, in which at least a part of said low dielectric constant insulating film is exposed to the atmosphere.

摘要翻译： 一种制造半导体器件的方法，包括在处理期间和处理设备之间的转移期间，在低介电常数绝缘膜周围的气氛中控制30％以下的湿度，其中至少部分所述低电介质 恒定绝缘膜暴露在大气中。

公开(公告)号：US07242206B2

公开(公告)日：2007-07-10

申请号：US11179538

申请日：2005-07-13

申请人： Kiyoshi Takekoshi ,  Hisatomi Hosaka ,  Junichi Hagihara ,  Kunihiko Hatsushika ,  Takamasa Usui ,  Hisashi Kaneko ,  Nobuo Hayasaka ,  Yoshiyuki Ido

发明人： Kiyoshi Takekoshi ,  Hisatomi Hosaka ,  Junichi Hagihara ,  Kunihiko Hatsushika ,  Takamasa Usui ,  Hisashi Kaneko ,  Nobuo Hayasaka ,  Yoshiyuki Ido

IPC分类号： G01R31/06 ,  G01R31/04 ,  G01R27/26

CPC分类号： G01R31/2862 ,  G01R1/0433 ,  G01R1/0491 ,  G01R31/2831 ,  G01R31/286 ,  G01R31/2865 ,  G01R31/2867 ,  G01R31/287 ,  G01R31/2886

摘要： A reliability evaluation test apparatus of this invention includes a wafer storage section which stores a wafer in a state wherein the electrode pads of a number of devices formed on the wafer and the bumps of a contactor are totally in electrical contact with each other. The wafer storage section transmits/receives a test signal to/from a measurement section and has a hermetic and heat insulating structure. The wafer storage section has a pressure mechanism which presses the contactor and a heating mechanism which directly heats the wafer totally in contact with the contactor to a predetermined high temperature. The reliability of an interconnection film and insulating film formed on the semiconductor wafer are evaluated under an accelerated condition.

摘要翻译： 本发明的可靠性评价试验装置包括晶片存储部，其以形成在晶片上的多个器件的电极焊盘和接触器的凸块完全电接触的状态存储晶片。 晶片存储部分向/从测量部分发送/接收测试信号，并具有密封和隔热结构。 晶片存储部分具有压力接触器的压力机构和将与接触器完全接触的晶片直接加热到预定高温的加热机构。 在加速条件下评估形成在半导体晶片上的互连膜和绝缘膜的可靠性。

公开(公告)号：US06306756B1

公开(公告)日：2001-10-23

申请号：US09580922

申请日：2000-05-26

申请人： Masahiko Hasunuma ,  Sachiyo Ito ,  Keizo Shimamura ,  Hisashi Kaneko ,  Nobuo Hayasaka ,  Junsei Tsutsumi ,  Akihiro Kajita ,  Junichi Wada ,  Haruo Okano

发明人： Masahiko Hasunuma ,  Sachiyo Ito ,  Keizo Shimamura ,  Hisashi Kaneko ,  Nobuo Hayasaka ,  Junsei Tsutsumi ,  Akihiro Kajita ,  Junichi Wada ,  Haruo Okano

IPC分类号： H01L214763

CPC分类号： H01L21/76882

摘要： A method for the production of a semiconductor device having an electrode line formed in a semiconducting substrate is disclosed which comprises preparing a semiconducting substrate having trenches and/or contact holes formed preparatorily in a region destined to form the electrode line, forming a conductive film formed mainly of at least one member selected from among Cu, Ag, and Au on the surface of the semiconducting substrate, heat-treating the superposed Cu film while supplying at least an oxidizing gas thereto thereby flowing the Cu film and causing never melting to fill the trenches and/or contact holes, and removing by polishing the part of the conductive film which falls outside the region of the electrode line and completing the electrode lines consequently. During the heat treatment, a reducing gas is supplied in addition to the oxidizing gas to induce a local oxidation-reduction reaction and fluidify and/or flow the conductive film and consequently accomplish the embodiment of the conductive film in the trenches. The formation of the interconnection is also accomplished by forming a conductive film on the surface of a semiconducting substrate having trenches formed therein, exerting thereon uniaxial stress from above the semiconducting substrate, heat treating the formed conductive film thereby flowing the conductive film, to fill the trenches, and polishing the surface of the semiconducting substrate.

摘要翻译： 公开了一种制造半导体器件的方法，该半导体器件具有形成在半导体衬底中的电极线，其包括制备半导体衬底，该半导体衬底具有在预定形成电极线的区域中预先形成的沟槽和/或接触孔，形成导电膜 主要是在半导体基板的表面上选自Cu，Ag和Au中的至少一个元件，在至少供给氧化气体的同时对叠加的Cu膜进行热处理，从而使Cu膜流动，从而不会熔化以填充 沟槽和/或接触孔，并且通过抛光导电膜的掉落在电极线的区域外部并且完成电极线的部分去除。 在热处理期间，除了氧化气体之外还提供还原气体以引起局部氧化还原反应，并使导电膜流通和/或流动，从而完成沟槽中导电膜的实施例。 互连的形成还可以通过在其上形成有沟槽的半导体衬底的表面上形成导电膜，在半导体衬底上方施加单轴应力，热处理形成的导电膜从而使导电膜流动，从而填充 沟槽，并抛光半导体衬底的表面。

公开(公告)号：US6090701A

公开(公告)日：2000-07-18

申请号：US521088

申请日：1995-06-20

申请人： Masahiko Hasunuma ,  Sachiyo Ito ,  Keizo Shimamura ,  Hisashi Kaneko ,  Nobuo Hayasaka ,  Junsei Tsutsumi ,  Akihiro Kajita ,  Junichi Wada ,  Haruo Okano

发明人： Masahiko Hasunuma ,  Sachiyo Ito ,  Keizo Shimamura ,  Hisashi Kaneko ,  Nobuo Hayasaka ,  Junsei Tsutsumi ,  Akihiro Kajita ,  Junichi Wada ,  Haruo Okano

IPC分类号： H01L21/768 ,  H01L21/4763

CPC分类号： H01L21/76882

摘要： A method for the production of a semiconductor device having an electrode line formed in a semiconducting substrate is disclosed which comprises preparing a semiconducting substrate having trenches and/or contact holes formed preparatorily in a region destined to form the electrode line, forming a conductive film formed mainly of at least one member selected from among Cu, Ag, and Au on the surface of the semiconducting substrate, heat-treating the superposed Cu film while supplying at least an oxidizing gas thereto thereby flowing the Cu film to fill the trenches and/or contact holes, and removing by polishing the part of the conductive film which falls outside the region of the electrode line and completing the electrode lines consequently. During the heat treatment, a reducing gas is supplied in addition to the oxidizing gas to induce a local oxidation-reduction reaction and fluidify and/or flow the conductive film and consequently accomplish the embodiment of the conductive film in the trenches.

摘要翻译： 公开了一种制造半导体器件的方法，该半导体器件具有形成在半导体衬底中的电极线，其包括制备半导体衬底，该半导体衬底具有在预定形成电极线的区域中预先形成的沟槽和/或接触孔，形成导电膜 主要是在半导体基板的表面上选自Cu，Ag和Au中的至少一个元件，在至少供给氧化气体的同时对叠加的Cu膜进行热处理，从而使Cu膜流过以填充沟槽和/或 接触孔，并且通过抛光导电膜的掉在电极线的区域外部并且完成电极线的部分去除。 在热处理期间，除了氧化气体之外还提供还原气体以引起局部氧化还原反应，并使导电膜流通和/或流动，从而完成沟槽中导电膜的实施例。

公开(公告)号：US6071810A

公开(公告)日：2000-06-06

申请号：US997328

申请日：1997-12-23

申请人： Junichi Wada ,  Atsuko Sakata ,  Tomio Katata ,  Takamasa Usui ,  Masahiko Hasunuma ,  Hideki Shibata ,  Hisashi Kaneko ,  Nobuo Hayasaka ,  Katsuya Okumura

发明人： Junichi Wada ,  Atsuko Sakata ,  Tomio Katata ,  Takamasa Usui ,  Masahiko Hasunuma ,  Hideki Shibata ,  Hisashi Kaneko ,  Nobuo Hayasaka ,  Katsuya Okumura

IPC分类号： H01L21/285 ,  H01L21/768 ,  H01L21/44

CPC分类号： H01L21/76867 ,  H01L21/2855 ,  H01L21/76802 ,  H01L21/76805 ,  H01L21/76843 ,  H01L21/76844 ,  H01L21/76846 ,  H01L21/76847 ,  H01L21/76849 ,  H01L21/76855 ,  H01L21/76856 ,  H01L21/76859 ,  H01L21/76864 ,  H01L21/76877 ,  H01L21/76879 ,  H01L21/76886 ,  H01L21/76889

摘要： A method of manufacturing semiconductor device which comprises the steps of forming an insulating film on an Si substrate provided with a wiring layer, forming a contact hole connected to the wiring layer and a wiring groove in the insulating film, filling the contact hole with an Si film, successively forming an Al film and a Ti film all over the substrate, performing a heat treatment thereby to substitute the Al film for the Ti film, and to allow the Si film to be absorbed by the Ti film, whereby filling the contact hole and wiring groove with the Al film, and removing a Ti/Ti silicide which is consisting of Ti silicide formed through the absorption of the Si film by the Ti film and a superfluous Ti, whereby filling the contact hole with an Al plug and filling the wiring groove with an Al wiring.

摘要翻译： 一种制造半导体器件的方法，包括以下步骤：在具有布线层的Si衬底上形成绝缘膜，形成与布线层连接的接触孔和绝缘膜中的布线槽，用Si 膜，依次在基板上形成Al膜和Ti膜，进行热处理，从而将Al膜替代为Ti膜，并使Si膜被Ti膜吸收，由此填充接触孔 和Al膜的布线槽，除去由Ti膜和多余Ti吸收Si膜形成的由Ti硅化物构成的Ti / Ti硅化物，由此用Al塞填充接触孔，并填充 布线槽与Al接线。

公开(公告)号：US20080251385A1

公开(公告)日：2008-10-16

申请号：US12116562

申请日：2008-05-07

申请人： Junji Kunisawa ,  Mitsuko Odagaki ,  Natsuki Makino ,  Koji Mishima ,  Kenji Nakamura ,  Hiroaki Inoue ,  Norio Kimura ,  Tetsuo Matsuda ,  Hisashi Kaneko ,  Nobuo Hayasaka ,  Katsuya Okumura ,  Manabu Tsujimura ,  Toshiyuki Morita

发明人： Junji Kunisawa ,  Mitsuko Odagaki ,  Natsuki Makino ,  Koji Mishima ,  Kenji Nakamura ,  Hiroaki Inoue ,  Norio Kimura ,  Tetsuo Matsuda ,  Hisashi Kaneko ,  Nobuo Hayasaka ,  Katsuya Okumura ,  Manabu Tsujimura ,  Toshiyuki Morita

IPC分类号： C25D21/12

CPC分类号： H01L21/6719 ,  C25D7/123 ,  C25D17/001 ,  C25D17/12 ,  C25D17/14 ,  H01L21/2885 ,  H01L21/67046 ,  H01L21/67051 ,  H01L21/6708 ,  H01L21/6715 ,  H01L21/6723 ,  H01L21/76877 ,  H01L21/76879 ,  H01L2924/0002 ,  H05K3/423 ,  H01L2924/00

摘要： A plating method and apparatus for a substrate fills a metal, e.g., copper, into a fine interconnection pattern formed in a semiconductor substrate. The apparatus has a substrate holding portion 36 horizontally holding and rotating a substrate with its surface to be plated facing upward. A seal material 90 contacts a peripheral edge portion of the surface, sealing the portion in a watertight manner. A cathode electrode 88 passes an electric current upon contact with the substrate. A cathode portion 38 rotates integrally with the substrate holding portion 36. An electrode arm portion 30 is above the cathode portion 38 and movable horizontally and vertically and has an anode 98 face-down. Plating liquid is poured into a space between the surface to be plated and the anode 98 brought close to the surface to be plated. Thus, plating treatment and treatments incidental thereto can be performed by a single unit.

摘要翻译： 用于衬底的电镀方法和装置将诸如铜的金属填充到形成在半导体衬底中的精细互连图案中。 该装置具有基板保持部分36，其水平地保持并旋转基板，其表面被面向上。 密封材料90接触表面的周缘部分，以水密的方式密封该部分。 阴极电极88在与基板接触时通过电流。 阴极部38与基板保持部36一体旋转。 电极臂部分30在阴极部分38的上方并且可水平和垂直地移动，并且阳极98面向下。 将电镀液注入被镀表面与接近待镀表面的阳极98之间的空间中。 因此，电镀处理和附带的处理可以通过单个单元进行。

公开(公告)号：US20080018355A1

公开(公告)日：2008-01-24

申请号：US11769432

申请日：2007-06-27

申请人： Kiyoshi TAKEKOSHI ,  Hisatomi Hosaka ,  Junichi Hagihara ,  Kunihiko Hatsushika ,  Takamasa Usui ,  Hisashi Kaneko ,  Nobuo Hayasaka ,  Yoshiyuki Ido

发明人： Kiyoshi TAKEKOSHI ,  Hisatomi Hosaka ,  Junichi Hagihara ,  Kunihiko Hatsushika ,  Takamasa Usui ,  Hisashi Kaneko ,  Nobuo Hayasaka ,  Yoshiyuki Ido

IPC分类号： G01R31/26

CPC分类号： G01R31/2862 ,  G01R1/0433 ,  G01R1/0491 ,  G01R31/2831 ,  G01R31/286 ,  G01R31/2865 ,  G01R31/2867 ,  G01R31/287 ,  G01R31/2886

摘要： A reliability evaluation test apparatus of this invention includes a wafer storage section which stores a wafer in a state wherein the electrode pads of a number of devices formed on the wafer and the bumps of a contactor are totally in electrical contact with each other. The wafer storage section transmits/receives a test signal to/from a measurement section and has a hermetic and heat insulating structure. The wafer storage section has a pressure mechanism which presses the contactor and a heating mechanism which directly heats the wafer totally in contact with the contactor to a predetermined high temperature. The reliability of an interconnection film and insulating film formed on the semiconductor wafer are evaluated under an accelerated condition.

摘要翻译： 本发明的可靠性评价试验装置包括晶片存储部，其以形成在晶片上的多个器件的电极焊盘和接触器的凸块完全电接触的状态存储晶片。 晶片存储部分向/从测量部分发送/接收测试信号，并具有密封和隔热结构。 晶片存储部分具有压力接触器的压力机构和将与接触器完全接触的晶片直接加热到预定高温的加热机构。 在加速条件下评估形成在半导体晶片上的互连膜和绝缘膜的可靠性。

公开(公告)号：US06673704B2

公开(公告)日：2004-01-06

申请号：US10189598

申请日：2002-07-08

申请人： Junichi Wada ,  Atsuko Sakata ,  Tomio Katata ,  Takamasa Usui ,  Masahiko Hasunuma ,  Hideki Shibata ,  Hisashi Kaneko ,  Nobuo Hayasaka ,  Katsuya Okumura

发明人： Junichi Wada ,  Atsuko Sakata ,  Tomio Katata ,  Takamasa Usui ,  Masahiko Hasunuma ,  Hideki Shibata ,  Hisashi Kaneko ,  Nobuo Hayasaka ,  Katsuya Okumura

IPC分类号： H01L2140

CPC分类号： H01L21/76867 ,  H01L21/2855 ,  H01L21/76802 ,  H01L21/76805 ,  H01L21/76843 ,  H01L21/76844 ,  H01L21/76846 ,  H01L21/76847 ,  H01L21/76849 ,  H01L21/76855 ,  H01L21/76856 ,  H01L21/76859 ,  H01L21/76864 ,  H01L21/76877 ,  H01L21/76879 ,  H01L21/76886 ,  H01L21/76889

摘要： A method of manufacturing semiconductor device which comprises the steps of forming an insulating film on an Si substrate provided with a wiring layer, forming a contact hole connected to the wiring layer and a wiring groove in the insulating film, filling the contact hole with an Si film, successively forming an Al film and a Ti film all over the substrate, performing a heat treatment thereby to substitute the Al film for the Ti film, and to allow the Si film to be absorbed by the Ti film, whereby filling the contact hole and wiring groove with the Al film, and removing a Ti/Ti silicide which is consisting of Ti silicide formed through the absorption of the Si film by the Ti film and a superfluous Ti, whereby filling the contact hole with an Al plug and filling the wiring groove with an Al wiring.

摘要翻译： 一种制造半导体器件的方法，包括以下步骤：在具有布线层的Si衬底上形成绝缘膜，形成与布线层连接的接触孔和绝缘膜中的布线槽，用Si 膜，依次在基板上形成Al膜和Ti膜，进行热处理，从而将Al膜替代为Ti膜，并使Si膜被Ti膜吸收，由此填充接触孔 和Al膜的布线槽，除去由Ti膜和多余Ti吸收Si膜形成的由Ti硅化物构成的Ti / Ti硅化物，由此用Al塞填充接触孔，并填充 布线槽与Al接线。