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公开(公告)号:US20040262720A1
公开(公告)日:2004-12-30
申请号:US10823734
申请日:2004-04-14
Applicant: Renesas Technology Corp.
Inventor: Yukihiro Satou , Toshiyuki Hata
IPC: H01L021/48 , H01L023/52
CPC classification number: H01L24/49 , H01L23/3107 , H01L23/3142 , H01L23/4952 , H01L23/49524 , H01L23/49562 , H01L24/06 , H01L24/37 , H01L24/40 , H01L24/45 , H01L24/48 , H01L24/97 , H01L29/7827 , H01L2224/02166 , H01L2224/04034 , H01L2224/04042 , H01L2224/05124 , H01L2224/05155 , H01L2224/05553 , H01L2224/05624 , H01L2224/05639 , H01L2224/05644 , H01L2224/0603 , H01L2224/37124 , H01L2224/40091 , H01L2224/40245 , H01L2224/40247 , H01L2224/45014 , H01L2224/45015 , H01L2224/45124 , H01L2224/48091 , H01L2224/48247 , H01L2224/4846 , H01L2224/48472 , H01L2224/48724 , H01L2224/48739 , H01L2224/48744 , H01L2224/4903 , H01L2224/49051 , H01L2224/49111 , H01L2224/4912 , H01L2224/49171 , H01L2224/49175 , H01L2224/49431 , H01L2224/73221 , H01L2224/8385 , H01L2224/85 , H01L2224/97 , H01L2924/00014 , H01L2924/00015 , H01L2924/01004 , H01L2924/01005 , H01L2924/01006 , H01L2924/01013 , H01L2924/01014 , H01L2924/01015 , H01L2924/01022 , H01L2924/01023 , H01L2924/01028 , H01L2924/01029 , H01L2924/01033 , H01L2924/01047 , H01L2924/01074 , H01L2924/01078 , H01L2924/01079 , H01L2924/01082 , H01L2924/014 , H01L2924/10161 , H01L2924/12042 , H01L2924/1305 , H01L2924/13055 , H01L2924/1306 , H01L2924/13091 , H01L2924/181 , H01L2924/1811 , H01L2924/2075 , H01L2924/20752 , H01L2924/20753 , H01L2924/20754 , H01L2924/20755 , H01L2924/20756 , H01L2924/20757 , H01L2924/20758 , H01L2924/20759 , H01L2924/2076 , H01L2924/00 , H01L2924/00012
Abstract: The present invention provides a semiconductor device having a power transistor of low ON resistance. The semiconductor device includes a metal-made header, a semiconductor chip which is fixed to the header and constitutes a MOSFET, and a sealing body made of insulating resin which covers the semiconductor chip, the header and the like. The semiconductor device further includes a drain lead which is contiguously formed with the header and projects from one side surface of the sealing body, and a source lead and a gate lead which project in parallel from one side surface of the sealing body, and wires which are positioned in the inside of the sealing body and connect electrodes on an upper surface of the semiconductor chip and source lead and the gate lead. In such a semiconductor device, a gate electrode pad is arranged at a position close to lead posts of the gate lead and the source lead and a source electrode pad is arranged at a position far from the lead posts of the gate lead and the source lead.
Abstract translation: 本发明提供一种具有低导通电阻的功率晶体管的半导体器件。 半导体器件包括金属制的集管,固定到集管并构成MOSFET的半导体芯片,以及由半导体芯片,集管等构成的绝缘树脂制成的密封体。 所述半导体装置还包括与所述集管连接地形成并从所述密封体的一个侧面突出的漏极引线,以及从所述密封体的一个侧面平行突出的源极引线和栅极引线, 位于密封体的内部并且连接半导体芯片的上表面上的电极和源极引线和栅极引线。 在这样的半导体装置中,栅极电极焊盘配置在靠近栅极引线和源极引线的引线柱的位置处,并且源极电极焊盘配置在远离栅极引线和源极引线的位置 。