公开(公告)号：US20250167153A1

公开(公告)日：2025-05-22

申请号：US18932984

申请日：2024-10-31

Applicant: Samsung Electronics Co., Ltd.

Inventor： Okseon Yoon ,  Jinyoung Kim ,  Jiyoung Yoon ,  Kiseok Kim ,  Jihye Shim

IPC: H01L23/00 ,  G03F7/028

Abstract: A method of forming a redistribution pad, the method including forming a hole exposing a redistribution pattern in a redistribution insulating layer and forming a photoresist composition on a surface of the redistribution insulating layer and filling the hole. The photoresist composition including at least one first photoinitiator and at least one first crosslinking agent that cause a crosslinking reaction by a first light and at least one second photoinitiator and at least one second crosslinking agent that cause a crosslinking reaction by a second light having a different wavelength from the first light. The method further includes irradiating the first light to the photoresist composition, forming a photoresist pattern having a pattern hole using the photoresist composition to which the first light is irradiated, irradiating the second light to the photoresist pattern, and forming the redistribution pad using the photoresist pattern to which the second light is irradiated.

公开(公告)号：US20230154885A1

公开(公告)日：2023-05-18

申请号：US18049428

申请日：2022-10-25

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jinyoung Kim ,  Jiyeong Kim ,  Okseon Yoon

IPC: H01L23/00 ,  H01L25/18 ,  H01L25/00 ,  H01L21/56 ,  H01L23/29

CPC classification number: H01L24/73 ,  H01L21/563 ,  H01L23/295 ,  H01L24/16 ,  H01L24/29 ,  H01L24/32 ,  H01L25/18 ,  H01L25/50 ,  H01L24/05 ,  H01L24/13 ,  H01L2224/0567 ,  H01L2224/0568 ,  H01L2224/1317 ,  H01L2224/1318 ,  H01L2224/2929 ,  H01L2224/05609 ,  H01L2224/05611 ,  H01L2224/05613 ,  H01L2224/05616 ,  H01L2224/05617 ,  H01L2224/05618 ,  H01L2224/05624 ,  H01L2224/05638 ,  H01L2224/05639 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/05649 ,  H01L2224/05655 ,  H01L2224/05657 ,  H01L2224/05663 ,  H01L2224/05664 ,  H01L2224/05666 ,  H01L2224/05669 ,  H01L2224/05673 ,  H01L2224/05676 ,  H01L2224/05681 ,  H01L2224/05683 ,  H01L2224/05684 ,  H01L2224/05686 ,  H01L2224/13109 ,  H01L2224/13111 ,  H01L2224/13113 ,  H01L2224/13116 ,  H01L2224/13117 ,  H01L2224/13118 ,  H01L2224/13124 ,  H01L2224/13138 ,  H01L2224/13139 ,  H01L2224/13144 ,  H01L2224/13149 ,  H01L2224/13155 ,  H01L2224/13157 ,  H01L2224/13163 ,  H01L2224/13164 ,  H01L2224/13166 ,  H01L2224/13169 ,  H01L2224/13173 ,  H01L2224/13176 ,  H01L2224/13181 ,  H01L2224/13183 ,  H01L2224/13184 ,  H01L2224/13186 ,  H01L2224/16146 ,  H01L2224/29386 ,  H01L2224/32145 ,  H01L2224/73204

Abstract: A semiconductor package includes a first semiconductor chip on a lower structure. A first underfill is between the first semiconductor chip and the lower structure. The first underfill includes a first portion adjacent to a center region of the first semiconductor chip, and a second portion adjacent to an edge region of the first semiconductor chip. The second portion has a higher degree of cure than the first portion. A plurality of inner connection terminals is between the first semiconductor chip and the lower structure. The plurality of inner connection terminals extends in the first underfill.

公开(公告)号：US20230411267A1

公开(公告)日：2023-12-21

申请号：US18128069

申请日：2023-03-29

Applicant: Samsung Electronics Co., Ltd.

Inventor： Jiyeong Kim ,  Jinyoung Kim ,  Jihye Shim ,  Okseon Yoon

IPC: H01L23/498 ,  H01L25/10 ,  H01L23/00

CPC classification number: H01L23/49838 ,  H01L23/49894 ,  H01L25/105 ,  H01L23/49816 ,  H01L24/08 ,  H01L24/16 ,  H01L2225/1041 ,  H01L2225/1058 ,  H01L2224/08235 ,  H01L2224/16235 ,  H01L2924/182

Abstract: A semiconductor package includes a redistribution structure including a wiring structure and an insulating structure covering the wiring structure, the redistribution structure having a first surface and a second surface, which are opposite to each other, the insulating structure including a polymer, a semiconductor chip on the first surface, the semiconductor chip being connected to at least one first wiring pattern in the wiring structure, a passivation insulating film covering the second surface, the passivation insulating film including an inner surface contacting the insulating structure and a hole sidewall defining a hole, the passivation insulating film including an inorganic insulating material, a conductive pad passing through the passivation insulating film via the hole and contacting the second wiring pattern, the conductive pad having a pad sidewall contacting the hole sidewall, and an external connection terminal on the conductive pad.

公开(公告)号：US20230154841A1

公开(公告)日：2023-05-18

申请号：US17823634

申请日：2022-08-31

Applicant: Samsung Electronics Co., Ltd.

Inventor： Okseon Yoon ,  Jiyeong Kim ,  Jinyoung Kim

IPC: H01L23/498 ,  H01L25/18

CPC classification number: H01L23/49838 ,  H01L23/49822 ,  H01L25/18 ,  H01L24/16 ,  H01L2224/16145 ,  H01L2224/16227

Abstract: A semiconductor package includes: a redistribution structure including a plurality of redistribution insulation layers, which are stacked, a plurality of redistribution line patterns on an upper surface and a lower surface of the plurality of redistribution insulation layers, and constituting a plurality of distribution layers at different vertical levels from each other, and a plurality of redistribution vias that penetrate at least one redistribution insulation layer of the plurality of redistribution insulation layers and are connected to some of the plurality of redistribution line patterns; and at least one semiconductor chip on the redistribution structure and electrically connected to the plurality of redistribution line patterns and the plurality of redistribution vias.