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公开(公告)号：US20190370429A1
公开(公告)日：2019-12-05
申请号：US16266143
申请日：2019-02-04
发明人： Dong Chan SUH , Mann-Ho CHO , Woo Bin SONG , Kwang Sik JEONG
IPC分类号： G06F17/50 , H01L21/265 , H01L21/66
摘要： A method for manufacturing a semiconductor device with an improved doping profile is provided. The method includes providing a measuring target including a first region having a plurality of layers, inputting a first input signal into the measuring target and measuring a resulting first output signal, such as a change over time of a first output electric field that is transmitted through or reflected by the first region. Based on a first model including first structural information of a plurality of first modeling layers and information on doping concentrations of each of the plurality of first modeling layers, calculating a second output signal. When a result of comparing the first output signal with the second output signal is smaller than a threshold value, a three-dimensional model of the measuring target may be estimated based on the first model. Such non-destructive measurements may be used to determine manufacturing process parameters corresponding to ideal doping profiles and used to manufacture semiconductor devices implementing such manufacturing process parameters.
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公开(公告)号：US20170222006A1
公开(公告)日：2017-08-03
申请号：US15298746
申请日：2016-10-20
发明人： Dong Chan SUH , Yong Suk TAK , Gi Gwan PARK , Mi Seon PARK , Moon Seung YANG , Seung Hun LEE , Poren TANG
IPC分类号： H01L29/423 , H01L29/78 , H01L23/528
CPC分类号： H01L29/42376 , H01L23/5283 , H01L29/0673 , H01L29/0847 , H01L29/42364 , H01L29/66439 , H01L29/7831
摘要： A semiconductor device includes at least a first wire pattern, a gate electrode, a semiconductor pattern, a gate insulating layer, and a first spacer. The first wire pattern is on a substrate and isolated from the substrate. The gate electrode surrounds and intersects the first wire pattern. The semiconductor pattern is on both sides of the first wire pattern, and the semiconductor pattern includes a portion which overlaps the first wire pattern. The gate insulating layer is disposed between the gate electrode and the first wire pattern, and the gate insulating layer surrounds the first wire pattern. The first spacer is between the first wire pattern and the substrate, and the first spacer is between the gate insulating layer and the semiconductor pattern
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公开(公告)号：US20230317860A1
公开(公告)日：2023-10-05
申请号：US18207274
申请日：2023-06-08
发明人： Seung Hun LEE , Dong Woo KIM , Dong Chan SUH , Sun Jung KIM
IPC分类号： H01L29/786 , H01L29/06 , H01L29/423 , H01L21/02 , H01L21/8238 , H01L29/66 , H01L29/775 , B82Y10/00 , H01L29/08 , H01L27/092
CPC分类号： H01L29/78696 , H01L29/0673 , H01L29/42392 , H01L21/02603 , H01L21/02532 , H01L21/823807 , H01L29/66545 , H01L29/775 , B82Y10/00 , H01L29/42364 , H01L29/66439 , H01L29/0653 , H01L29/0847 , H01L27/092 , H01L29/66742 , H01L29/78684 , H01L29/78651 , Y10S977/762 , H01L29/068 , Y10S977/938 , Y10S977/765
摘要： A semiconductor device includes a drain, a source, a gate electrode, and a nanowire between the source and drain. The nanowire has a first section with a first thickness and a second section with a second thickness greater than the first thickness. The second section is between the first section and at least one of the source or drain. The first nanowire includes a channel when a voltage is applied to the gate electrode.
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公开(公告)号：US20190067490A1
公开(公告)日：2019-02-28
申请号：US15900175
申请日：2018-02-20
发明人： Jung Gil Yang , Woo Seok PARK , Dong Chan SUH , Seung Min SONG , Geum Jong BAE , Dong II BAE
IPC分类号： H01L29/786 , H01L29/423 , H01L29/08 , H01L29/161 , H01L29/10
摘要： A semiconductor device includes a substrate, a plurality of channel layers stacked on the substrate, a gate electrode surrounding the plurality of channel layers, and embedded source/drain layers on opposing sides of the gate electrode. The embedded source/drain layers each have a first region and a second region on the first region. The second region has a plurality of layers having different compositions.
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公开(公告)号：US20190058051A1
公开(公告)日：2019-02-21
申请号：US15896277
申请日：2018-02-14
发明人： Jin Bum KIM , Tae Jin PARK , Jong Min LEE , Seok Hoon KIM , Dong Chan SUH , Jeong Ho YOO , Ha Kyu SEONG , Dong Suk SHIN
摘要： A semiconductor device and a method of manufacturing a semiconductor device, the semiconductor device including a channel pattern on a substrate, the channel pattern extending in a first direction; a gate pattern on the substrate, the gate pattern extending in a second direction crossing the first direction and surrounding the channel pattern; and an interface layer between the channel pattern and the gate pattern, the interface layer being formed on at least one surface of an upper surface and a lower surface of the channel pattern.
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公开(公告)号：US20200185539A1
公开(公告)日：2020-06-11
申请号：US16793162
申请日：2020-02-18
发明人： Seung Hun LEE , Dong Woo KIM , Dong Chan SUH , Sun Jung KIM
IPC分类号： H01L29/786 , H01L27/092 , H01L29/06 , H01L29/423 , H01L21/02 , H01L21/8238 , H01L29/66 , H01L29/775 , B82Y10/00 , H01L29/08
摘要： A semiconductor device includes a drain, a source, a gate electrode, and a nanowire between the source and drain. The nanowire has a first section with a first thickness and a second section with a second thickness greater than the first thickness. The second section is between the first section and at least one of the source or drain. The first nanowire includes a channel when a voltage is applied to the gate electrode.
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公开(公告)号：US20190081160A1
公开(公告)日：2019-03-14
申请号：US15956166
申请日：2018-04-18
发明人： Dong Chan SUH , Sangmoon LEE , Yihwan KIM , Woo Bin SONG , Dongsuk SHIN , Seung Ryul LEE
摘要： A method for manufacturing a semiconductor device and a semiconductor device, the method including forming an active pattern on a substrate such that the active pattern includes sacrificial patterns and semiconductor patterns alternately and repeatedly stacked on the substrate; and forming first spacer patterns at both sides of each of the sacrificial patterns by performing an oxidation process, wherein the first spacer patterns correspond to oxidized portions of each of the sacrificial patterns, wherein the sacrificial patterns include a first semiconductor material containing impurities, wherein the semiconductor patterns include a second semiconductor material different from the first semiconductor material, and wherein the impurities include an element different from semiconductor elements of the first semiconductor material and the second semiconductor material.
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公开(公告)号：US20170352759A1
公开(公告)日：2017-12-07
申请号：US15685459
申请日：2017-08-24
发明人： Nam Kyu KIM , Dong Chan SUH , Kwan Heum LEE , Byeong Chan LEE , Cho Eun LEE , Su Jin JUNG , Gyeom KIM , Ji Eon YOON
IPC分类号： H01L29/78 , H01L29/165 , H01L29/417 , H01L29/08
CPC分类号： H01L29/7848 , H01L29/0847 , H01L29/165 , H01L29/41766 , H01L29/7834
摘要： A semiconductor device may include: a semiconductor substrate, a device isolating layer embedded within the semiconductor substrate and defining an active region, a channel region formed in the active region, a gate electrode disposed above the channel region, a gate insulating layer provided between the channel region and the gate electrode, and a silicon germanium epitaxial layer adjacent to the channel region within the active region and including a first epitaxial layer containing a first concentration of germanium, a second epitaxial layer containing a second concentration of germanium, higher than the first concentration, and a third epitaxial layer containing a third concentration of germanium, lower than the second concentration, the first to third epitaxial layers being sequentially stacked on one another in that order.
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公开(公告)号：US20220310852A1
公开(公告)日：2022-09-29
申请号：US17840737
申请日：2022-06-15
发明人： Jung Gil Yang , Woo Seok PARK , Dong Chan SUH , Seung Min SONG , Geum Jong BAE , Dong Il BAE
IPC分类号： H01L29/786 , H01L29/423 , H01L29/10 , H01L29/161 , H01L29/08 , H01L29/66 , H01L29/775 , B82Y10/00 , H01L29/06
摘要： A semiconductor device includes a substrate, a plurality of channel layers stacked on the substrate, a gate electrode surrounding the plurality of channel layers, and embedded source/drain layers on opposing sides of the gate electrode. The embedded source/drain layers each have a first region and a second region on the first region. The second region has a plurality of layers having different compositions.
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公开(公告)号：US20210234050A1
公开(公告)日：2021-07-29
申请号：US17231120
申请日：2021-04-15
发明人： Seung Hun LEE , Dong Woo KIM , Dong Chan SUH , Sun Jung KIM
IPC分类号： H01L29/786 , H01L29/06 , H01L29/423 , H01L21/02 , H01L21/8238 , H01L29/66 , H01L29/775 , B82Y10/00 , H01L29/08 , H01L27/092
摘要： A semiconductor device includes a drain, a source, a gate electrode, and a nanowire between the source and drain. The nanowire has a first section with a first thickness and a second section with a second thickness greater than the first thickness. The second section is between the first section and at least one of the source or drain. The first nanowire includes a channel when a voltage is applied to the gate electrode.
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