Semiconductor device including doped spontaneously formed superlattice
layer
    1.
    发明授权
    Semiconductor device including doped spontaneously formed superlattice layer 失效
    半导体器件包括掺杂自发形成的超晶格层

    公开(公告)号:US5818073A

    公开(公告)日:1998-10-06

    申请号:US536942

    申请日:1995-09-29

    摘要: A semiconductor device includes a III-V compound semiconductor layer including two or more Group III elements and containing dopant impurities, including a spontaneous superlattice, and having a stripe shape with two ends, and electrodes disposed on the ends of the stripe shaped semiconductor layer to form a resistor element. Because of the spontaneous superlattice, electrons are one-dimensionally confined within the III-V compound semiconductor layer, i.e., the electrons flow easier in the direction perpendicular to the periodic direction of the spontaneous superlattice than in the direction parallel to it, resulting in anisotropic of electrical resistivity. Therefore, the orientation of the resistor element with respect to the periodic direction of the spontaneous superlattice becomes another factor in determining the resistance of the resistor element. In particular, resistances of the resistor elements of identical stripe shape can be made considerably different from each other, if one is perpendicular to the periodic direction of the spontaneous superlattice and another is parallel to it.

    摘要翻译: 半导体器件包括III-V族化合物半导体层,该III-V族化合物半导体层包含两个以上的III族元素,并且含有掺杂杂质,包括自发超晶格,并且具有两端的条形,以及设置在条状半导体层的端部上的电极, 形成电阻元件。 由于自发的超晶格,电子被一维限制在III-V化合物半导体层内,即电子在垂直于自发超晶格的周期方向的方向上比在平行于其的方向更容易流动,导致各向异性 的电阻率。 因此,电阻元件相对于自发超晶格的周期方向的取向成为确定电阻元件的电阻的另一个因素。 特别地,如果一个垂直于自发超晶格的周期方向并且另一个与其平行,则可以使具有相同条形形状的电阻元件的电阻相当不同。

    Semiconductor device including doped spontaneously formed superlattice
layer
    2.
    发明授权
    Semiconductor device including doped spontaneously formed superlattice layer 失效
    半导体器件包括掺杂自发形成的超晶格层

    公开(公告)号:US5907161A

    公开(公告)日:1999-05-25

    申请号:US017422

    申请日:1998-02-02

    摘要: A semiconductor device includes a III-V compound semiconductor layer including two or more Group III elements and containing dopant impurities, including a spontaneous superlattice, and having a stripe shape with two ends, and electrodes disposed on the ends of the stripe shaped semiconductor layer to form a resistor element. Because of the spontaneous superlattice, electrons are one-dimensionally confined within the III-V compound semiconductor layer, i.e., the electrons flow easier in the direction perpendicular to the periodic direction of the spontaneous superlattice than in the direction parallel to it, resulting in anisotropic electrical resistivity. Therefore, the orientation of the resistor element with respect to the periodic direction of the spontaneous superlattice becomes another factor in determining the resistance of the resistor element. In particular, resistances of the resistor elements of identical stripe shape can be made considerably different from each other, if one is perpendicular to the periodic direction of the spontaneous superlattice and another is parallel to it.

    摘要翻译: 半导体器件包括III-V族化合物半导体层,该III-V族化合物半导体层包含两个以上的III族元素,并且含有掺杂杂质,包括自发超晶格,并且具有两端的条形,以及设置在条状半导体层的端部上的电极, 形成电阻元件。 由于自发的超晶格,电子被一维限制在III-V化合物半导体层内,即电子在垂直于自发超晶格的周期方向的方向上比在平行于其的方向更容易流动,导致各向异性 电阻率。 因此,电阻元件相对于自发超晶格的周期方向的取向成为确定电阻元件的电阻的另一个因素。 特别地,如果一个垂直于自发超晶格的周期方向并且另一个与其平行,则可以使具有相同条形形状的电阻元件的电阻相当不同。

    Semiconductor device
    3.
    发明授权
    Semiconductor device 失效
    半导体器件

    公开(公告)号:US5886360A

    公开(公告)日:1999-03-23

    申请号:US663636

    申请日:1996-06-14

    申请人: Seiji Ochi

    发明人: Seiji Ochi

    摘要: A semiconductor device includes a semiconductor substrate; a semiconductor laminated structure including a first barrier layer, a conduction layer including a natural superlattice, and a second barrier layer, disposed on the semiconductor substrate. The first barrier layer, the conduction layer, and the second barrier layer produce heterojunctions that confine charge carriers within the conduction layer. The first barrier layer has steps at the surface contacting the conduction layer, the steps including, alternatingly arranged, a first crystal plane having a first orientation and a second crystal plane having a second orientation. The conduction layer includes first portions where the natural superlattice is ordered and second portions where the natural superlattice is disordered, the first and second portions being disposed on the first and second crystal planes, respectively. The degree of order in the conduction layer is higher in the first portions than in the second portions. Thus, the band gap energy of the conduction layer is lower in the first portions than in the second portions, and charge carriers are confined within the first portions by the second portions. As a result, a semiconductor device in which the first portions function as high-performance quantum wires is realized.

    摘要翻译: 半导体器件包括半导体衬底; 包括第一阻挡层,包括天然超晶格的导电层和第二阻挡层的半导体层叠结构,设置在半导体衬底上。 第一阻挡层,导电层和第二阻挡层产生将电荷载流子限制在导电层内的异质结。 所述第一阻挡层在与所述导电层接触的表面上具有台阶,所述台阶包括交替布置具有第一取向的第一晶面和具有第二取向的第二晶面。 导电层包括天然超晶格被排序的第一部分和天然超晶格无序的第二部分,第一和第二部分分别设置在第一和第二晶面上。 导电层中的顺序在第一部分比第二部分高。 因此,导电层的带隙能在第一部分比第二部分低,并且电荷载流子被第二部分限制在第一部分内。 结果,实现了其中第一部分用作高性能量子线的半导体器件。

    High-speed semiconductor device with graded collector barrier
    4.
    发明授权
    High-speed semiconductor device with graded collector barrier 失效
    高速半导体器件具有分级集电极屏障

    公开(公告)号:US5389798A

    公开(公告)日:1995-02-14

    申请号:US955275

    申请日:1992-10-01

    摘要: A high-speed semiconductor device includes an emitter layer serving as an injection source of hot electrons and a collector barrier layer disposed between a base layer and a collector layer. The potential profile of the collector barrier layer gradually varies from a region in the vicinity of the boundary between the base layer and the collector barrier layer whereby reflection of electrons at the collector barrier layer is significantly reduced. Therefore, current density in the ON state of the device is increased without damaging the high speed characteristics of the device, and current density in the OFF state of the device is decreased, resulting in a high-performance and high-speed semiconductor device.

    摘要翻译: 高速半导体器件包括用作热电子注入源的发射极层和设置在基极层和集电极层之间的集电极势垒层。 集电极势垒层的电位分布从基极层与集电极阻挡层之间的边界附近的区域逐渐变化,由此电子在集电极阻挡层的反射显着降低。 因此,器件的ON状态下的电流密度增加而不损害器件的高速特性,并且器件的OFF状态下的电流密度降低,导致高性能和高速半导体器件。

    Semiconductor device structure including InAlAs or InAlGaAs current
blocking layers
    5.
    发明授权
    Semiconductor device structure including InAlAs or InAlGaAs current blocking layers 失效
    包括InAlAs或InAlGaAs电流阻挡层的半导体器件结构

    公开(公告)号:US5804840A

    公开(公告)日:1998-09-08

    申请号:US634948

    申请日:1996-04-19

    摘要: A method of fabricating a semiconductor device includes forming a stripe-shaped first insulating film on a semiconductor layer; using the first insulating film as a mask, etching the semiconductor layer to a depth to form a stripe-shaped ridge including a portion of the semiconductor layer left under the first insulating film; using the first insulating film as a mask, growing, by MOCVD, a high-resistance layer, selected from InAlAs and InAsGaAs, contacting both sides of the ridge structure, the high-resistance layer having a shallow donor concentration N.sub.SD, a shallow acceptor concentration N.sub.SA, and a deep donor concentration N.sub.DD in relationships of N.sub.SA >N.sub.SD and N.sub.SA -N.sub.SD

    摘要翻译: 半导体器件的制造方法包括在半导体层上形成条状的第一绝缘膜; 使用第一绝缘膜作为掩模,将半导体层蚀刻到深度以形成包括留在第一绝缘膜下方的半导体层的一部分的条形脊; 使用第一绝缘膜作为掩模,通过MOCVD生长选自InAlAs和InAsGaAs的高电阻层,接触脊结构的两侧,具有浅供体浓度NSD的高电阻层,浅受主浓度 NSA,NSA和NSA-NSD

    Infrared detector having active regions and isolating regions formed of
CdHgTe
    6.
    发明授权
    Infrared detector having active regions and isolating regions formed of CdHgTe 失效
    具有活性区域和由CdHgTe形成的隔离区域的红外探测器

    公开(公告)号:US5602414A

    公开(公告)日:1997-02-11

    申请号:US260791

    申请日:1994-06-16

    CPC分类号: H01L27/14649

    摘要: In a method for fabricating an infrared detector, initially, a CdHgTe layer of a first conductivity type is produced on a front surface of a semiconductor substrate, a plurality of spaced apart CdHgTe regions of a second conductivity type, opposite the first conductivity type, are produced at the surface of the first conductivity type CdHgTe layer, and part of the surface of the first conductivity type CdHgTe layer between the second conductivity type CdHgTe regions is selectively irradiated with a charged particle beam to evaporate Hg atoms from that part, whereby a CdHgTe separation region of the first conductivity type and having a Cd composition larger than that of the first conductivity type CdHgTe layer is produced penetrating through the first conductivity type CdHgTe layer and surrounding each of the second conductivity type CdHgTe regions. Therefore, a highly-integrated high-resolution infrared detector with no crosstalk between pixels is achieved.

    摘要翻译: 在红外线检测器的制造方法中,首先,在半导体基板的正面形成有与第一导电型相反的多个第二导电类型的间隔开的CdHgTe区域的第一导电型CdHgTe层, 在第一导电型CdHgTe层的表面产生,并且第二导电型CdHgTe区域之间的第一导电类型CdHgTe层的表面的一部分被带电粒子束选择性地照射,以从该部分蒸发Hg原子,由此CdHgTe 产生具有比第一导电型CdHgTe层的Cd组分大的第一导电类型的分离区,穿过第一导电型CdHgTe层并围绕每个第二导电型CdHgTe区。 因此,实现了在像素之间没有串扰的高度集成的高分辨率红外检测器。

    Solar cell
    7.
    发明授权
    Solar cell 失效
    太阳能电池

    公开(公告)号:US5248347A

    公开(公告)日:1993-09-28

    申请号:US831921

    申请日:1992-02-06

    申请人: Seiji Ochi

    发明人: Seiji Ochi

    摘要: In a semiconductor device having a metal electrode on a crystalline semiconductor surface, the metal electrode includes first portions electrically and mechanically connected to the surface and second portions mechanically separated from the surface and having configurations that easily deform. These first and second portions are alternatingly arranged on the surface. Accordingly, stress applied to the semiconductor beneath the electrode is reduced and deformation of the semiconductor element due to thermal stress is prevented, thereby preventing deterioration of element characteristics.

    摘要翻译: 在结晶半导体表面上具有金属电极的半导体器件中,金属电极包括与表面电连接和机械连接的第一部分和与表面机械分离的第二部分,并具有容易变形的构造。 这些第一和第二部分交替地布置在表面上。 因此,施加到电极下方的半导体的应力减小,并且防止了由于热应力引起的半导体元件的变形,从而防止元件特性的劣化。

    Visible light semiconductor laser
    8.
    发明授权
    Visible light semiconductor laser 失效
    可见光半导体激光器

    公开(公告)号:US5490159A

    公开(公告)日:1996-02-06

    申请号:US318337

    申请日:1994-10-05

    摘要: A visible light semiconductor laser includes a GaAs substrate having a surface making a first angle with a (100) surface toward the [011] direction. A semiconductor layer having a surface making a second angle smaller than the first angle with the (100) surface is disposed on a part of the first surface of the GaAs substrate. The semiconductor layer extends in the [011] direction and does not reach the opposite resonator facets of the laser. A first AlGaInP active layer is disposed on the the surface making the second angle with the (100) surface of the semiconductor layer, and the first active layer includes regularly ordered atoms. A second AlGaInP active layer is disposed on the first surface of the GaAs substrate. The second active layer includes disordered atoms and has a band gap energy larger than that of the first active layer. The second active layer serves as a window layer. In this structure, the ordered region and the disordered region of the active layer are produced according to the surface orientation of the underlying crystal layer. As a result, a laser structure in which the disordered region of the active layer is used as a window layer can be fabricated with high uniformity and high reproducibility.

    摘要翻译: 可见光半导体激光器包括具有朝向[011]方向与(100)表面成第一角度的表面的GaAs衬底。 具有与(100)表面成小于第一角度的第二角度的表面的半导体层设置在GaAs衬底的第一表面的一部分上。 半导体层沿[011]方向延伸并且不到达激光器的相反的谐振器面。 第一AlGaInP有源层设置在与半导体层的(100)表面成第二角度的表面上,并且第一有源层包括规则有序的原子。 第二AlGaInP有源层设置在GaAs衬底的第一表面上。 第二有源层包括无序原子并且具有比第一有源层的能隙大的带隙能量。 第二活性层用作窗口层。 在该结构中,有源层的有序区域和无序区域根据下面的晶体层的表面取向产生。 结果,可以以高均匀性和高再现性制造其中有源层的无序区域用作窗口层的激光结构。