利索-全球专利检索

  1. 登录
  2. 注册

搜索结果

101 条记录 (耗时 0.02 秒)

    Method for etching a quartz layer in a photoresistless semiconductor mask
    1.
    发明申请
    Method for etching a quartz layer in a photoresistless semiconductor mask 有权

    公开(公告)号：US20050164514A1

    公开(公告)日：2005-07-28

    申请号：US10766205

    申请日：2004-01-28

    申请人： Shahid Rauf ,  Peter Ventzek ,  Wei Wu

    发明人： Shahid Rauf ,  Peter Ventzek ,  Wei Wu

    IPC分类号： G03F1/00 ,  H01L21/302 ,  H01L21/311

    CPC分类号： G03F1/34 ,  H01L21/31116

    摘要： A chromeless phase lithography mask (30) that does not require photoresist to manufacture has a quartz substrate (32) is etched by using a plasma (38) containing one of a nitrogen augmented hydro-fluorocarbon oxygen mixture and a nitrogen augmented fluorocarbon oxygen mixture. Various hydro-fluorocarbons or fluorocarbons may be used. The nitrogen addition results in etched openings in the quartz substrate that have substantially vertical sidewalls in a uniform manner across the substrate. Surface roughness is minimized and edges of the openings are well-defined with minimal rounding. The etch rate is rendered controllable by reducing bias power without degrading a desired vertical sidewall profile.

    Laterally grown nanotubes and method of formation
    2.
    发明申请
    Laterally grown nanotubes and method of formation 有权
    侧生长的纳米管和形成方法

    公开(公告)号：US20070231946A1

    公开(公告)日：2007-10-04

    申请号：US11240241

    申请日：2005-09-30

    申请人： Marius Orlowski ,  Shahid Rauf ,  Peter Ventzek

    发明人： Marius Orlowski ,  Shahid Rauf ,  Peter Ventzek

    IPC分类号： H01L51/40 ,  H01L51/00 ,  H01L35/24 ,  H01L29/08

    CPC分类号： H01L21/76838 ,  H01L23/53276 ,  H01L2221/1094 ,  H01L2924/0002 ,  Y10S977/742 ,  Y10S977/89 ,  Y10S977/891 ,  Y10S977/932 ,  Y10S977/939 ,  H01L2924/00

    摘要： A semiconductor device has lateral conductors or traces that are formed of nanotubes such as carbon. A sacrificial layer is formed overlying the substrate. A dielectric layer is formed overlying the sacrificial layer. A lateral opening is formed by removing a portion of the dielectric layer and the sacrificial layer which is located between two columns of metallic catalysts. The lateral opening includes a neck portion and a cavity portion which is used as a constrained space to grow a nanotube. A plasma is used to apply electric charge that forms an electric field which controls the direction of formation of the nanotubes. Nanotubes from each column of metallic catalyst are laterally grown and either abut or merge into one nanotube. Contact to the nanotube may be made from either the neck portion or the columns of metallic catalysts.

    摘要翻译： 半导体器件具有由碳纳米管形成的横向导体或迹线。 覆盖衬底上形成牺牲层。 覆盖在牺牲层上的电介质层。 通过去除位于两列金属催化剂之间的介电层和牺牲层的一部分来形成侧向开口。 横向开口包括颈部和空腔部分，其用作用于生长纳米管的约束空间。 使用等离子体来施加形成控制纳米管形成方向的电场的电荷。 来自每列金属催化剂的纳米管横向生长并邻接或合并成一个纳米管。 与纳米管的接触可以由金属催化剂的颈部或者柱子制成。

    Method for removing metal foot during high-k dielectric/metal gate etching
    3.
    发明申请
    Method for removing metal foot during high-k dielectric/metal gate etching 有权
    在高k电介质/金属栅极蚀刻期间去除金属脚的方法

    公开(公告)号：US20070166973A1

    公开(公告)日：2007-07-19

    申请号：US11331786

    申请日：2006-01-13

    申请人： Shahid Rauf ,  Olubunmi Adetutu ,  Eric Luckowski ,  Peter Ventzek

    发明人： Shahid Rauf ,  Olubunmi Adetutu ,  Eric Luckowski ,  Peter Ventzek

    IPC分类号： H01L21/467

    CPC分类号： H01L21/02071 ,  H01L21/28088 ,  H01L21/32136 ,  H01L21/32137 ,  H01L21/32139 ,  H01L29/4966 ,  H01L29/517 ,  H01L29/518

    摘要： A metal layer etch process deposits, patterns and anisotropically etches a polysilicon layer (24) down to an underlying metal layer (22) to form an etched polysilicon structure (54) with polymer layers (50, 52) formed on its sidewall surfaces. The polymer layer (50, 52) are removed to expose an additional surface area (60, 62) of the metal layer (22), and dielectric layers (80, 82) are formed on the sidewall surfaces of the etched polysilicon structure (54). Next, the metal layer (22) is plasma etched to form an etched metal layer (95) with substantially vertical sidewall surfaces (97, 99) by simultaneously charging the dielectric layers (80, 82) to change plasma ion trajectories near the dielectric layers (80, 82) so that plasma ions (92, 94) impact the sidewall surfaces (97, 99) in a more perpendicular angle to enhance etching of the sidewall surfaces (97, 99) of the etched metal layer (95).

    摘要翻译： 金属层蚀刻工艺沉积，图案和各向异性地将多晶硅层（24）向下蚀刻到下面的金属层（22）以形成蚀刻的多晶硅结构（54），其上形成有在其侧壁表面上的聚合物层（50,52）。 去除聚合物层（50,52）以暴露金属层（22）的另外的表面区域（60,62），并且在蚀刻的多晶硅结构（54）的侧壁表面上形成介电层（80,82） ）。 接下来，通过同时对电介质层（80,82）充电以改变电介质层附近的等离子体离子轨迹，等离子体蚀刻金属层（22）以形成具有基本上垂直的侧壁表面（97,99）的蚀刻金属层（95） （80,82），使得等离子体离子（92,94）以更垂直的角度冲击侧壁表面（97,99）以增强蚀刻金属层（95）的侧壁表面（97,99）的蚀刻。

    Method and apparatus for improving nitrogen profile during plasma nitridation
    4.
    发明申请
    Method and apparatus for improving nitrogen profile during plasma nitridation 审中-公开
    用于改善等离子体氮化期间氮气廓线的方法和装置

    公开(公告)号：US20070049048A1

    公开(公告)日：2007-03-01

    申请号：US11216254

    申请日：2005-08-31

    申请人： Shahid Rauf ,  Peter Ventzek

    发明人： Shahid Rauf ,  Peter Ventzek

    IPC分类号： H01L21/31

    CPC分类号： H01L21/02247 ,  H01J37/3266 ,  H01J2237/3387 ,  H01L21/02252 ,  H01L21/28185 ,  H01L21/3144

    摘要： A semiconductor manufacturing apparatus and process for forming a nitrided dielectric film includes generating a plasma source (44) over a wafer structure (46), where the plasma source (44) includes neutral species (such as nitrogen atoms) and charged species (such as nitrogen ions) that are formed in an inductively coupled plasma reactor. Before the charged species in the plasma (44) can penetrate the wafer structure (46), an electrically connected mesh structure (45, 47) between the plasma source (44) and wafer structure (46) blocks the charged species. In addition or in the alternative, a magnetic field (69) aligned in parallel with the surface of the wafer structure (66) is established in close proximity to the wafer structure (66) in order to trap the charged species. By removing charged species, an improved, narrower nitrogen concentration profile is obtained.

    摘要翻译： 用于形成氮化电介质膜的半导体制造装置和工艺包括在晶片结构（46）上产生等离子体源（44），其中等离子体源（44）包括中性物质（例如氮原子）和带电物质（例如 氮离子），其形成在电感耦合等离子体反应器中。 在等离子体（44）中的带电物质可以穿透晶片结构（46）之前，等离子体源（44）和晶片结构（46）之间的电连接的网状结构（45,47）阻挡带电物质。 另外或在替代方案中，与晶片结构（66）的表面平行排列的磁场（69）被建立成靠近晶片结构（66）以捕获带电物质。 通过去除带电物质，获得了改进的较窄的氮浓度分布。

    Method for forming a semiconductor device having metal silicide
    5.
    发明申请
    Method for forming a semiconductor device having metal silicide 审中-公开
    用于形成具有金属硅化物的半导体器件的方法

    公开(公告)号：US20050196961A1

    公开(公告)日：2005-09-08

    申请号：US10795847

    申请日：2004-03-08

    申请人： Da Zhang ,  Olubunmi Adetutu ,  Shahid Rauf ,  Peter Ventzek

    发明人： Da Zhang ,  Olubunmi Adetutu ,  Shahid Rauf ,  Peter Ventzek

    IPC分类号： H01L21/336 ,  H01L21/44 ,  H01L21/4763

    CPC分类号： H01L21/28518 ,  H01L29/665 ,  H01L29/78

    摘要： In one embodiment, a top surface of a semiconductor device (18) is amorphized in a tool (1). A metal is deposited over the semiconductor substrate using the same tool. In one embodiment, the same chambers are used. In an embodiment, the tool is a sputtering tool, such as a physical vapor deposition (PVD). The semiconductor substrate may be annealed to form a metal silicide (122) over at least a portion of the semiconductor device that includes silicon.

    摘要翻译： 在一个实施例中，半导体器件（18）的顶表面在工具（1）中非晶化。 使用相同的工具在半导体衬底上沉积金属。 在一个实施例中，使用相同的腔室。 在一个实施例中，该工具是溅射工具，例如物理气相沉积（PVD）。 半导体衬底可以被退火以在包括硅的半导体器件的至少一部分上形成金属硅化物（122）。

    Charge-free layer by layer etching of dielectrics
    6.
    发明申请
    Charge-free layer by layer etching of dielectrics 失效
    无电荷逐层蚀刻电介质

    公开(公告)号：US20070163994A1

    公开(公告)日：2007-07-19

    申请号：US11333844

    申请日：2006-01-18

    申请人： Shahid Rauf ,  Peter Ventzek

    发明人： Shahid Rauf ,  Peter Ventzek

    IPC分类号： C23F1/00 ,  H01L21/306

    CPC分类号： H01J37/32357 ,  H01J37/32449 ,  H01L21/30655 ,  H01L21/31116

    摘要： A method for etching a dielectric film is provided herein. In accordance with the method, a device (201) is provided which comprises a first chamber (203) equipped with a first gas supply (209) and a second chamber (205) equipped with a second gas supply (215), wherein the second chamber is in communication with the first chamber by way of an acceleration grid (211) having a variable potential. The gas flow into the plasma chamber is oscillated between a first state in which the gas flow into the first chamber has the composition ƒ11 and the gas flow into the second chamber has the composition ƒ21, and a second state in which the gas flow into the first chamber has the composition ƒ12 and the gas flow into the second chamber has the composition ƒ22. The potential applied to the acceleration grid is oscillated such that the voltage applied to the grid is V1 when the gas flow into the plasma chamber is in the first state, and the voltage applied to the grid is V2 when the gas flow into the plasma chamber is in the second state.

    摘要翻译： 本发明提供蚀刻电介质膜的方法。 根据该方法，提供一种装置（201），其包括配备有第一气体供应（209）的第一室（203）和装备有第二气体供应（215）的第二室（205），其中第二室 室通过具有可变电位的加速栅（211）与第一室连通。 进入等离子体室的气体流动在第一状态中，其中进入第一腔室的气体流具有组成f 11，并且进入第二腔室的气体流动具有组成f 21 并且第二状态，其中流入第一室的气体具有组成f 12，并且进入第二室的气流具有组成f 22， 。 施加到加速电网的电位振荡，使得当进入等离子体室的气体处于第一状态时施加到电网的电压为V 1，并且施加到电网的电压为V 当进入等离子体室的气体处于第二状态时，<2>。

    Thin-film capacitor with a field modification layer and methods for forming the same
    7.
    发明申请
    Thin-film capacitor with a field modification layer and methods for forming the same 有权
    具有场改性层的薄膜电容器及其形成方法

    公开(公告)号：US20070155113A1

    公开(公告)日：2007-07-05

    申请号：US11326524

    申请日：2006-01-04

    申请人： Douglas Roberts ,  Eric Luckowski ,  Shahid Rauf ,  Peter Ventzek

    发明人： Douglas Roberts ,  Eric Luckowski ,  Shahid Rauf ,  Peter Ventzek

    IPC分类号： H01L21/8242 ,  H01L21/20

    CPC分类号： H01L28/40 ,  H01L28/57

    摘要： A method for forming a capacitor includes providing a metal-containing bottom electrode, forming a capacitor insulator over the metal-containing bottom electrode, forming a metal-containing top electrode over the capacitor insulator, and forming a dielectric-containing field modification layer over the capacitor insulator and at least partially surrounding the metal-containing top electrode. Forming the dielectric-containing field modification layer may include oxidizing a sidewall of the metal-containing field modification layer. A barrier layer may be formed over the capacitor insulator prior to forming the metal-containing top electrode.

    摘要翻译： 一种形成电容器的方法包括提供含金属的底部电极，在含金属的底部电极上形成电容器绝缘体，在电容器绝缘体之上形成含金属的顶部电极，并在 电容器绝缘体并且至少部分地围绕含金属的顶部电极。 形成含电介质的场改性层可以包括氧化含金属的场改性层的侧壁。 在形成含金属的顶部电极之前，可以在电容器绝缘体上形成阻挡层。