摘要:
A new method to prevent copper contamination of the intermetal dielectric layer during via or dual damascene etching by forming a capping layer over the first copper metallization is described. A first copper metallization is formed in a dielectric layer overlying a semiconductor substrate wherein a barrier metal layer is formed underlying the first copper metallization and overlying the dielectric layer. The first copper metallization is planarized, then etched to form a recess below the surface of the dielectric layer. A conductive capping layer is deposited overlying the first copper metallization within the recess and overlying the dielectric layer. The conductive capping layer is removed except over the first copper metallization within the recess using one of several methods. An intermetal dielectric layer is deposited overlying the dielectric layer and the conductive capping layer overlying the first copper metallization. A via or dual damascene opening is etched through the intermetal dielectric layer to the conductive capping layer wherein the conductive capping layer prevents copper contamination of the intermetal dielectric layer during etching. The via or dual damascene opening is filled with a metal layer to complete electrical connections in the fabrication of an integrated circuit device.
摘要:
A method of bonding a bonding element to a metal bonding pad comprises the following steps. A semiconductor structure having an exposed, recessed metal bonding pad within a layer opening is provided. The layer has an upper surface. A conductive cap having a predetermined thickness is formed over the metal bonding pad. A bonding element is bonded to the conductive cap to form an electrical connection with the metal bonding pad.
摘要:
A method of bonding a bonding element to a metal bonding pad, comprising the following steps. A semiconductor structure having an exposed metal bonding pad within a passivation layer opening is provided. The bonding pad has an upper surface. A bonding element is positioned to contact the bonding pad upper surface. A bonding solution is applied within the passivation layer opening, covering the bonding pad and a portion of the bonding element. The structure is annealed by heating said bonding element to selectively solidify the bonding solution proximate said contact of said bonding element to said bonding pad, bonding the bonding element to the bonding pad.
摘要:
A method of forming a conductive cap layer over a metal bonding pad comprises the following steps. A semiconductor structure is provided having an exposed, recessed metal bonding pad within a layer opening. The layer has an upper surface. The exposed metal bonding pad is treated with a solution containing soluble metal ions to form a conductive cap over the metal bonding pad. The conductive cap layer is comprised of the solution metal and has a predetermined thickness. An external bonding element may then be bonded to the conductive cap, forming an electrical connection with the metal bonding pad.
摘要:
A method of bonding a bonding element to a metal bonding pad comprises the following steps. A semiconductor structure having an exposed, recessed metal bonding pad within a layer opening is provided. The layer has an upper surface. A conductive cap having a predetermined thickness is formed over the metal bonding pad. A bonding element is bonded to the conductive cap to form an electrical connection with the metal bonding pad.
摘要:
A semiconductor chip having an exposed metal terminating pad thereover, and a separate substrate having a corresponding exposed metal bump thereover are provided. A conducting polymer plug is formed over the exposed metal terminating pad. A conforming interface layer is formed over the conducting polymer plug. The conducting polymer plug of the semiconductor chip is aligned with the corresponding metal bump. The conforming interface layer over the conducting polymer plug is mated with the corresponding metal bump. The conforming interface layer is thermally decomposed, adhering and permanently attaching the conducting polymer plug with the corresponding metal bump. Methods of forming and patterning a nickel carbonyl layer are also disclosed.
摘要:
A semiconductor chip having an exposed metal terminating pad thereover, and a separate substrate having a corresponding exposed metal bump thereover are provided. A conducting polymer plug is formed over the exposed metal terminating pad. A conforming interface layer is formed over the conducting polymer plug. The conducting polymer plug of the semiconductor chip is aligned with the corresponding metal bump. The conforming interface layer over the conducting polymer plug is mated with the corresponding metal bump. The conforming interface layer is thermally decomposed, adhering and permanently attaching the conducting polymer plug with the corresponding metal bump. Methods of forming and patterning a nickel carbonyl layer are also disclosed.
摘要:
A method for forming dual-damascene type conducting interconnects with non-metallic barriers that protect said interconnects from fluorine out-diffusion from surrounding low-k, fluorinated dielectric materials. One embodiment of the method is particularly suited for forming such interconnects in microelectronics fabrications of the sub 0.15 micron generation.
摘要:
A method for forming dual-damascene type conducting interconnects with non-metallic barriers that protect said interconnects from fluorine out-diffusion from surrounding low-k, fluorinated dielectric materials. One embodiment of the method is particularly suited for forming such interconnects in microelectronics fabrications of the sub 0.15 micron generation.
摘要:
A method of forming amorphous silicon spacers followed by the forming of metal nitride over the spacers in a copper damascene structure—single, dual, or multi-structure—is disclosed in order to prevent the formation of fluorides in copper. In a first embodiment, the interconnection between the copper damascene and an underlying copper metal layer is made by forming an opening from the dual damascene structure to the underlying copper layer after the formation of the metal nitride layer over the amorphous silicon spacers formed on the inside walls of the dual damascene structure. In the second embodiment, the interconnection between the dual damascene structure and the underlying copper line is made from the dual damascene structure by etching into the underlying copper layer after the forming of the amorphous silicon spacers and before the forming of the metal nitride layer. In the third embodiment, the ternary metal silicon nitride spacer is formed by etching after having first formed the amorphous silicon layer and the nitride layer, in that order, and then etching the passivation/barrier layer at the bottom of the damascene structure into the underlying copper layer. In all three embodiments, metal nitride reacts with amorphous silicon to form a ternary metal silicon nitride having an excellent property of adhering to copper while at the same time for forming an excellent barrier to diffusion of copper.