公开(公告)号：US11949014B2

公开(公告)日：2024-04-02

申请号：US17722514

申请日：2022-04-18

Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.

Inventor： Wei-Barn Chen ,  Ting-Huang Kuo ,  Shiu-Ko Jangjian ,  Chi-Cherng Jeng

IPC: H01L29/78 ,  H01L21/762 ,  H01L21/8234 ,  H01L27/06 ,  H01L27/088 ,  H01L29/66 ,  H01L49/02

CPC classification number: H01L29/7851 ,  H01L21/76229 ,  H01L21/823412 ,  H01L21/823431 ,  H01L21/823481 ,  H01L27/0629 ,  H01L27/0886 ,  H01L28/40 ,  H01L29/66795 ,  H01L29/7853

Abstract: A FinFET device structure and method for forming the same are provided. The FinFET device structure includes a first, second, third and fourth fin structures over a substrate. The first and the second fin structures have a first and a second sidewall surfaces respectively. The third and the fourth fin structure have a third and a fourth sidewall surfaces respectively. The first and the second sidewall surfaces extend along a first direction. The third and the fourth sidewall surfaces extend along a second direction different from the first direction. A first and a second isolation structures are over the substrate and surrounding the first and the second fin structure and surrounding the third and the fourth fin structures respectively. A distance between top portions of the third and the fourth sidewall surfaces is greater than that between top portions of the first and the second sidewall surfaces.

公开(公告)号：US10998194B2

公开(公告)日：2021-05-04

申请号：US16685800

申请日：2019-11-15

Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.

Inventor： Shiu-Ko Jangjian ,  Ting-Chun Wang ,  Chi-Cherng Jeng ,  Chi-Wen Liu

IPC: H01L21/28 ,  H01L29/66 ,  H01L29/78 ,  H01L29/49 ,  H01L21/8234 ,  H01L21/02 ,  H01L27/088 ,  H01L29/165 ,  H01L29/08 ,  H01L29/16 ,  H01L29/161 ,  H01L29/51

Abstract: Gate stacks for improving integrated circuit device performance and methods for fabricating such gate stacks are disclosed herein. An exemplary gate stack includes a gate dielectric layer disposed over the substrate, a multi-function layer disposed over the gate dielectric layer, and a work function layer disposed over the multi-function layer. The multi-function layer includes a first metal nitride sub-layer having a first nitrogen (N) concentration and a second metal nitride material with a second metal nitride sub-layer having a second N concentration. The second metal nitride sub-layer is disposed over the first metal nitride-sub layer and the first N concentration is greater than the second N concentration. In some implementations, the second N concentration is from about 2% to about 5% and the first N concentration is from about 5% to about 15%.

公开(公告)号：US10658186B2

公开(公告)日：2020-05-19

申请号：US16231836

申请日：2018-12-24

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.

Inventor： Chia-Yang Wu ,  Shiu-Ko Jangjian ,  Keng-Chuan Chang ,  Ting-Siang Su

IPC: H01L21/285 ,  H01L29/78 ,  H01L29/165 ,  H01L29/45 ,  H01L29/66 ,  H01L29/40 ,  H01L29/417 ,  H01L21/768

Abstract: A method of forming a semiconductor device includes depositing a titanium-containing material over a source/drain (S/D), wherein an energy of depositing the titanium-containing material is sufficient to cause re-deposition of a material of the S/D along sidewalls of a dielectric layer adjacent the S/D to form protrusions extending from a top surface of the S/D. The method further includes annealing the semiconductor device to form a silicide layer in the S/D and in the protrusions.

公开(公告)号：US10163643B2

公开(公告)日：2018-12-25

申请号：US15723541

申请日：2017-10-03

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.

Inventor： Chia-Yang Wu ,  Shiu-Ko Jangjian ,  Keng-Chuan Chang ,  Ting-Siang Su

IPC: H01L21/285 ,  H01L29/78 ,  H01L29/165 ,  H01L29/45 ,  H01L29/66 ,  H01L29/40 ,  H01L21/768

Abstract: A method of forming a semiconductor device includes etching an inter-layer dielectric (ILD) to form a contact opening exposing a portion of a source/drain (S/D). The method further includes depositing a titanium-containing material into the contact opening, wherein an energy of depositing the titanium-containing material is sufficient to cause re-deposition of a material of the S/D along sidewalls of the ILD to form protrusions extending from a top surface of the S/D. The method further includes annealing the semiconductor device to form a silicide layer in the S/D and in the protrusions.

公开(公告)号：US11784240B2

公开(公告)日：2023-10-10

申请号：US17833363

申请日：2022-06-06

Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.

Inventor： Chia-Yang Wu ,  Shiu-Ko Jangjian ,  Ting-Chun Wang ,  Yung-Si Yu

IPC: H01L29/66 ,  H01L29/417 ,  H01L29/78 ,  H01L21/768 ,  H01L21/762 ,  H01L21/285 ,  H01L29/49 ,  H01L29/165

CPC classification number: H01L29/66795 ,  H01L21/28556 ,  H01L21/762 ,  H01L21/76831 ,  H01L21/76832 ,  H01L21/76843 ,  H01L29/41791 ,  H01L29/4966 ,  H01L29/665 ,  H01L29/66545 ,  H01L29/7848 ,  H01L29/7851 ,  H01L21/76224 ,  H01L29/165

Abstract: A semiconductor device structure is provided. The semiconductor device structure includes a contact layer over a metal silicide layer. The contact layer extends through a first dielectric structure. The semiconductor device structure includes a first metal nitride barrier layer over sidewalls of the contact layer. The first metal nitride barrier layer is directly adjacent to the first dielectric structure. The semiconductor device structure includes a second metal nitride barrier layer partially between the contact layer and the metal silicide layer and partially between the contact layer and the first metal nitride barrier layer. The metal silicide layer is below the first metal nitride barrier layer and the second metal nitride barrier layer.

公开(公告)号：US11227886B2

公开(公告)日：2022-01-18

申请号：US17038782

申请日：2020-09-30

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY, LTD.

Inventor： Volume Chien ,  Yun-Wei Cheng ,  Shiu-Ko Jangjian ,  Zhe-Ju Liu ,  Kuo-Cheng Lee ,  Chi-Cherng Jeng

IPC: H01L27/146 ,  H01L31/0232 ,  H01L31/0216

Abstract: An image sensor device is provided. The image sensor device includes a semiconductor substrate and a light sensing region in the semiconductor substrate. The image sensor device also includes a dielectric layer over the semiconductor substrate and a filter partially surrounded by the dielectric layer. The filter has a protruding portion protruding from a bottom surface of the dielectric layer. The image sensor device further includes a shielding layer between the dielectric layer and the semiconductor substrate and surrounding the protruding portion of the filter. In addition, the image sensor device includes a reflective element between the shielding layer and an edge of the light sensing region.

公开(公告)号：US09406675B1

公开(公告)日：2016-08-02

申请号：US14658511

申请日：2015-03-16

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.

Inventor： Cheng-Ta Wu ,  Cheng-Wei Chen ,  Hong-Yi Wu ,  Shiu-Ko Jangjian ,  Wei-Ming You ,  Ting-Chun Wang

IPC: H01L21/8234 ,  H01L21/28 ,  H01L29/788 ,  H01L27/088 ,  H01L21/02 ,  H01L29/66 ,  H01L29/06 ,  H01L21/265 ,  H01L29/423

CPC classification number: H01L27/0886 ,  H01L21/02532 ,  H01L21/0257 ,  H01L21/02592 ,  H01L21/02595 ,  H01L21/02609 ,  H01L21/0262 ,  H01L21/02667 ,  H01L21/26506 ,  H01L21/28035 ,  H01L21/28088 ,  H01L21/76224 ,  H01L21/823431 ,  H01L21/823437 ,  H01L21/823462 ,  H01L21/823481 ,  H01L29/045 ,  H01L29/0649 ,  H01L29/66545 ,  H01L29/66795

Abstract: A semiconductor structure and a method for forming the same are provided. The method includes providing a substrate, forming a fin structure extruding from the substrate, forming shallow trench isolations over the substrate, and forming an oxide material over the fin structure. The method further includes forming a carbon-doped amorphous silicon layer or a carbon-doped poly silicon layer over the oxide material, wherein the forming a carbon-doped amorphous silicon layer or a carbon-doped poly silicon layer includes doping carbon in a range of from about 5E19/cm3 to about 1E22/cm3.

Abstract translation: 提供半导体结构及其形成方法。 该方法包括提供基板，形成从基板挤出的翅片结构，在基底上形成浅沟槽隔离，以及在翅片结构上形成氧化物材料。 所述方法还包括在所述氧化物材料上形成碳掺杂非晶硅层或碳掺杂多晶硅层，其中形成碳掺杂非晶硅层或碳掺杂多晶硅层包括在一定范围内掺杂碳 约5E19 / cm3至约1E22 / cm3。

公开(公告)号：US09406499B2

公开(公告)日：2016-08-02

申请号：US14178814

申请日：2014-02-12

Applicant: TAIWAN SEMICONDUCTOR MANUFACTURING COMPANY LTD.

Inventor： Chen-Chun Chen ,  Chiu-Jung Chen ,  Fu-Tsun Tsai ,  Shiu-Ko Jangjian ,  Chi-Cherng Jeng ,  Hsin-Chi Chen

IPC: H01L23/544 ,  H01L21/02 ,  H01L27/146

CPC classification number: H01L24/83 ,  H01L21/02019 ,  H01L21/0273 ,  H01L21/268 ,  H01L21/30604 ,  H01L21/76256 ,  H01L27/1464 ,  H01L27/14687 ,  H01L27/1469 ,  H01L2224/29101 ,  H01L2224/29111 ,  H01L2224/29124 ,  H01L2224/29144 ,  H01L2224/2919 ,  H01L2224/83201 ,  H01L2224/838 ,  H01L2224/83805 ,  H01L2224/8385 ,  H01L2224/83895 ,  H01L2224/83896 ,  H01L2924/07025

Abstract: A semiconductor structure includes a wafer including a first surface and a periphery, a plurality of protrusions protruded from the first surface and a plurality of recesses spaced from each other by the plurality of protrusions, and each of the plurality of recesses is extended from the periphery of the wafer and is elongated across the first surface of the wafer.

Abstract translation: 半导体结构包括：第一表面和周边的晶片，从第一表面突出的多个突起和由多个突起彼此间隔开的多个凹部，并且多个凹部中的每一个从周边延伸 并且延伸穿过晶片的第一表面。

公开(公告)号：US09337303B2

公开(公告)日：2016-05-10

申请号：US14328299

申请日：2014-07-10

Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.

Inventor： Shiu-Ko Jangjian ,  Chi-Wen Liu ,  Chi-Cherng Jeng ,  Ting-Chun Wang

IPC: H01L29/49 ,  H01L29/66 ,  H01L21/28 ,  H01L29/51

CPC classification number: H01L29/66545 ,  H01L21/28088 ,  H01L29/4958 ,  H01L29/4966 ,  H01L29/513 ,  H01L29/517 ,  H01L29/518

Abstract: A metal gate stack having a titanium aluminum carbon nitride (TiAlCN) as a work function layer and/or a multi-function blocking/wetting layer, and methods of manufacturing the same, are disclosed. In an example, an integrated circuit device includes a semiconductor substrate and a gate stack disposed over the semiconductor substrate. The gate stack includes a gate dielectric layer disposed over the semiconductor substrate, a multi-function blocking/wetting layer disposed over the gate dielectric layer, wherein the multi-function blocking/wetting layer includes TiAlCN, a work function layer disposed over the multi-function blocking/wetting layer, and a conductive layer disposed over the work function layer.

Abstract translation: 公开了具有钛铝碳氮化物（TiAlCN）作为功函数层和/或多功能阻挡/润湿层的金属栅极堆叠及其制造方法。 在一个示例中，集成电路器件包括设置在半导体衬底上的半导体衬底和栅极堆叠。 所述栅极堆叠包括设置在所述半导体衬底上的栅极电介质层，设置在所述栅极介电层上的多功能阻挡/润湿层，其中所述多功能阻挡/润湿层包括TiAlCN， 功能阻挡/润湿层，以及布置在功函数层上的导电层。

公开(公告)号：US12046662B2

公开(公告)日：2024-07-23

申请号：US18307187

申请日：2023-04-26

Applicant: Taiwan Semiconductor Manufacturing Company, Ltd.

Inventor： Chia-Yang Wu ,  Shiu-Ko Jangjian ,  Ting-Chun Wang ,  Yung-Si Yu

IPC: H01L29/66 ,  H01L21/285 ,  H01L21/762 ,  H01L21/768 ,  H01L29/417 ,  H01L29/49 ,  H01L29/78 ,  H01L29/165

CPC classification number: H01L29/66795 ,  H01L21/28556 ,  H01L21/762 ,  H01L21/76831 ,  H01L21/76832 ,  H01L21/76843 ,  H01L29/41791 ,  H01L29/4966 ,  H01L29/665 ,  H01L29/66545 ,  H01L29/7848 ,  H01L29/7851 ,  H01L21/76224 ,  H01L29/165

Abstract: A semiconductor device structure is provided. The semiconductor device structure includes a dielectric structure over the substrate. The semiconductor device structure includes a contact structure passing through the dielectric structure. The contact structure includes a contact layer, a first barrier layer, and a second barrier layer, the contact layer passes through the first barrier layer, the first barrier layer passes through the second barrier layer, the first barrier layer surrounds the contact layer, the second barrier layer surrounds a first upper portion of a sidewall of the first barrier layer and exposes a first lower portion of the sidewall of the first barrier layer, and the sidewall faces away from the contact layer.