SEMICONDUCTOR MEMORY DEVICE
    1.
    发明申请

    公开(公告)号:US20190267392A1

    公开(公告)日:2019-08-29

    申请号:US16126259

    申请日:2018-09-10

    Abstract: A semiconductor memory device includes a plurality of electrode films and a plurality of first insulating films stacked alternately along a first direction, a semiconductor member extending in the first direction, a charge storage member provided between the semiconductor member and the electrode films, and a second insulating film provided between the charge storage member and the electrode films. At least one of the plurality of first insulating films includes one or more types of a first material selected from the group consisting of silicon nitride, hafnium oxide, silicon oxynitride, and aluminum oxide.

    SEMICONDUCTOR MEMORY DEVICE
    2.
    发明申请

    公开(公告)号:US20200091183A1

    公开(公告)日:2020-03-19

    申请号:US16351207

    申请日:2019-03-12

    Abstract: A semiconductor memory device includes first structure bodies and second structure bodies arranged alternately along a first direction. The first structure body includes electrode films arranged along a second direction. The second structure body includes columnar members, first insulating members, and second insulating members. The columnar member includes a semiconductor member extending in the second direction and a charge storage member provided between the semiconductor member and the electrode film. The second insulating members are arranged along a third direction. Lengths in the first direction of the second insulating members are longer than lengths in the first direction of the first insulating members. Positions of the second insulating members in the third direction are different from each other between the second structure bodies adjacent to each other in the first direction. The columnar members and the first insulating members are arranged alternately between the second insulating members.

    SEMICONDUCTOR MEMORY DEVICE
    3.
    发明申请

    公开(公告)号:US20200303403A1

    公开(公告)日:2020-09-24

    申请号:US16559389

    申请日:2019-09-03

    Abstract: A semiconductor memory device includes a first block and a second block arranged adjacent to each other in a Y direction. Each of the first and second blocks includes conductive layers extended in an X direction, memory trenches between the conductive layers, memory pillars provided across two conductive layers with a memory trench interposed therebetween, and transistors provided between the memory pillars and the conductive layers. One of the conductive layers provided at an end of the first block in the Y direction is electrically connected to one of the conductive layers provided at an end of the second block.

    SEMICONDUCTOR MEMORY DEVICE
    4.
    发明申请

    公开(公告)号:US20200286828A1

    公开(公告)日:2020-09-10

    申请号:US16564584

    申请日:2019-09-09

    Abstract: According to one embodiment, a semiconductor memory device includes: a first semiconductor layer including first to third portions which are arranged along a first direction and differ in position from one another in a second direction; a conductive layer including a fourth portion extending in the second direction and a fifth portion extending in the first direction; a first insulating layer between the fourth portion and the first semiconductor layer and between the fifth portion and the first semiconductor layer; a first contact plug coupled to the fourth portion; a second contact plug coupled to the first semiconductor layer in a region where the first insulating layer is formed; a first interconnect; and a first memory cell apart from the fifth portion in the first direction and storing information between the semiconductor layer and the first interconnect.

    SEMICONDUCTOR MEMORY DEVICE
    7.
    发明申请

    公开(公告)号:US20200303389A1

    公开(公告)日:2020-09-24

    申请号:US16559363

    申请日:2019-09-03

    Abstract: A semiconductor memory device includes first conductive layers stacked on a substrate; second conductive layers stacked on the substrate and apart from the first conductive layer in a direction; third conductive layers stacked on the substrate and electrically connected to the first and second conductive layers; first insulating layers arranged in the direction to sandwich the first conductive layers; second insulating layers arranged in the direction to sandwich the second conductive layers; slit regions that sandwich the third conductive layers; and memory pillars disposed on the first and second insulating layers. The slit region is disposed between an end portion of one of the first insulating layers and an end portion of one of the second insulating layers.

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