公开(公告)号：US20190123017A1

公开(公告)日：2019-04-25

申请号：US16223274

申请日：2018-12-18

申请人： Taiwan Semiconductor Manufacturing Co., Ltd.

发明人： Chun-Lin Lu ,  Kai-Chiang Wu ,  Ming-Kai Liu ,  Yen-Ping Wang ,  Shih-Wei Liang ,  Ching-Feng Yang ,  Chia-Chun Miao ,  Hung-Jen Lin

IPC分类号： H01L23/00

摘要： Embodiments of mechanisms for forming a package structure are provided. The package structure includes a semiconductor die and a substrate. The package structure includes a pillar bump and an elongated solder bump bonded to the semiconductor die and the substrate. A height of the elongated solder bump is substantially equal to a height of the pillar bump. The elongated solder bump has a first width, at a first horizontal plane passing through an upper end of a sidewall surface of the elongated solder bump, and a second width, at a second horizontal plane passing through a midpoint of the sidewall surface. A ratio of the second width to the first width is in a range from about 0.5 to about 1.1.

公开(公告)号：US20220230940A1

公开(公告)日：2022-07-21

申请号：US17712436

申请日：2022-04-04

申请人： Taiwan Semiconductor Manufacturing Co., Ltd.

发明人： Chia-Chun Miao ,  Kai-Chiang Wu ,  Shih-Wei Liang

IPC分类号： H01L23/48 ,  H01L23/00

摘要： A structure includes a die substrate; a passivation layer on the die substrate; first and second interconnect structures on the passivation layer; and a barrier on the passivation layer, at least one of the first or second interconnect structures, or a combination thereof. The first and second interconnect structures comprise first and second via portions through the passivation layer to first and second conductive features of the die substrate, respectively. The first and second interconnect structures further comprise first and second pads, respectively, and first and second transition elements on a surface of the passivation layer between the first and second via portion and the first and second pad, respectively. The barrier is disposed between the first pad and the second pad. The barrier does not fully encircle at least one of the first pad or the second pad.

公开(公告)号：US09559071B2

公开(公告)日：2017-01-31

申请号：US13927972

申请日：2013-06-26

申请人： Taiwan Semiconductor Manufacturing Co., Ltd

发明人： Chun-Lin Lu ,  Kai-Chiang Wu ,  Ming-Kai Liu ,  Yen-Ping Wang ,  Shih-Wei Liang ,  Ching-Feng Yang ,  Chia-Chun Miao ,  Hung-Jen Lin

IPC分类号： H01L29/24 ,  H01L23/00 ,  H01L23/31

CPC分类号： H01L24/81 ,  H01L23/3192 ,  H01L24/05 ,  H01L24/11 ,  H01L24/13 ,  H01L24/14 ,  H01L24/16 ,  H01L24/17 ,  H01L2224/0345 ,  H01L2224/03462 ,  H01L2224/03472 ,  H01L2224/03828 ,  H01L2224/0401 ,  H01L2224/05027 ,  H01L2224/0554 ,  H01L2224/05559 ,  H01L2224/05568 ,  H01L2224/05573 ,  H01L2224/05644 ,  H01L2224/05647 ,  H01L2224/05655 ,  H01L2224/05666 ,  H01L2224/05669 ,  H01L2224/11015 ,  H01L2224/1132 ,  H01L2224/11334 ,  H01L2224/1145 ,  H01L2224/1146 ,  H01L2224/1147 ,  H01L2224/1181 ,  H01L2224/11849 ,  H01L2224/119 ,  H01L2224/1308 ,  H01L2224/131 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/13166 ,  H01L2224/13169 ,  H01L2224/1319 ,  H01L2224/14051 ,  H01L2224/14131 ,  H01L2224/14135 ,  H01L2224/14179 ,  H01L2224/14505 ,  H01L2224/1601 ,  H01L2224/16057 ,  H01L2224/16058 ,  H01L2224/16238 ,  H01L2224/17051 ,  H01L2224/17517 ,  H01L2224/81011 ,  H01L2224/81024 ,  H01L2224/81148 ,  H01L2224/81191 ,  H01L2224/81193 ,  H01L2224/814 ,  H01L2224/81815 ,  H01L2924/1305 ,  H01L2924/13091 ,  H01L2924/351 ,  H01L2924/00 ,  H01L2924/00014 ,  H01L2924/207 ,  H01L2924/014 ,  H01L2924/00012

摘要： Embodiments of mechanisms for forming a package structure are provided. The package structure includes a semiconductor die and a substrate. The package structure includes a pillar bump and an elongated solder bump bonded to the semiconductor die and the substrate. A height of the elongated solder bump is substantially equal to a height of the pillar bump. The elongated solder bump has a first width, at a first horizontal plane passing through an upper end of a sidewall surface of the elongated solder bump, and a second width, at a second horizontal plane passing through a midpoint of the sidewall surface. A ratio of the second width to the first width is in a range from about 0.5 to about 1.1.

摘要翻译： 提供了用于形成封装结构的机构的实施例。 封装结构包括半导体管芯和衬底。 封装结构包括柱状凸起和与半导体管芯和衬底结合的细长焊料凸块。 细长焊料凸块的高度基本上等于柱形凸块的高度。 细长的焊料凸块在通过细长焊料凸块的侧壁表面的上端的第一水平面处具有第一宽度，并且在通过侧壁表面的中点的第二水平面处具有第二宽度。 第二宽度与第一宽度的比率在约0.5至约1.1的范围内。