Nonvolatile memory utilizing hot-carrier effect with data reversal function
    1.
    发明申请
    Nonvolatile memory utilizing hot-carrier effect with data reversal function 有权
    使用具有数据反转功能的热载波效应的非易失性存储器

    公开(公告)号:US20080186767A1

    公开(公告)日:2008-08-07

    申请号:US11701958

    申请日:2007-02-02

    IPC分类号: G11C16/06

    CPC分类号: G11C14/00 G11C14/0063

    摘要: A nonvolatile semiconductor memory device includes a control circuit, an inverting circuit, and memory units, each of the memory units including a latch having a first node and a second node, a plate line, a first MIS transistor having one of source/drain nodes coupled to the first node of the latch, another one of the source/drain nodes coupled to the plate line, and a gate node coupled to a word line, and a second MIS transistor having one of source/drain nodes coupled to the second node of the latch, another one of the source/drain nodes coupled to the plate line, and a gate node coupled to the word line, wherein the control circuit is configured to invert the data latched in the latch by reading the data from the latch, causing the inverting circuit to invert the read data, and writing the inverted data to the latch.

    摘要翻译: 非易失性半导体存储器件包括控制电路,反相电路和存储器单元,每个存储器单元包括具有第一节点和第二节点的锁存器,板线,具有源/漏节点之一的第一MIS晶体管 耦合到锁存器的第一节点,耦合到板线的源极/漏极节点中的另一个以及耦合到字线的栅极节点以及耦合到第二节点的源极/漏极节点之一的第二MIS晶体管 耦合到板线的源/漏节点中的另一个和耦合到字线的栅极节点,其中控制电路被配置为通过从锁存器读取数据来反转锁存在锁存器中的数据, 使反相电路反转读取的数据,并将反相数据写入锁存器。

    Nonvolatile memory utilizing MIS memory transistors with function to correct data reversal
    2.
    发明授权
    Nonvolatile memory utilizing MIS memory transistors with function to correct data reversal 有权
    使用MIS存储晶体管的非易失性存储器具有校正数据反转的功能

    公开(公告)号:US07639546B2

    公开(公告)日:2009-12-29

    申请号:US12037414

    申请日:2008-02-26

    IPC分类号: G11C7/00

    摘要: A nonvolatile semiconductor memory device includes a latch circuit having two nodes, a nonvolatile memory cell including two MIS transistors, a bit swapping unit configured to provide straight connections between the two nodes and the two MIS transistors during a first operation mode and to provide cross connections between the two nodes and the two MIS transistors during a second operation mode, and a control circuit configured to cause, in one of the first and second operation modes, the nonvolatile memory cell to store the data latched in the latch circuit as an irreversible change of transistor characteristics occurring in a selected one of the two MIS transistors, and further configured to cause, in another one of the first and second operation modes, the latch circuit to detect the data stored in the nonvolatile memory cell.

    摘要翻译: 非易失性半导体存储器件包括具有两个节点的锁存电路,包括两个MIS晶体管的非易失性存储器单元,配置成在第一操作模式期间在两个节点和两个MIS晶体管之间提供直连接并提供交叉连接 在第二操作模式期间在两个节点和两个MIS晶体管之间,以及控制电路,被配置为在第一和第二操作模式之一中使得非易失性存储单元将锁存在锁存电路中的数据存储为不可逆变化 的晶体管特性出现在所述两个MIS晶体管中的所选择的一个中,并且还被配置为在所述第一和第二操作模式中的另一个中引起所述锁存电路来检测存储在所述非易失性存储单元中的数据。

    Nonvolatile memory utilizing MIS memory transistors capable of multiple store operations
    3.
    发明授权
    Nonvolatile memory utilizing MIS memory transistors capable of multiple store operations 有权
    使用能够进行多个存储操作的MIS存储器晶体管的非易失性存储器

    公开(公告)号:US07518917B2

    公开(公告)日:2009-04-14

    申请号:US11775951

    申请日:2007-07-11

    IPC分类号: G11C11/34

    CPC分类号: G11C14/00 G11C11/412

    摘要: A nonvolatile semiconductor memory device includes a latch configured to store data, a plurality of word lines, a driver configured to activate one of the plurality of word lines, and a plurality of nonvolatile memory cells coupled to the respective word lines, each of the nonvolatile memory cells coupled to the latch so as to exchange stored data with the latch upon activation of a corresponding one of the word lines, each of the nonvolatile memory cells including two MIS transistors and configured to store data as an irreversible change of transistor characteristics occurring in one of the two MIS transistors, wherein the driver includes at least one nonvolatile memory cell storing count data responsive to a number of times storing of data has been performed with respect to the plurality of nonvolatile memory cells, and is configured to activate one of the word lines indicated by the count data.

    摘要翻译: 非易失性半导体存储器件包括:锁存器,被配置为存储数据,多个字线,被配置为激活多个字线中的一个字线的驱动器;以及耦合到各个字线的多个非易失性存储器单元,每个非易失性存储器件 存储器单元耦合到所述锁存器,以便在激活相应的一条字线时与所述锁存器交换存储的数据,所述非易失性存储器单元中的每一个包括两个MIS晶体管,并且被配置为将数据存储为晶体管特性的不可逆变化, 两个MIS晶体管中的一个,其中驱动器包括至少一个非易失性存储单元,其存储响应于多次数据存储的数量的计数数据,并且被配置为激活多个非易失性存储单元中的一个, 字数由计数数据表示。

    Nonvolatile memory utilizing hot-carrier effect with data reversal function
    4.
    发明授权
    Nonvolatile memory utilizing hot-carrier effect with data reversal function 有权
    使用具有数据反转功能的热载波效应的非易失性存储器

    公开(公告)号:US07483290B2

    公开(公告)日:2009-01-27

    申请号:US11701958

    申请日:2007-02-02

    IPC分类号: G11C11/00

    CPC分类号: G11C14/00 G11C14/0063

    摘要: A nonvolatile semiconductor memory device includes a control circuit, an inverting circuit, and memory units, each of the memory units including a latch having a first node and a second node, a plate line, a first MIS transistor having one of source/drain nodes coupled to the first node of the latch, another one of the source/drain nodes coupled to the plate line, and a gate node coupled to a word line, and a second MIS transistor having one of source/drain nodes coupled to the second node of the latch, another one of the source/drain nodes coupled to the plate line, and a gate node coupled to the word line, wherein the control circuit is configured to invert the data latched in the latch by reading the data from the latch, causing the inverting circuit to invert the read data, and writing the inverted data to the latch.

    摘要翻译: 非易失性半导体存储器件包括控制电路,反相电路和存储器单元,每个存储器单元包括具有第一节点和第二节点的锁存器,板线,具有源/漏节点之一的第一MIS晶体管 耦合到锁存器的第一节点,耦合到板线的源极/漏极节点中的另一个以及耦合到字线的栅极节点以及耦合到第二节点的源极/漏极节点之一的第二MIS晶体管 耦合到板线的源/漏节点中的另一个和耦合到字线的栅极节点,其中控制电路被配置为通过从锁存器读取数据来反转锁存在锁存器中的数据, 使反相电路反转读取的数据,并将反相数据写入锁存器。

    ADHESIVE SHEET AND COPPER-CLAD LAMINATE
    7.
    发明申请
    ADHESIVE SHEET AND COPPER-CLAD LAMINATE 有权
    粘合片和铜箔层压板

    公开(公告)号:US20110308725A1

    公开(公告)日:2011-12-22

    申请号:US13221358

    申请日:2011-08-30

    IPC分类号: C09J7/02

    摘要: Disclosed is an adhesive film having high dimensional stability which can be suitably used for two layer FPCs. Specifically, disclosed is an adhesive sheet composed of an insulting layer and an adhesive layer arranged on one side or both sides of the insulating layer. This adhesive sheet is characterized in that the insulating layer has a ratio E′2/E′1 between the storage elasticity modulus E′1 at 25° C. and the storage elasticity modulus E′2 at 380° C. of not more than 0.2 and a coefficient of thermal expansion in the MD direction of 5-15 ppm at 100-200° C. It is further characterized in that the change in the coefficient of thermal expansion of the adhesive sheet at 100-250° C. after heat treatment at 380° C. for 30 second under tension of 20 kg/m is not more than 2.5 ppm in the tension direction and not more than 10 ppm in the direction perpendicular to the tension direction.

    摘要翻译: 公开了一种具有高尺寸稳定性的粘合膜,其可以适用于两层FPC。 具体地,公开了由绝缘层和布置在绝缘层的一侧或两侧上的粘合层构成的粘合片。 该粘合片的特征在于绝缘层在25℃下的储能弹性模量E'1与380℃下的储能弹性模量E'2之间的比率E'2 / E'1不大于 0.2,在100〜200℃下MD方向的热膨胀系数为5〜15ppm。其特征还在于,热处理后的粘合片的热膨胀系数在100〜250℃的变化 在拉伸方向下在380℃,30秒的拉伸下处理30秒,在拉伸方向垂直的方向不大于10ppm。

    SUBSTRATE FOR THIN-FILM PHOTOELECTRIC CONVERSION DEVICE, THIN-FILM PHOTOELECTRIC CONVERSION DEVICE INCLUDING THE SAME, AND METHOD FOR PRODUCING SUBSTRATE FOR THIN-FILM PHOTOELECTRIC CONVERSION DEVICE
    8.
    发明申请
    SUBSTRATE FOR THIN-FILM PHOTOELECTRIC CONVERSION DEVICE, THIN-FILM PHOTOELECTRIC CONVERSION DEVICE INCLUDING THE SAME, AND METHOD FOR PRODUCING SUBSTRATE FOR THIN-FILM PHOTOELECTRIC CONVERSION DEVICE 有权
    薄膜光电转换装置用基板,包括该薄膜光电转换装置的薄膜光电转换装置及其生产用于薄膜光电转换装置的基板的方法

    公开(公告)号:US20110073162A1

    公开(公告)日:2011-03-31

    申请号:US12993467

    申请日:2009-05-15

    摘要: Provided is a substrate for a thin-film photoelectric conversion device which makes it possible to produce the device having improved characteristics at low cost and high productivity. The substrate includes a transparent base member, with a transparent underlying layer and a transparent electrode layer successively stacked on one main surface of the transparent base member. The underlying layer includes transparent insulating fine particles and transparent binder, and the particles are dispersed to cover the one main surface with a coverage factor of particles—ranging from 30% or more to less than 80%. An antireflection layer is provided on the other main surface of the transparent base. The antireflection layer includes transparent insulating fine particles and transparent binder, and the particles are dispersed to cover the other main surface with a coverage factor greater than the underlying layer. The transparent electrode layer contains zinc oxide deposited by low-pressure CVD method.

    摘要翻译: 本发明提供一种薄膜光电转换装置用基板,能够以低成本,高生产率制造具有改善特性的装置。 基板包括透明基底构件,透明基底层和依次层叠在透明基底构件的一个主表面上的透明电极层。 下层包括透明绝缘细颗粒和透明粘合剂,并且颗粒被分散以覆盖一个主表面,其颗粒的覆盖因子范围为30%以上至小于80%。 在透明基材的另一个主表面上设置防反射层。 抗反射层包括透明绝缘细颗粒和透明粘合剂,并且颗粒被分散以覆盖另一个主表面,覆盖因子大于下层。 透明电极层含有通过低压CVD法沉积的氧化锌。

    MIS-transistor-based nonvolatile memory with reliable data retention capability
    9.
    发明授权
    MIS-transistor-based nonvolatile memory with reliable data retention capability 有权
    基于MIS晶体管的非易失性存储器具有可靠的数据保留能力

    公开(公告)号:US07511999B1

    公开(公告)日:2009-03-31

    申请号:US11935458

    申请日:2007-11-06

    申请人: Takashi Kikuchi

    发明人: Takashi Kikuchi

    IPC分类号: G11C14/00

    CPC分类号: G11C14/00

    摘要: A nonvolatile semiconductor memory device includes a nonvolatile memory cell including an odd number of MIS transistor pairs, each of which stores one-bit data by creating an irreversible change of transistor characteristics in one of the two paired MIS transistors, latches equal in number to the odd number of MIS transistor pairs to store the odd number of one-bit data recalled from the MIS transistor pairs, the recalling of the one-bit data of a given MIS transistor pair being performed by sensing a difference in the transistor characteristics between the two paired MIS transistors of the given MIS transistor pair, and a majority decision circuit configured to make a majority decision based on the odd number of one-bit data to determine a bit value of the nonvolatile memory cell.

    摘要翻译: 非易失性半导体存储器件包括非易失性存储器单元,其包括奇数个MIS晶体管对,其中的每一个通过在两个成对的MIS晶体管中的一个中产生晶体管特性的不可逆变化来存储一位数据,数量等于 奇数个MIS晶体管对以存储从MIS晶体管对调用的奇数个1位数据,通过检测两个晶体管特性之间的差异来执行给定MIS晶体管对的一位数据的调用 给定MIS晶体管对的成对的MIS晶体管,以及被配置为基于奇数个1位数据做出多数决定以确定非易失性存储单元的位值的多数决定电路。

    Polyimide Film and Method for Production Thereof
    10.
    发明申请
    Polyimide Film and Method for Production Thereof 审中-公开
    聚酰亚胺膜及其制造方法

    公开(公告)号:US20090011223A1

    公开(公告)日:2009-01-08

    申请号:US12087935

    申请日:2007-01-04

    IPC分类号: B32B27/20

    摘要: Disclosed is a polyimide film which is free from coarse particles caused by aggregation of a filler, therefore, can avoid abnormal electrical discharge during a discharge treatment, repelling during application of an adhesive, and the like. Also disclosed is a method for production of the polyimide film. The method for production of the polyimide film is characterized by using an organic solvent solution containing an inorganic filling material and a first polyamic acid, wherein the organic solvent solution containing the first polyamic acid is prepared by a process comprising the steps of: 1) preparing a dispersion solution which contains the inorganic filling material and a second polyamic acid and has a viscosity of 50 to 500 poises; 2) filtering the dispersion solution; 3) mixing a prepolymer solution containing the first polyamic acid in the process of being polymerized and having a viscosity of 100 poises or lower with the filtered dispersion solution; and 4) increasing the viscosity of the mixed solution to a level ranging from 1000 to 6000 poises.

    摘要翻译: 公开了一种聚酰亚胺膜,其不含由填料聚集引起的粗颗粒,因此可以避免在放电处理期间的异常放电,在施加粘合剂期间的排斥等。 还公开了一种聚酰亚胺薄膜的制造方法。 聚酰亚胺薄膜的制造方法的特征在于,使用含有无机填充材料和第一聚酰胺酸的有机溶剂溶液,其中含有第一聚酰胺酸的有机溶剂溶液是通过以下步骤制备的:1)制备 包含无机填充材料和第二聚酰胺酸并具有50至500泊的粘度的分散溶液; 2)过滤分散液; 3)在聚合过程中混合含有第一聚酰胺酸的预聚物溶液,并用过滤的分散液混合粘度为100泊或更低; 和4)将混合溶液的粘度提高至1000至6000泊。