公开(公告)号：US20100252938A1

公开(公告)日：2010-10-07

申请号：US12751296

申请日：2010-03-31

申请人： Takashi OZAWA ,  Seiji Sato ,  Kazuyuki Izumi

发明人： Takashi OZAWA ,  Seiji Sato ,  Kazuyuki Izumi

IPC分类号： H01L23/48

CPC分类号： H01L21/563 ,  H01L24/16 ,  H01L24/48 ,  H01L25/03 ,  H01L25/0657 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73203 ,  H01L2224/73204 ,  H01L2225/0651 ,  H01L2225/06513 ,  H01L2225/06582 ,  H01L2924/00011 ,  H01L2924/00014 ,  H01L2924/19041 ,  H01L2924/19043 ,  H01L2924/00012 ,  H01L2224/0401 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： A semiconductor package includes: a semiconductor element mounted on a one-sided plane of a wiring board; an underfill agent dropped so as to be filled between the semiconductor element and the wiring board; and a pad group constituted by a plurality of pads which are formed in the vicinity of a circumference of the wiring board and along the circumference, the pad group being formed on a bottom plane of a groove portion formed in a solder resist which covers the one-sided plane of the wiring board, wherein a corner edge of the groove portion located in the vicinity of a dropping starting portion to which dropping of the underfill agent is started is formed at an obtuse angle or in an arc shape in order to avoid the dropped underfill agent from entering into an inner portion of the groove portion.

摘要翻译： 半导体封装包括：安装在布线板的单面平面上的半导体元件; 底部填充剂下降以便填充在半导体元件和布线板之间; 以及由多个焊盘构成的焊盘组，所述焊盘组形成在所述布线板的周边附近并且沿着所述周边，所述焊盘组形成在形成在阻焊剂中的沟槽部的底面上，所述阻焊层覆盖所述一个 其中位于底部填充剂下落的下落起始部分附近的槽部的角部边缘以钝角或弧形形成，以避免 落下的底部填充剂进入凹槽部分的内部。

公开(公告)号：US08575765B2

公开(公告)日：2013-11-05

申请号：US12751296

申请日：2010-03-31

申请人： Takashi Ozawa ,  Seiji Sato ,  Kazuyuki Izumi

发明人： Takashi Ozawa ,  Seiji Sato ,  Kazuyuki Izumi

IPC分类号： H01L29/40 ,  H01L23/495 ,  H01L23/10 ,  H01L21/00

CPC分类号： H01L21/563 ,  H01L24/16 ,  H01L24/48 ,  H01L25/03 ,  H01L25/0657 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/73203 ,  H01L2224/73204 ,  H01L2225/0651 ,  H01L2225/06513 ,  H01L2225/06582 ,  H01L2924/00011 ,  H01L2924/00014 ,  H01L2924/19041 ,  H01L2924/19043 ,  H01L2924/00012 ,  H01L2224/0401 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： A semiconductor package includes: a semiconductor element mounted on a one-sided plane of a wiring board; an underfill agent dropped so as to be filled between the semiconductor element and the wiring board; and a pad group constituted by a plurality of pads which are formed in the vicinity of a circumference of the wiring board and along the circumference, the pad group being formed on a bottom plane of a groove portion formed in a solder resist which covers the one-sided plane of the wiring board, wherein a corner edge of the groove portion located in the vicinity of a dropping starting portion to which dropping of the underfill agent is started is formed at an obtuse angle or in an arc shape in order to avoid the dropped underfill agent from entering into an inner portion of the groove portion.

摘要翻译： 半导体封装包括：安装在布线板的单面平面上的半导体元件; 底部填充剂下降以便填充在半导体元件和布线板之间; 以及由多个焊盘构成的焊盘组，所述焊盘组形成在所述布线板的周边附近并且沿着所述周边，所述焊盘组形成在形成在阻焊剂中的沟槽部的底面上，所述阻焊层覆盖所述一个 其中位于底部填充剂下落的下落起始部分附近的槽部的角部边缘以钝角或弧形形成，以避免 落下的底部填充剂进入凹槽部分的内部。

公开(公告)号：US20080142993A1

公开(公告)日：2008-06-19

申请号：US11957866

申请日：2007-12-17

申请人： Takashi Ozawa ,  Yasushi Araki ,  Masatoshi Nakamura ,  Seiji Sato

发明人： Takashi Ozawa ,  Yasushi Araki ,  Masatoshi Nakamura ,  Seiji Sato

IPC分类号： H01L23/538

CPC分类号： H05K1/111 ,  H01L23/49816 ,  H01L23/49838 ,  H01L2224/0554 ,  H01L2224/0557 ,  H01L2224/05571 ,  H01L2224/05573 ,  H01L2224/05647 ,  H01L2224/10175 ,  H01L2224/814 ,  H01L2924/00014 ,  H05K3/3452 ,  H05K2201/09381 ,  H05K2201/0989 ,  H05K2201/09909 ,  H05K2201/10674 ,  Y02P70/611 ,  H01L2924/014 ,  H01L2224/05599 ,  H01L2224/0555 ,  H01L2224/0556

摘要： It is a flip-chip mounting substrate according to the invention has a wiring pattern in which bonding pads and predetermined parts of lead wires continuously extending from the bonding pads are exposed from an insulating layer or a solder resist. In the flip-chip mounting substrate, exposed parts of the wiring pattern are formed in to a plurality of different shapes. The exposed parts are formed so that the areas of the bonding pads are substantially equal to one another, and that the total areas of predetermined parts of the lead wires continuously extending from the bonding pads are substantially equal to one another.

摘要翻译： 根据本发明的倒装芯片安装基板具有布线图案，其中从焊盘连续延伸的焊盘和引线的预定部分从绝缘层或阻焊剂露出。 在倒装芯片安装基板中，布线图案的露出部分形成为多种不同的形状。 露出的部分形成为使得接合焊盘的面积基本上彼此相等，并且从接合焊盘连续延伸的引线的预定部分的总面积基本相等。

公开(公告)号：US20070145553A1

公开(公告)日：2007-06-28

申请号：US11613753

申请日：2006-12-20

申请人： Yasushi Araki ,  Seiji Sato ,  Masatoshi Nakamura ,  Takashi Ozawa

发明人： Yasushi Araki ,  Seiji Sato ,  Masatoshi Nakamura ,  Takashi Ozawa

IPC分类号： H01L23/02

CPC分类号： H05K3/3452 ,  H01L21/563 ,  H01L23/3171 ,  H01L23/49816 ,  H01L23/49838 ,  H01L24/02 ,  H01L24/11 ,  H01L24/13 ,  H01L24/81 ,  H01L2224/0401 ,  H01L2224/10175 ,  H01L2224/11 ,  H01L2224/1132 ,  H01L2224/13 ,  H01L2224/13099 ,  H01L2224/131 ,  H01L2224/16237 ,  H01L2224/81192 ,  H01L2224/81193 ,  H01L2224/81385 ,  H01L2224/81801 ,  H01L2224/81815 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01033 ,  H01L2924/01079 ,  H01L2924/014 ,  H05K2201/09381 ,  H05K2201/099 ,  H05K2201/10674 ,  H01L2924/00 ,  H01L2924/00014

摘要： A solder resist and a central pad to which a central Au bump provided on a semiconductor chip is flip-chip bonded are formed on a substrate main body. In a flip-chip mounting substrate where an underfill resin is provided after the semiconductor chip is mounted, a central opening portion for exposing the central pad is formed in the solder resist, and also, an edge portion forming the outer peripheral portion of the solder resist is partially overlapped with the outer peripheral portion of the central pad.

摘要翻译： 在衬底主体上形成阻焊剂和设置在半导体芯片上的中心Au凸块倒装芯片接合的中心焊盘。 在安装半导体芯片之后设置底部填充树脂的倒装芯片安装基板中，在阻焊层中形成用于露出中心焊盘的中心开口部分，并且还形成形成焊料外周部分的边缘部分 抗蚀剂部分地与中心焊盘的外周部分重叠。

公开(公告)号：US20070108628A1

公开(公告)日：2007-05-17

申请号：US11560076

申请日：2006-11-15

申请人： Takashi Ozawa ,  Yasushi Araki ,  Masatoshi Nakamura ,  Seiji Sato

发明人： Takashi Ozawa ,  Yasushi Araki ,  Masatoshi Nakamura ,  Seiji Sato

IPC分类号： H01L23/48

CPC分类号： H01L21/563 ,  H01L23/49811 ,  H01L23/49838 ,  H01L2224/73203 ,  H05K3/305 ,  H05K2201/09772 ,  H05K2201/09781 ,  H05K2201/10674 ,  H05K2201/10977 ,  Y02P70/613

摘要： A mounting substrate for mounting a semiconductor chip in a flip chip manner, having a plurality of connection pads to which the semiconductor chip is connected, an insulating pattern formed so as to cover a part of the connection pads, and a plurality of dummy patterns for controlling a flow of an underfill infiltrated below the semiconductor chip, characterized in that the plurality of dummy patterns are arranged in staggered lattice shape.

摘要翻译： 一种用于以倒装芯片方式安装半导体芯片的安装基板，具有连接半导体芯片的多个连接焊盘，形成为覆盖连接焊盘的一部分的绝缘图案，以及多个用于 控制渗透在半导体芯片下方的底部填充物的流动，其特征在于，所述多个虚拟图案以交错的格子形状布置。

公开(公告)号：US08232641B2

公开(公告)日：2012-07-31

申请号：US12782054

申请日：2010-05-18

申请人： Takashi Ozawa ,  Seiji Sato

发明人： Takashi Ozawa ,  Seiji Sato

IPC分类号： H01L23/48 ,  H01L23/52 ,  H01L29/40

CPC分类号： H01L24/17 ,  H01L21/563 ,  H01L23/49838 ,  H01L23/544 ,  H01L24/81 ,  H01L2223/54426 ,  H01L2223/54473 ,  H01L2224/1134 ,  H01L2224/13144 ,  H01L2224/16237 ,  H01L2224/81121 ,  H01L2224/81193 ,  H01L2224/81801 ,  H01L2224/83102 ,  H01L2224/92125 ,  H01L2924/00013 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01033 ,  H01L2924/01079 ,  H01L2924/00014 ,  H01L2224/13099

摘要： A wiring substrate includes: a semiconductor chip on which a plurality of bumps are mounted, and a plurality of connection pads which are joined to the bumps mounted on the semiconductor chip in a flip chip method, wherein the connection pads of a peripheral portion of the wiring substrate are formed in a non-solder mask defined structure, and the connection pads of a center portion of the wiring substrate are formed in a solder mask defined structure.

摘要翻译： 布线基板包括：半导体芯片，其上安装有多个凸块;以及多个连接焊盘，其以倒装芯片方法接合到安装在半导体芯片上的凸块，其中，连接焊盘的周边部分 布线基板形成为非阻焊掩模限定结构，并且布线基板的中心部分的连接焊盘形成为焊料掩模限定结构。

公开(公告)号：US07901997B2

公开(公告)日：2011-03-08

申请号：US12021664

申请日：2008-01-29

申请人： Takashi Ozawa ,  Seiji Sato ,  Masao Nakazawa ,  Mitsuyoshi Imai ,  Masatoshi Nakamura ,  Kei Imafuji

发明人： Takashi Ozawa ,  Seiji Sato ,  Masao Nakazawa ,  Mitsuyoshi Imai ,  Masatoshi Nakamura ,  Kei Imafuji

IPC分类号： H01L21/00

CPC分类号： H01L24/32 ,  H01L21/4853 ,  H01L21/563 ,  H01L24/16 ,  H01L24/81 ,  H01L2224/0554 ,  H01L2224/05568 ,  H01L2224/05573 ,  H01L2224/1146 ,  H01L2224/13099 ,  H01L2224/16225 ,  H01L2224/16235 ,  H01L2224/27013 ,  H01L2224/29111 ,  H01L2224/2919 ,  H01L2224/32225 ,  H01L2224/73203 ,  H01L2224/73204 ,  H01L2224/81026 ,  H01L2224/81191 ,  H01L2224/8121 ,  H01L2224/814 ,  H01L2224/81815 ,  H01L2224/83051 ,  H01L2924/00014 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01075 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/0132 ,  H01L2924/0133 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/1579 ,  H05K3/3436 ,  H05K3/3473 ,  H05K2201/10674 ,  H05K2203/043 ,  H05K2203/0475 ,  Y02P70/613 ,  H01L2924/00012 ,  H01L2224/05599 ,  H01L2224/0555 ,  H01L2224/0556

摘要： A solder 14 is formed, by a plating method, on a connecting surface 21A and a side surface 21B in a connecting pad 21 of a wiring board 11 which is opposed to a metal bump 13 formed on an electrode pad 31 of a semiconductor chip 12, and subsequently, the solder 14 is molten to form an accumulated solder 15 taking a convex shape on the connecting surface 21A of the connecting pad 21 and the metal bump 13 is then mounted on the connecting surface 21A of the connecting pad 21 on which the accumulated solder is formed, and the accumulated solder 15 and the metal bump 13 are thus bonded to each other.

摘要翻译： 在布线基板11的与半导体芯片12的电极焊盘31上形成的金属凸块13相对的连接焊盘21的连接面21A和侧面21B上，通过电镀法形成焊锡14 随后，焊料14熔化，形成在连接焊盘21的连接面21A上呈凸形的积聚焊料15，然后将金属凸块13安装在连接焊盘21的连接面21A上， 形成积累的焊料，并且积累的焊料15和金属凸块13因此彼此结合。

公开(公告)号：US07884482B2

公开(公告)日：2011-02-08

申请号：US11957866

申请日：2007-12-17

申请人： Takashi Ozawa ,  Yasushi Araki ,  Masatoshi Nakamura ,  Seiji Sato

发明人： Takashi Ozawa ,  Yasushi Araki ,  Masatoshi Nakamura ,  Seiji Sato

IPC分类号： H01L23/48 ,  H01L23/52

CPC分类号： H05K1/111 ,  H01L23/49816 ,  H01L23/49838 ,  H01L2224/0554 ,  H01L2224/0557 ,  H01L2224/05571 ,  H01L2224/05573 ,  H01L2224/05647 ,  H01L2224/10175 ,  H01L2224/814 ,  H01L2924/00014 ,  H05K3/3452 ,  H05K2201/09381 ,  H05K2201/0989 ,  H05K2201/09909 ,  H05K2201/10674 ,  Y02P70/611 ,  H01L2924/014 ,  H01L2224/05599 ,  H01L2224/0555 ,  H01L2224/0556

摘要： It is a flip-chip mounting substrate according to the invention has a wiring pattern in which bonding pads and predetermined parts of lead wires continuously extending from the bonding pads are exposed from an insulating layer or a solder resist. In the flip-chip mounting substrate, exposed parts of the wiring pattern are formed in to a plurality of different shapes. The exposed parts are formed so that the areas of the bonding pads are substantially equal to one another, and that the total areas of predetermined parts of the lead wires continuously extending from the bonding pads are substantially equal to one another.

摘要翻译： 根据本发明的倒装芯片安装基板具有布线图案，其中从焊盘连续延伸的焊盘和引线的预定部分从绝缘层或阻焊剂露出。 在倒装芯片安装基板中，布线图案的露出部分形成为多种不同的形状。 露出的部分形成为使得接合焊盘的面积基本上彼此相等，并且从接合焊盘连续延伸的引线的预定部分的总面积基本相等。

公开(公告)号：US07847417B2

公开(公告)日：2010-12-07

申请号：US11613753

申请日：2006-12-20

申请人： Yasushi Araki ,  Seiji Sato ,  Masatoshi Nakamura ,  Takashi Ozawa

发明人： Yasushi Araki ,  Seiji Sato ,  Masatoshi Nakamura ,  Takashi Ozawa

IPC分类号： H01L23/02

CPC分类号： H05K3/3452 ,  H01L21/563 ,  H01L23/3171 ,  H01L23/49816 ,  H01L23/49838 ,  H01L24/02 ,  H01L24/11 ,  H01L24/13 ,  H01L24/81 ,  H01L2224/0401 ,  H01L2224/10175 ,  H01L2224/11 ,  H01L2224/1132 ,  H01L2224/13 ,  H01L2224/13099 ,  H01L2224/131 ,  H01L2224/16237 ,  H01L2224/81192 ,  H01L2224/81193 ,  H01L2224/81385 ,  H01L2224/81801 ,  H01L2224/81815 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01033 ,  H01L2924/01079 ,  H01L2924/014 ,  H05K2201/09381 ,  H05K2201/099 ,  H05K2201/10674 ,  H01L2924/00 ,  H01L2924/00014

摘要： A solder resist and a central pad to which a central Au bump provided on a semiconductor chip is flip-chip bonded are formed on a substrate main body. In a flip-chip mounting substrate where an underfill resin is provided after the semiconductor chip is mounted, a central opening portion for exposing the central pad is formed in the solder resist, and also, an edge portion forming the central opening portion of the solder resist is partially overlapped with the outer peripheral portion of the central pad.

摘要翻译： 在衬底主体上形成阻焊剂和设置在半导体芯片上的中心Au凸块倒装芯片接合的中心焊盘。 在安装半导体芯片之后设置底部填充树脂的倒装芯片安装基板中，在阻焊层中形成用于暴露中心焊盘的中心开口部分，并且还形成形成焊料的中心开口部分的边缘部分 抗蚀剂部分地与中心焊盘的外周部分重叠。

公开(公告)号：US20100295174A1

公开(公告)日：2010-11-25

申请号：US12782054

申请日：2010-05-18

申请人： Takashi Ozawa ,  Seiji Sato

发明人： Takashi Ozawa ,  Seiji Sato

IPC分类号： H01L23/485

CPC分类号： H01L24/17 ,  H01L21/563 ,  H01L23/49838 ,  H01L23/544 ,  H01L24/81 ,  H01L2223/54426 ,  H01L2223/54473 ,  H01L2224/1134 ,  H01L2224/13144 ,  H01L2224/16237 ,  H01L2224/81121 ,  H01L2224/81193 ,  H01L2224/81801 ,  H01L2224/83102 ,  H01L2224/92125 ,  H01L2924/00013 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01033 ,  H01L2924/01079 ,  H01L2924/00014 ,  H01L2224/13099

摘要： A wiring substrate includes: a semiconductor chip on which a plurality of bumps are mounted, and a plurality of connection pads which are joined to the bumps mounted on the semiconductor chip in a flip chip method, wherein the connection pads of a peripheral portion of the wiring substrate are formed in a non-solder mask defined structure, and the connection pads of a center portion of the wiring substrate are formed in a solder mask defined structure.

摘要翻译： 布线基板包括：半导体芯片，其上安装有多个凸块;以及多个连接焊盘，其以倒装芯片方法接合到安装在半导体芯片上的凸块，其中，连接焊盘的周边部分 布线基板形成为非阻焊掩模限定结构，并且布线基板的中心部分的连接焊盘形成为焊料掩模限定结构。