公开(公告)号：US06692987B2

公开(公告)日：2004-02-17

申请号：US10068165

申请日：2002-02-05

申请人： Thiam Chye Lim ,  Kay Kit Tan ,  Kian Chai Lee ,  Victor Cher Khng Tan ,  Kwang Hong Tan ,  Chong Pei Andrew Lim ,  Yong Kian Tan ,  Teck Kheng Lee ,  Sian Yong Khoo ,  Yoke Kuin Tang

发明人： Thiam Chye Lim ,  Kay Kit Tan ,  Kian Chai Lee ,  Victor Cher Khng Tan ,  Kwang Hong Tan ,  Chong Pei Andrew Lim ,  Yong Kian Tan ,  Teck Kheng Lee ,  Sian Yong Khoo ,  Yoke Kuin Tang

IPC分类号： H01L2144

CPC分类号： H01L29/0657 ,  H01L23/3128 ,  H01L23/49816 ,  H01L24/06 ,  H01L24/48 ,  H01L24/49 ,  H01L25/0657 ,  H01L2224/05553 ,  H01L2224/05554 ,  H01L2224/05599 ,  H01L2224/05624 ,  H01L2224/05647 ,  H01L2224/06136 ,  H01L2224/2919 ,  H01L2224/32145 ,  H01L2224/32225 ,  H01L2224/45099 ,  H01L2224/48091 ,  H01L2224/4824 ,  H01L2224/49175 ,  H01L2224/73215 ,  H01L2224/85424 ,  H01L2224/8547 ,  H01L2225/0651 ,  H01L2225/06517 ,  H01L2225/06555 ,  H01L2225/06575 ,  H01L2225/06586 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01074 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/0665 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45015 ,  H01L2924/207

摘要： Semiconductor die units for forming BOC BGA packages, methods of encapsulating a semiconductor die unit, a mold for use in the method, and resulting encapsulated packages are provided. In particular, the invention provides a semiconductor die unit comprising an integrated circuit die with a plurality of bond pads in an I-shaped layout and an overlying support substrate having an I-shaped wire bond slot.

公开(公告)号：US06720666B2

公开(公告)日：2004-04-13

申请号：US10408972

申请日：2003-04-08

申请人： Thiam Chye Lim ,  Kay Kit Tan ,  Kian Chai Lee ,  Victor Cher Khng Tan ,  Kwang Hong Tan ,  Chong Pei Andrew Lim ,  Yong Kian Tan ,  Teck Kheng Lee ,  Sian Yong Khoo ,  Yoke Kuin Tang

发明人： Thiam Chye Lim ,  Kay Kit Tan ,  Kian Chai Lee ,  Victor Cher Khng Tan ,  Kwang Hong Tan ,  Chong Pei Andrew Lim ,  Yong Kian Tan ,  Teck Kheng Lee ,  Sian Yong Khoo ,  Yoke Kuin Tang

IPC分类号： H01L2348

CPC分类号： H01L21/565 ,  H01L23/3128 ,  H01L23/50 ,  H01L24/02 ,  H01L24/06 ,  H01L24/48 ,  H01L2224/05554 ,  H01L2224/05599 ,  H01L2224/05624 ,  H01L2224/05647 ,  H01L2224/06136 ,  H01L2224/32225 ,  H01L2224/45099 ,  H01L2224/4824 ,  H01L2224/73215 ,  H01L2224/85424 ,  H01L2224/8547 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/18165 ,  H01L2924/00012 ,  H01L2224/45015 ,  H01L2924/207

摘要： Semiconductor die units for forming BOC BGA packages, methods of encapsulating a semiconductor die unit, a mold for use in the method, and resulting encapsulated packages are provided. In particular, the invention provides a semiconductor die unit comprising an integrated circuit die with a plurality of bond pads in an I-shaped layout and an overlying support substrate having an I-shaped wire bond slot.

摘要翻译： 提供用于形成BOC BGA封装的半导体管芯单元，封装半导体管芯单元的方法，用于该方法的模具以及所得到的封装封装。 特别地，本发明提供了一种半导体管芯单元，其包括具有I形布置的多个接合焊盘的集成电路管芯和具有I形引线接合槽的上覆的支撑衬底。

公开(公告)号：US07112048B2

公开(公告)日：2006-09-26

申请号：US10408990

申请日：2003-04-08

申请人： Thiam Chye Lim ,  Kay Kit Tan ,  Kian Chai Lee ,  Victor Cher Khng Tan ,  Kwang Hong Tan ,  Chong Pei Andrew Lim ,  Yong Kian Tan ,  Teck Kheng Lee ,  Sian Yong Khoo ,  Yoke Kuin Tang

发明人： Thiam Chye Lim ,  Kay Kit Tan ,  Kian Chai Lee ,  Victor Cher Khng Tan ,  Kwang Hong Tan ,  Chong Pei Andrew Lim ,  Yong Kian Tan ,  Teck Kheng Lee ,  Sian Yong Khoo ,  Yoke Kuin Tang

IPC分类号： B29C45/14 ,  H01L21/56

CPC分类号： H01L21/565 ,  H01L23/3128 ,  H01L23/50 ,  H01L24/02 ,  H01L24/06 ,  H01L24/48 ,  H01L2224/05554 ,  H01L2224/05599 ,  H01L2224/05624 ,  H01L2224/05647 ,  H01L2224/06136 ,  H01L2224/32225 ,  H01L2224/45099 ,  H01L2224/4824 ,  H01L2224/73215 ,  H01L2224/85424 ,  H01L2224/8547 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/18165 ,  H01L2924/00012 ,  H01L2224/45015 ,  H01L2924/207

摘要： Semiconductor die units for forming BOC BGA packages, methods of encapsulating a semiconductor die unit, a mold for use in the method, and resulting encapsulated packages are provided. In particular, the invention provides a semiconductor die unit comprising an integrated circuit die with a plurality of bond pads in an I-shaped layout and an overlying support substrate having an I-shaped wire bond slot.

公开(公告)号：US07320933B2

公开(公告)日：2008-01-22

申请号：US10829778

申请日：2004-04-22

申请人： Teck Kheng Lee ,  Kian Chai Lee ,  Sian Yong Khoo

发明人： Teck Kheng Lee ,  Kian Chai Lee ,  Sian Yong Khoo

IPC分类号： H01L21/44

CPC分类号： H05K3/4007 ,  H01L21/4853 ,  H01L21/486 ,  H01L23/49827 ,  H01L24/97 ,  H01L2224/05571 ,  H01L2224/05573 ,  H01L2224/16225 ,  H01L2224/16237 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2224/97 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01013 ,  H01L2924/01024 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01322 ,  H01L2924/12041 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/181 ,  H05K3/243 ,  H05K2201/0367 ,  H05K2201/0394 ,  H05K2201/10378 ,  H05K2203/1572 ,  H01L2224/81 ,  H01L2924/00 ,  H01L2224/05599

摘要： An apparatus and method for improving the yield and reducing the cost of forming a semiconductor device assembly. An interposer substrate is formed with interconnections in the form of conductive bumps on both a first surface and a second surface to provide a respective first level interconnect and a second level interconnect for a semiconductor die to be mounted to the interposer substrate. The conductive bumps and conductive elements may be formed simultaneously by a plating process. The conductive bumps on the first surface are arranged to correspond with bond pads of a semiconductor die for the first level interconnect. The conductive bumps on the second surface are configured to correspond with a terminal pad pattern of a carrier substrate or other higher-level packaging.

摘要翻译： 一种用于提高成品率并降低形成半导体器件组件的成本的装置和方法。 在第一表面和第二表面上形成呈导电凸块形式的互连的插入物基板，以提供相应的第一级互连和用于半导体管芯的第二级互连以安装到插入器基板。 导电凸块和导电元件可以通过电镀工艺同时形成。 第一表面上的导电凸块布置成对应于用于第一级互连的半导体管芯的接合焊盘。 第二表面上的导电凸块被配置为对应于载体衬底或其它较高级别封装的端子衬垫图案。

公开(公告)号：US08084846B2

公开(公告)日：2011-12-27

申请号：US11606497

申请日：2006-11-29

申请人： Teck Kheng Lee ,  Kian Chai Lee ,  Vanessa Chong Hui Van

发明人： Teck Kheng Lee ,  Kian Chai Lee ,  Vanessa Chong Hui Van

IPC分类号： H01L23/34

CPC分类号： H01L23/49575 ,  H01L23/4951 ,  H01L24/48 ,  H01L24/49 ,  H01L2224/05554 ,  H01L2224/32014 ,  H01L2224/32245 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/48257 ,  H01L2224/4826 ,  H01L2224/49171 ,  H01L2224/73215 ,  H01L2225/06562 ,  H01L2924/00014 ,  H01L2924/01033 ,  H01L2924/01082 ,  H01L2924/181 ,  H01L2924/351 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/05599 ,  H01L2924/00012

摘要： A semiconductor device assembly or package includes at least one semiconductor device that is positioned adjacent to floating leads. Such an assembly or package may include at least two semiconductor devices that face opposite directions from one another, with each being oriented such that bond pads thereof are at an opposite side of the assembly or package from bond pads of the other. Alternatively, an assembly or package may include a lead assembly with an internal portion, including one or more floating leads, and an external portion that are in planes that are offset relative to one another. Methods for designing lead frames, assemblies, and packages are also disclosed, as are assembly and packaging methods.

摘要翻译： 半导体器件组件或封装包括至少一个位于与浮动引线相邻的半导体器件。 这样的组件或封装可以包括彼此面对相反方向的至少两个半导体器件，每个半导体器件的取向使得其接合焊盘与组件或封装的另一侧的焊盘相对。 或者，组件或封装可以包括具有内部部分的引线组件，所述内部部分包括一个或多个浮动引线，以及位于相对于彼此偏移的平面中的外部部分。 还公开了用于设计引线框架，组件和封装件的方法，组装和封装方法也是如此。

公开(公告)号：US06583502B2

公开(公告)日：2003-06-24

申请号：US09874671

申请日：2001-06-05

申请人： Teck Kheng Lee ,  Kian Chai Lee

发明人： Teck Kheng Lee ,  Kian Chai Lee

IPC分类号： H01L2972

CPC分类号： H01L25/0652 ,  H01L25/0657 ,  H01L2224/06136 ,  H01L2224/48091 ,  H01L2224/4824 ,  H01L2924/01079 ,  H01L2924/01087 ,  H01L2924/09701 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/15321 ,  H01L2924/15331 ,  H01L2924/00014

摘要： A method and apparatus for assembling semiconductor die-carrying interposer substrates in a stacked configuration. Each interposer substrate bears at least one die mounted by its active surface to a surface of the substrate and wire bonded to terminals on the opposing substrate surface through an opening in the substrate. Two interposer substrates are placed together with die carrying sides outward and electrically connected with conductive elements extending transversely therebetween to form an interposer assembly, the interposer assembly bearing conductive elements extending transversely from one of the interposer substrates for connection to a carrier substrate. The space between the interposer substrates may be filled with a dielectric underfill material, as may the space between the interposer assembly and the carrier substrate to which the former is mounted.

摘要翻译： 一种用于组装堆叠构造的半导体管芯承载插入器基板的方法和装置。 每个插入器基板承载至少一个通过其有源表面安装的裸片到内插器基板的表面，并且通过插入器基板中的开口将线连接到相对的基板表面上的端子。 两个插入器基板被放置在一起，其中带有芯片的载体侧面并与其横向延伸的导电元件电连接以形成插入件组件，所述插入件组件承载导电元件，其横向于从插入器基板中的一个延伸以连接到载体基板。 插入器基板之间的空间可以用电介质底部填充材料填充，中间层组件和前者所安装的载体基板之间的空间也可以。

公开(公告)号：US20080122072A1

公开(公告)日：2008-05-29

申请号：US11606497

申请日：2006-11-29

申请人： Teck Kheng Lee ,  Kian Chai Lee ,  Vanessa Chong Hui Van

发明人： Teck Kheng Lee ,  Kian Chai Lee ,  Vanessa Chong Hui Van

IPC分类号： H01L23/34

CPC分类号： H01L23/49575 ,  H01L23/4951 ,  H01L24/48 ,  H01L24/49 ,  H01L2224/05554 ,  H01L2224/32014 ,  H01L2224/32245 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/48257 ,  H01L2224/4826 ,  H01L2224/49171 ,  H01L2224/73215 ,  H01L2225/06562 ,  H01L2924/00014 ,  H01L2924/01033 ,  H01L2924/01082 ,  H01L2924/181 ,  H01L2924/351 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/05599 ,  H01L2924/00012

摘要： A semiconductor device assembly or package includes at least one semiconductor device that is positioned adjacent to floating leads. Such an assembly or package may include at least two semiconductor devices that face opposite directions from one another, with each being oriented such that bond pads thereof are at an opposite side of the assembly from bond pads of the other. Alternatively, an assembly or package may include a lead assembly with an internal portion, including one or more floating leads, and an external portion that are in planes that are offset relative to one another. Methods for designing lead frames, assemblies, and packages are also disclosed, as are assembly and packaging methods.

摘要翻译： 半导体器件组件或封装包括至少一个位于与浮动引线相邻的半导体器件。 这样的组件或封装可以包括彼此面对相反方向的至少两个半导体器件，每个半导体器件的取向使得它们的接合焊盘位于与另一个的焊盘相对的组件的相反侧。 或者，组件或封装可以包括具有内部部分的引线组件，所述内部部分包括一个或多个浮动引线，以及位于相对于彼此偏移的平面中的外部部分。 还公开了用于设计引线框架，组件和封装件的方法，组装和封装方法也是如此。

公开(公告)号：US06787917B2

公开(公告)日：2004-09-07

申请号：US10387036

申请日：2003-03-12

申请人： Teck Kheng Lee ,  Kian Chai Lee

发明人： Teck Kheng Lee ,  Kian Chai Lee

IPC分类号： H01L2348

CPC分类号： H01L25/0652 ,  H01L25/0657 ,  H01L2224/06136 ,  H01L2224/48091 ,  H01L2224/4824 ,  H01L2924/01079 ,  H01L2924/01087 ,  H01L2924/09701 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/15321 ,  H01L2924/15331 ,  H01L2924/00014

摘要： An electronic device package having semiconductor die-carrying interposer substrates in a stacked configuration. Each interposer substrate bears at least one die mounted by its active surface to a surface of the interposer substrate and wire bonded to terminals on the opposing substrate surface through an opening in the interposer substrate. Two interposer substrates are placed together with die-carrying sides outward and electrically connected with conductive elements extending transversely therebetween to form an interposer assembly, the interposer assembly bearing conductive elements extending transversely from one of the interposer substrates for connection to a carrier substrate. The space between the interposer substrates may be filled with a dielectric underfill material, as may the space between the interposer assembly and the carrier substrate to which the former is mounted.

摘要翻译： 一种具有层叠结构的半导体管芯承载插入物基板的电子器件封装。 每个插入器基板承载至少一个通过其有源表面安装的裸片到内插器基板的表面，并且通过插入器基板中的开口将线连接到相对的基板表面上的端子。 两个插入器基板被放置在一起，其中带有芯片的载体侧面并与其横向延伸的导电元件电连接以形成插入件组件，所述插入件组件承载导电元件，其横向于从插入器基板中的一个延伸以连接到载体基板。 插入器基板之间的空间可以用电介质底部填充材料填充，中间层组件和前者所安装的载体基板之间的空间也可以。

公开(公告)号：US07915718B2

公开(公告)日：2011-03-29

申请号：US10150892

申请日：2002-05-17

申请人： Teck Kheng Lee ,  Wuu Yean Tay ,  Kian Chai Lee

发明人： Teck Kheng Lee ,  Wuu Yean Tay ,  Kian Chai Lee

IPC分类号： H01L23/495 ,  H01L29/40

CPC分类号： H01L23/5383 ,  H01L21/563 ,  H01L23/13 ,  H01L23/50 ,  H01L23/5387 ,  H01L2224/05571 ,  H01L2224/05573 ,  H01L2224/16225 ,  H01L2224/16237 ,  H01L2224/26175 ,  H01L2224/32225 ,  H01L2224/73203 ,  H01L2224/73204 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01087 ,  H01L2924/01322 ,  H01L2924/15311 ,  H01L2924/1532 ,  H01L2924/00

摘要： A method and apparatus for increasing the integrated circuit density in a flip-chip semiconductor device assembly including an interposer substrate facilitating use with various semiconductor die conductive bump arrangements. The interposer substrate includes a plurality of recesses formed in at least one of a first surface and a second surface thereof, wherein the recesses are arranged in a plurality of recess patterns. The interposer substrate also provides enhanced accessibility for test probes for electrical testing of the resulting flip-chip semiconductor device assembly.

摘要翻译： 一种用于增加倒装芯片半导体器件组件中的集成电路密度的方法和装置，其包括便于与各种半导体管芯导电凸块布置使用的插入器衬底。 插入器基板包括形成在其第一表面和第二表面中的至少一个中的多个凹部，其中凹部被布置成多个凹部图案。 插入器基板还为所得到的倒装芯片半导体器件组件的电测试提供用于测试探针的增强的可访问性。

公开(公告)号：US07005316B2

公开(公告)日：2006-02-28

申请号：US10335385

申请日：2002-12-31

申请人： Teck Kheng Lee ,  Kian Chai Lee

发明人： Teck Kheng Lee ,  Kian Chai Lee

IPC分类号： H01L21/44

CPC分类号： H01L25/0652 ,  H01L25/0657 ,  H01L2224/06136 ,  H01L2224/48091 ,  H01L2224/4824 ,  H01L2924/01079 ,  H01L2924/01087 ,  H01L2924/09701 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/15321 ,  H01L2924/15331 ,  H01L2924/00014

摘要： A method and apparatus for assembling semiconductor die-carrying interposer substrates in a stacked configuration. Each interposer substrate bears at least one die mounted by its active surface to a surface of the interposer substrate and wire bonded to terminals on the opposing substrate surface through an opening in the interposer substrate. Two interposer substrates are placed together with die-carrying sides outward and electrically connected with conductive elements extending transversely therebetween to form an interposer assembly, the interposer assembly bearing conductive elements extending transversely from one of the interposer substrates for connection to a carrier substrate. The space between the interposer substrates may be filled with a dielectric underfill material, as may the space between the interposer assembly and the carrier substrate to which the former is mounted.

摘要翻译： 一种用于组装堆叠构造的半导体管芯承载插入器基板的方法和装置。 每个插入器基板承载至少一个通过其有源表面安装的裸片到内插器基板的表面，并且通过插入器基板中的开口将线连接到相对的基板表面上的端子。 两个插入器基板被放置在一起，其中带有芯片的载体侧面并与其横向延伸的导电元件电连接以形成插入件组件，所述插入件组件承载导电元件，其横向于从插入器基板中的一个延伸以连接到载体基板。 插入器基板之间的空间可以用电介质底部填充材料填充，中间层组件和前者所安装的载体基板之间的空间也可以。