公开(公告)号：US20220359718A1

公开(公告)日：2022-11-10

申请号：US17721551

申请日：2022-04-15

Applicant: Tokyo Electron Limited

Inventor： Yun HAN ,  Eric Chih-Fang LIU ,  Kai-Hung YU ,  Shihsheng CHANG ,  Alok RANJAN

IPC: H01L29/66 ,  H01L29/40 ,  H01L21/311

Abstract: A method including providing a substrate including metal gate stacks and source/drain contact regions in alternating arrangement along a surface of the substrate, each of the source/drain contact regions being recessed within a respective opening between adjacent metal gate stacks such that source/drain contact regions provide a bottom of the opening and adjacent metal gate stacks provide sidewalls, and a dielectric covering the substrate such that the dielectric fills each opening. The substrate is exposed to an initial plasma etch process to remove a first portion of the dielectric from each opening down to a first depth, and a sacrificial gate capping layer is formed on the substrate while leaving each of the openings uncovered. The substrate is exposed to another plasma etch process to remove the sacrificial gate capping layer while removing a second portion of the dielectric from each opening down to a second depth.

公开(公告)号：US20240049379A1

公开(公告)日：2024-02-08

申请号：US18382062

申请日：2023-10-20

Applicant: Tokyo Electron Limited

Inventor： Yohei YAMAZAWA ,  Takehisa SAITO ,  Mayo UDA ,  Keigo TOYODA ,  Alok RANJAN ,  Toshiki NAKAJIMA

IPC: H05H1/46 ,  H01J37/32 ,  H01L21/67

CPC classification number: H05H1/46 ,  H01J37/32495 ,  H01L21/67069 ,  H01J37/3211 ,  H01J37/3244 ,  H05H1/4652

Abstract: A plasma processing apparatus includes an antenna configured to generate plasma of a processing gas in a chamber. The antenna includes: an inner coil provided around the gas supply unit to surround a gas supply unit; and an outer coil provided around the gas supply unit and the inner coil to surround them. The outer coil is configured such that both ends of a wire forming the outer coil are opened; power is supplied from a power supply unit to a central point of the wire; the vicinity of the central point of the wire is grounded; and the outer coil resonates at a wavelength that is a half of a wavelength of the high frequency power. The inner coil is configured such that both ends of a wire forming the inner coil are connected through a capacitor and the inner coil is inductively coupled with the inner coil.

公开(公告)号：US20190098740A1

公开(公告)日：2019-03-28

申请号：US16144714

申请日：2018-09-27

Applicant: TOKYO ELECTRON LIMITED

Inventor： Yohei YAMAZAWA ,  Takehisa SAITO ,  Mayo UDA ,  Keigo TOYODA ,  Alok RANJAN ,  Toshiki NAKAJIMA

IPC: H05H1/46 ,  H05H1/24 ,  H01J37/305 ,  H01J37/32 ,  H01L21/67

Abstract: A plasma processing apparatus includes an antenna configured to generate plasma of a processing gas in a chamber. The antenna includes: an inner coil provided around the gas supply unit to surround a gas supply unit; and an outer coil provided around the gas supply unit and the inner coil to surround them. The outer coil is configured such that both ends of a wire forming the outer coil are opened; power is supplied from a power supply unit to a central point of the wire; the vicinity of the central point of the wire is grounded; and the outer coil resonates at a wavelength that is a half of a wavelength of the high frequency power. The inner coil is configured such that both ends of a wire forming the inner coil are connected through a capacitor and the inner coil is inductively coupled with the inner coil.

公开(公告)号：US20220406580A1

公开(公告)日：2022-12-22

申请号：US17350439

申请日：2021-06-17

Applicant: Tokyo Electron Limited

Inventor： Jun SHINAGAWA ,  Toshihiro KITAO ,  Atsushi SUZUKI ,  Megan WOOLEY ,  Alok RANJAN

IPC: H01J37/32 ,  G06F30/398

Abstract: A method of optimizing a recipe for a plasma process includes (a) building a virtual metrology (VM) model that predicts a wafer characteristic resulting from the plasma process based on a plasma parameter and (b) building a control model that describes a relationship between the plasma parameter and a recipe parameter. (c) The wafer characteristic is measured after performing the plasma process according to the recipe. (d) Whether the wafer characteristic is within a predetermined range is determined. (e) The VM model and the control model are calibrated based on the wafer characteristic. (f) The recipe is optimized by updating the plasma parameter based on the wafer characteristic using the VM model and updating the recipe parameter based on the plasma parameter using the control model. (c), (d), (e) and (f) are repeated until the wafer characteristic is within the predetermined range.

公开(公告)号：US20160027620A1

公开(公告)日：2016-01-28

申请号：US14807319

申请日：2015-07-23

Applicant: TOKYO ELECTRON LIMITED

Inventor： Jason MARION ,  Sonam SHERPA ,  Sergey A. VORONIN ,  Alok RANJAN ,  Yoshio ISHIKAWA ,  Takashi ENOMOTO

IPC: H01J37/32

CPC classification number: H01J37/32697 ,  H01J37/32422 ,  H01J37/32706 ,  H01J37/32715 ,  H01L21/6833

Abstract: A plasma processing method and apparatus are provided in which current spikes associated with application of a voltage to an electrostatic chuck (ESC) are minimized or reduced when the processing plasma is present. According to an example, the voltage is applied to the ESC after the processing plasma is struck, however the voltage is ramped or increased in a step-wise manner to achieve the desired final ESC voltage. In an alternate embodiment, the ESC voltage is at least partially applied before striking of the plasma for processing the wafer. By reducing current spikes associated with application of the voltage to the ESC during the presence of the processing plasma, transfer or deposition of particles on the wafer can be reduced.

Abstract translation: 提供了一种等离子体处理方法和装置，其中当存在处理等离子体时，使与静电卡盘（ESC）的电压施加相关联的电流尖峰被最小化或减小。 根据一个例子，在处理等离子体被击打之后，电压被施加到ESC，然而电压以逐步方式倾斜或增加以达到期望的最终ESC电压。 在替代实施例中，ESC电压至少部分地施加在等离子体撞击之前用于处理晶片。 通过在处理等离子体的存在期间减少与电压施加相关联的电流尖峰，可以减少颗粒在晶片上的转移或沉积。

公开(公告)号：US20230352282A1

公开(公告)日：2023-11-02

申请号：US17730751

申请日：2022-04-27

Applicant: Tokyo Electron Limited

Inventor： Jun SHINAGAWA ,  Toshihiro KITAO ,  Chungjong LEE ,  Masaki KITSUNEZUKA ,  Alok RANJAN

IPC: H01J37/32 ,  H01L21/311

CPC classification number: H01J37/32963 ,  H01J37/32926 ,  H01J37/32972 ,  H01L21/31116 ,  H01J2237/334

Abstract: A method of operating a plasma tool includes executing a plasma process on a wafer. Data associated with the plasma process are measured using a plurality of sensors while the plasma process is executed on the wafer. The plasma process is terminated at an endpoint time. A post-process fault detection is executed by determining whether a post-process wafer state is within a target range. When the post-process wafer state is outside the target range so that a fault is detected, the fault is corrected using the data associated with the plasma process.

公开(公告)号：US20220344162A1

公开(公告)日：2022-10-27

申请号：US17721014

申请日：2022-04-14

Applicant: TOKYO ELECTRON LIMITED

Inventor： Yun HAN ,  Alok RANJAN ,  Peter VENTZEK ,  Andrew METZ ,  Hiroaki NIIMI

IPC: H01L21/285 ,  H01L21/02 ,  H01L29/45 ,  H01L29/78 ,  H01L29/66

Abstract: A method for manufacturing a FET semiconductor structure includes providing a substrate comprising at least one source/drain contact of at least one FET, the at least one source/drain contact formed adjacent to a dummy gate of the at least one FET. A TiSi2 film with C54 structure is selectively deposited directly on and fully covering the at least one source/drain contact relative to a vertical sidewall of a gate spacer between the at least one source/drain contact and the dummy gate. The dummy gate is replaced with a replacement metal gate.

公开(公告)号：US20190252197A1

公开(公告)日：2019-08-15

申请号：US16288334

申请日：2019-02-28

Applicant: TOKYO ELECTRON LIMITED

Inventor： Sonam D. SHERPA ,  Alok RANJAN

IPC: H01L21/3065 ,  H01L21/033 ,  C23C16/02

CPC classification number: H01L21/3065 ,  C01B21/068 ,  C23C16/0245 ,  H01L21/0337 ,  H01L21/31116

Abstract: A method of etching is described. The method includes providing a substrate having a first material containing silicon nitride and a second material that is different from the first material, forming a first chemical mixture by plasma-excitation of a first process gas containing H and optionally a noble gas, and exposing the first material on the substrate to the first chemical mixture. Thereafter, the method includes forming a second chemical mixture by plasma-excitation of a second process gas containing N, F, O, and optionally a noble element, and exposing the first material on the substrate to the second plasma-excited process gas to selectively etch the first material relative to the second material.