利索-全球专利检索

  1. 登录
  2. 注册

搜索结果

24 条记录 (耗时 0.029 秒)

    METHOD FOR FORMING SEMICONDUCTOR DEVICE STRUCTURE AND SEMICONDUCTOR DEVICE
    5.
    发明申请
    METHOD FOR FORMING SEMICONDUCTOR DEVICE STRUCTURE AND SEMICONDUCTOR DEVICE 有权
    形成半导体器件结构和半导体器件的方法

    公开(公告)号：US20120168818A1

    公开(公告)日：2012-07-05

    申请号：US13412296

    申请日：2012-03-05

    申请人： Tomohisa Mizuno

    发明人： Tomohisa Mizuno

    IPC分类号： H01L29/165 ,  H01L21/336

    CPC分类号： H01L29/78654 ,  H01L29/66742 ,  H01L29/7848 ,  H01L29/78618 ,  H01L29/78684

    摘要： Disclosed are a method which improves the performance of a semiconductor element, and a semiconductor element with improved performance. The method for forming a semiconductor element structure includes a heterojunction forming step in which a heterojunction is formed between a strained semiconductor layer (21) in which a strained state is maintained, and relaxed semiconductor layers (23, 25). The heterojunction is formed by performing ion implantation from the surface of a substrate (50) which has a strained semiconductor layer (20) partially covered with a covering layer (30) on an insulating oxide film (40), and altering the strained semiconductor layer (20) where there is no shielding from the covering layer (30) to relaxed semiconductor layers (23, 25) by relaxing the strained state of the strained semiconductor layer (20), while maintaining the strained state of the strained semiconductor layer (21) where there is shielding from the covering layer (30).

    摘要翻译： 公开了一种提高半导体元件的性能的方法和具有改进的性能的半导体元件。 形成半导体元件结构的方法包括异质结形成步骤，其中在其中保持应变状态的应变半导体层（21）和松弛半导体层（23,25）之间形成异质结。 通过从衬底（50）的表面进行离子注入而形成异质结，衬底（50）具有在绝缘氧化膜（40）上部分被覆盖层（30）覆盖的应变半导体层（20），并且改变应变半导体层 （20），其中通过缓和应变半导体层（20）的应变状态，在保持应变半导体层（21）的应变状态的同时，不会从覆盖层（30）向松弛的半导体层（23,25） ），其中存在与覆盖层（30）的屏蔽。

    Transistor with an offset gate structure
    8.
    发明授权
    Transistor with an offset gate structure 失效
    具有偏移栅极结构的晶体管

    公开(公告)号：US5430313A

    公开(公告)日：1995-07-04

    申请号：US220045

    申请日：1994-03-30

    申请人： Jumpei Kumagai ,  Tomohisa Mizuno

    发明人： Jumpei Kumagai ,  Tomohisa Mizuno

    IPC分类号： H01L21/336 ,  H01L27/088 ,  H01L29/423 ,  H01L29/51 ,  H01L29/78 ,  H01L23/00

    CPC分类号： H01L27/088 ,  H01L29/42376 ,  H01L29/513 ,  H01L29/518 ,  H01L29/6656 ,  H01L29/66575 ,  H01L29/78 ,  H01L29/7838 ,  H01L2924/0002

    摘要： At the surface of a p-type silicon substrate, n-type source/drain diffused layers are formed. On the substrate between the source/drain diffused layers, a gate insulating film made of a silicon oxide film is formed so as to be isolated from the diffused layers. A gate electrode is formed on the gate insulating film. Sidewalls are formed on the sides of the gate insulating film and gate electrode, extending upward from the substrate. In this invention, the sidewalls are composed of material whose permittivity is higher than that of the gate insulating film, for example, of a silicon nitride film.

    摘要翻译： 在p型硅衬底的表面上形成n型源极/漏极扩散层。 在源极/漏极扩散层之间的衬底上形成由氧化硅膜形成的栅极绝缘膜，以与扩散层隔离。 在栅极绝缘膜上形成栅电极。 侧壁形成在栅极绝缘膜和栅电极的从基板向上延伸的侧面上。 在本发明中，侧壁由介电常数高于栅极绝缘膜（例如氮化硅膜）的材料构成。

    Semiconductor device and method of manufacturing the same
    10.
    发明授权
    Semiconductor device and method of manufacturing the same 失效
    半导体装置及其制造方法

    公开(公告)号：US06709909B2

    公开(公告)日：2004-03-23

    申请号：US10440133

    申请日：2003-05-19

    申请人： Tomohisa Mizuno ,  Naoharu Sugiyama ,  Shinichi Takagi

    发明人： Tomohisa Mizuno ,  Naoharu Sugiyama ,  Shinichi Takagi

    IPC分类号： H01L21338

    CPC分类号： H01L21/76243 ,  H01L21/26533 ,  H01L29/1054 ,  H01L29/78687 ,  Y10S438/933 ,  Y10S438/938

    摘要： A method of manufacturing a semiconductor device which includes forming a first SiGe layer having a low content of Ge, forming an oxide layer by implanting oxygen ions into the first SiGe layer, and then annealing the first SiGe layer. The method also includes forming, on the first SiGe layer, a second SiGe layer which has a higher content of Ge than the first SiGe layer, forming a strained Si layer on the second SiGe layer, and forming a field effect transistor in which the strained Si layer is used a channel region. Further, a field effect transistor may be formed on a semiconductor substrate having an indefectible, high-quality, buried oxide layer and a largely strained Si layer, and hence a high-speed, low-power-consumption semiconductor device can be realized.

    摘要翻译： 一种制造半导体器件的方法，包括：通过将氧离子注入到第一SiGe层中形成具有低Ge含量的第一SiGe层，形成氧化层，然后退火第一SiGe层。 该方法还包括在第一SiGe层上形成第二SiGe层，其具有比第一SiGe层更高的Ge含量，在第二SiGe层上形成应变Si层，并形成其中应变的场效晶体管 Si层用于沟道区。 此外，可以在具有不可缺的，高质量的掩埋氧化物层和大的应变Si层的半导体衬底上形成场效应晶体管，因此可以实现高速，低功耗的半导体器件。