公开(公告)号：US09548216B1

公开(公告)日：2017-01-17

申请号：US14809270

申请日：2015-07-26

申请人： UNITED MICROELECTRONICS CORP.

发明人： Yu-Te Chen ,  Chia-Hsun Tseng ,  En-Chiuan Liou ,  Chiung-Lin Hsu ,  Meng-Lin Tsai ,  Jan-Fu Yang ,  Yu-Ting Hung ,  Shin-Feng Su

IPC分类号： H01L21/76 ,  H01L21/321 ,  H01L21/225 ,  H01L21/3205 ,  H01L21/3105

CPC分类号： H01L21/2253 ,  H01L21/30604 ,  H01L21/3065 ,  H01L21/823412 ,  H01L21/823431 ,  H01L21/823807 ,  H01L21/823821

摘要： A method of adjusting channel widths of semiconductive devices includes providing a substrate divided into a first region and a second region, wherein the substrate comprises numerous fins. A first implantation process is performed on the fins within the first region. Then, a second implantation process is performed on the fins within the second region, wherein the first implantation process and the second implantation process are different from each other in at least one of the conditions comprising dopant species, dopant dosage or implantation energy. After that, part of the fins within the first region and the second region are removed simultaneously to form a plurality of first recesses within the first region and a plurality of second recesses within the second region. Finally, a first epitaxial layer and a second epitaxial layer are formed to fill up each first recess and each second recess, respectively.

摘要翻译： 调整半导体器件的沟道宽度的方法包括提供分成第一区域和第二区域的衬底，其中衬底包括多个鳍片。 在第一区域内的翅片上执行第一注入工艺。 然后，对第二区域内的翅片执行第二注入工艺，其中第一注入工艺和第二注入工艺在包括掺杂剂种类，掺杂剂剂量或注入能量的至少一个条件中彼此不同。 之后，同时去除第一区域和第二区域内的部分散热片，以在第一区域内形成多个第一凹槽，在第二区域内形成多个第二凹槽。 最后，形成第一外延层和第二外延层以分别填充每个第一凹槽和每个第二凹槽。

公开(公告)号：US09653345B1

公开(公告)日：2017-05-16

申请号：US14989802

申请日：2016-01-07

申请人： UNITED MICROELECTRONICS CORP.

发明人： Shang-Nan Chou ,  Che-Yi Lin ,  En-Chiuan Liou ,  Yu-Ting Hung ,  Shin-Feng Su ,  Chia-Hsun Tseng

IPC分类号： H01L21/76 ,  H01L21/768 ,  H01L21/027 ,  H01L21/308

CPC分类号： H01L21/76802 ,  H01L21/0276 ,  H01L21/308 ,  H01L21/3081 ,  H01L21/31144 ,  H01L21/76811 ,  H01L21/76816 ,  H01L21/76832

摘要： A method of fabricating a semiconductor structure for improving critical dimension control is provided in the present invention. The method includes the following steps. An inter metal dielectric (IMD) layer is formed on a semiconductor substrate, a patterned hard mask layer is formed on the IMD layer, and a first aperture is formed in the IMD layer. A first barrier layer is formed on the patterned hard mask layer and a surface of the first aperture, a first patterned resist is formed on the first barrier layer, and an etching process is performed to form a second aperture in the IMD layer by using the first patterned resist as a mask. The first patterned resist is kept from being poisoned because of the first barrier layer, and the critical dimension control of the semiconductor structure may be improved accordingly.

公开(公告)号：US20170025286A1

公开(公告)日：2017-01-26

申请号：US14809270

申请日：2015-07-26

申请人： UNITED MICROELECTRONICS CORP.

发明人： Yu-Te Chen ,  Chia-Hsun Tseng ,  En-Chiuan Liou ,  Chiung-Lin Hsu ,  Meng-Lin Tsai ,  Jan-Fu Yang ,  Yu-Ting Hung ,  Shin-Feng Su

IPC分类号： H01L21/321 ,  H01L21/3205 ,  H01L21/3105 ,  H01L21/225

CPC分类号： H01L21/2253 ,  H01L21/30604 ,  H01L21/3065 ,  H01L21/823412 ,  H01L21/823431 ,  H01L21/823807 ,  H01L21/823821

摘要： A method of adjusting channel widths of semiconductive devices includes providing a substrate divided into a first region and a second region, wherein the substrate comprises numerous fins. A first implantation process is performed on the fins within the first region. Then, a second implantation process is performed on the fins within the second region, wherein the first implantation process and the second implantation process are different from each other in at least one of the conditions comprising dopant species, dopant dosage or implantation energy. After that, part of the fins within the first region and the second region are removed simultaneously to form a plurality of first recesses within the first region and a plurality of second recesses within the second region. Finally, a first epitaxial layer and a second epitaxial layer are formed to fill up each first recess and each second recess, respectively.

摘要翻译： 调整半导体器件的沟道宽度的方法包括提供分成第一区域和第二区域的衬底，其中衬底包括多个鳍片。 在第一区域内的翅片上执行第一注入工艺。 然后，对第二区域内的翅片执行第二注入工艺，其中第一注入工艺和第二注入工艺在包括掺杂剂种类，掺杂剂剂量或注入能量的至少一个条件中彼此不同。 之后，同时去除第一区域和第二区域内的部分散热片，以在第一区域内形成多个第一凹槽，在第二区域内形成多个第二凹槽。 最后，形成第一外延层和第二外延层以分别填充每个第一凹槽和每个第二凹槽。

公开(公告)号：US09543203B1

公开(公告)日：2017-01-10

申请号：US14791242

申请日：2015-07-02

申请人： UNITED MICROELECTRONICS CORP.

发明人： Chia-Lin Lu ,  Chun-Lung Chen ,  Kun-Yuan Liao ,  Feng-Yi Chang ,  En-Chiuan Liou ,  Chia-Hsun Tseng ,  Wei-Hao Huang ,  Yu-Ting Hung

IPC分类号： H01L21/3205 ,  H01L29/66 ,  H01L21/768 ,  H01L21/311 ,  H01L21/027

CPC分类号： H01L21/76897 ,  H01L21/0276 ,  H01L21/31133 ,  H01L21/31144 ,  H01L21/76802 ,  H01L21/76843 ,  H01L21/76877 ,  H01L29/66545 ,  H01L29/6656

摘要： A method of fabricating a semiconductor structure includes the following steps: forming a first interlayer dielectric on a substrate; forming a gate electrode on the substrate so that the periphery of the gate electrode is surrounded by the first interlayer dielectric; forming a patterned mask layer comprising at least a layer of organic material on the gate electrode; forming a conformal dielectric layer to conformally cover the layer of organic material; and forming a second interlayer dielectric to cover the conformal dielectric layer.

摘要翻译： 制造半导体结构的方法包括以下步骤：在衬底上形成第一层间电介质; 在所述基板上形成栅电极，使得所述栅电极的周围被所述第一层间电介质包围; 在所述栅电极上形成至少包含一层有机材料的图案化掩模层; 形成保形绝缘层以保形地覆盖有机材料层; 以及形成覆盖所述共形介电层的第二层间电介质。

公开(公告)号：US20170004997A1

公开(公告)日：2017-01-05

申请号：US14791242

申请日：2015-07-02

申请人： United Microelectronics Corp.

发明人： Chia-Lin Lu ,  Chun-Lung Chen ,  Kun-Yuan Liao ,  Feng-Yi Chang ,  En-Chiuan Liou ,  Chia-Hsun Tseng ,  Wei-Hao Huang ,  Yu-Ting Hung

IPC分类号： H01L21/768 ,  H01L21/311 ,  H01L21/027 ,  H01L29/66

CPC分类号： H01L21/76897 ,  H01L21/0276 ,  H01L21/31133 ,  H01L21/31144 ,  H01L21/76802 ,  H01L21/76843 ,  H01L21/76877 ,  H01L29/66545 ,  H01L29/6656

摘要： A method of fabricating a semiconductor structure includes the following steps: forming a first interlayer dielectric on a substrate; forming a gate electrode on the substrate so that the periphery of the gate electrode is surrounded by the first interlayer dielectric; forming a patterned mask layer comprising at least a layer of organic material on the gate electrode; forming a conformal dielectric layer to conformally cover the layer of organic material; and forming a second interlayer dielectric to cover the conformal dielectric layer.

摘要翻译： 制造半导体结构的方法包括以下步骤：在衬底上形成第一层间电介质; 在所述基板上形成栅电极，使得所述栅电极的周围被所述第一层间电介质包围; 在所述栅电极上形成至少包含一层有机材料的图案化掩模层; 形成保形绝缘层以保形地覆盖有机材料层; 以及形成覆盖所述共形介电层的第二层间电介质。

公开(公告)号：US09711358B2

公开(公告)日：2017-07-18

申请号：US15399715

申请日：2017-01-05

申请人： UNITED MICROELECTRONICS CORP.

发明人： Yu-Te Chen ,  En-Chiuan Liou ,  Chia-Hsun Tseng ,  Shin-Feng Su ,  Yu-Ting Hung ,  Meng-Lin Tsai

IPC分类号： H01L21/027 ,  H01L21/033 ,  H01L21/311 ,  H01L21/768

CPC分类号： H01L21/0337 ,  H01L21/0271 ,  H01L21/0275 ,  H01L21/0332 ,  H01L21/0334 ,  H01L21/31127 ,  H01L21/31144 ,  H01L21/32139 ,  H01L21/76816

摘要： A method of forming a non-continuous line pattern includes forming a DSA material layer on a substrate, performing a phase separation of the DSA material layer to form an ordered periodic pattern including a plurality of first polymer structures and the second polymer structures arranged alternately, forming a first mask to cover a first portion of the ordered periodic pattern, performing a first etching process to remove a portion of the first polymer structures exposed by the first mask, removing the first mask, forming a second mask to cover a second portion of the ordered periodic pattern, with an interval to the first portion of the ordered periodic pattern, performing a second etching process to remove a portion of the second polymer structures exposed by the second mask, and removing the second mask. The remaining first polymer structures and the remaining second polymer structures are not connected to each other.

公开(公告)号：US20170117149A1

公开(公告)日：2017-04-27

申请号：US15399715

申请日：2017-01-05

申请人： UNITED MICROELECTRONICS CORP.

发明人： Yu-Te Chen ,  En-Chiuan Liou ,  Chia-Hsun Tseng ,  Shin-Feng Su ,  Yu-Ting Hung ,  Meng-Lin Tsai

IPC分类号： H01L21/033 ,  H01L21/311 ,  H01L21/768 ,  H01L21/027

CPC分类号： H01L21/0337 ,  H01L21/0271 ,  H01L21/0275 ,  H01L21/0332 ,  H01L21/0334 ,  H01L21/31127 ,  H01L21/31144 ,  H01L21/32139 ,  H01L21/76816

摘要： A method of forming a non-continuous line pattern includes forming a DSA material layer on a substrate, performing a phase separation of the DSA material layer to form an ordered periodic pattern including a plurality of first polymer structures and the second polymer structures arranged alternately, forming a first mask to cover a first portion of the ordered periodic pattern, performing a first etching process to remove a portion of the first polymer structures exposed by the first mask, removing the first mask, forming a second mask to cover a second portion of the ordered periodic pattern, with an interval to the first portion of the ordered periodic pattern, performing a second etching process to remove a portion of the second polymer structures exposed by the second mask, and removing the second mask. The remaining first polymer structures and the remaining second polymer structures are not connected to each other.

公开(公告)号：US09583343B2

公开(公告)日：2017-02-28

申请号：US14753019

申请日：2015-06-29

申请人： UNITED MICROELECTRONICS CORP.

发明人： Yu-Te Chen ,  En-Chiuan Liou ,  Chia-Hsun Tseng ,  Shin-Feng Su ,  Yu-Ting Hung ,  Meng-Lin Tsai

IPC分类号： H01L23/528 ,  H01L21/027 ,  H01L21/311

CPC分类号： H01L21/0337 ,  H01L21/0271 ,  H01L21/0275 ,  H01L21/0332 ,  H01L21/0334 ,  H01L21/31127 ,  H01L21/31144 ,  H01L21/32139 ,  H01L21/76816

摘要： A method of forming a non-continuous line pattern includes forming a DSA material layer on a substrate, performing a phase separation of the DSA material layer to form an ordered periodic pattern including a plurality of first polymer structures and the second polymer structures arranged alternately, forming a first mask to cover a first portion of the ordered periodic pattern, performing a first etching process to remove a portion of the first polymer structures exposed by the first mask, removing the first mask, forming a second mask to cover a second portion of the ordered periodic pattern, with an interval to the first portion of the ordered periodic pattern, performing a second etching process to remove a portion of the second polymer structures exposed by the second mask, and removing the second mask. The remaining first polymer structures and the remaining second polymer structures are not connected to each other.

摘要翻译： 形成非连续线图案的方法包括在基底上形成DSA材料层，进行DSA材料层的相分离以形成包括多个第一聚合物结构和交替布置的第二聚合物结构的有序周期性图案， 形成第一掩模以覆盖有序周期性图案的第一部分，执行第一蚀刻工艺以去除由第一掩模暴露的第一聚合物结构的一部分，去除第一掩模，形成第二掩模以覆盖第二掩模的第二部分 所述有序周期性图案间隔到所述有序周期性图案的第一部分，执行第二蚀刻工艺以去除由所述第二掩模暴露的所述第二聚合物结构的一部分，以及去除所述第二掩模。 剩余的第一聚合物结构和剩余的第二聚合物结构彼此不连接。

公开(公告)号：US20160343567A1

公开(公告)日：2016-11-24

申请号：US14753019

申请日：2015-06-29

申请人： UNITED MICROELECTRONICS CORP.

发明人： Yu-Te Chen ,  En-Chiuan Liou ,  Chia-Hsun Tseng ,  Shin-Feng Su ,  Yu-Ting Hung ,  Meng-Lin Tsai

IPC分类号： H01L21/027 ,  H01L21/311

CPC分类号： H01L21/0337 ,  H01L21/0271 ,  H01L21/0275 ,  H01L21/0332 ,  H01L21/0334 ,  H01L21/31127 ,  H01L21/31144 ,  H01L21/32139 ,  H01L21/76816

摘要： A method of forming a non-continuous line pattern includes forming a DSA material layer on a substrate, performing a phase separation of the DSA material layer to form an ordered periodic pattern including a plurality of first polymer structures and the second polymer structures arranged alternately, forming a first mask to cover a first portion of the ordered periodic pattern, performing a first etching process to remove a portion of the first polymer structures exposed by the first mask, removing the first mask, forming a second mask to cover a second portion of the ordered periodic pattern, with an interval to the first portion of the ordered periodic pattern, performing a second etching process to remove a portion of the second polymer structures exposed by the second mask, and removing the second mask. The remaining first polymer structures and the remaining second polymer structures are not connected to each other.

摘要翻译： 形成非连续线图案的方法包括在基底上形成DSA材料层，进行DSA材料层的相分离以形成包括多个第一聚合物结构和交替布置的第二聚合物结构的有序周期性图案， 形成第一掩模以覆盖有序周期性图案的第一部分，执行第一蚀刻工艺以去除由第一掩模暴露的第一聚合物结构的一部分，去除第一掩模，形成第二掩模以覆盖第二掩模的第二部分 所述有序周期性图案间隔到所述有序周期性图案的第一部分，执行第二蚀刻工艺以去除由所述第二掩模暴露的所述第二聚合物结构的一部分，以及去除所述第二掩模。 剩余的第一聚合物结构和剩余的第二聚合物结构彼此不连接。