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145 条记录 (耗时 0.037 秒)

    Silicon oxime spacer for preventing over-etching during local interconnect formation
    3.
    发明授权
    Silicon oxime spacer for preventing over-etching during local interconnect formation 失效
    硅肟间隔物，用于在局部互连形成期间防止过蚀刻

    公开(公告)号：US5990524A

    公开(公告)日：1999-11-23

    申请号：US993868

    申请日：1997-12-18

    申请人： William G. En ,  Minh Van Ngo ,  Chih-Yuh Yang ,  David K. Foote ,  Scott A. Bell ,  Olov B. Karlsson ,  Christopher F. Lyons

    发明人： William G. En ,  Minh Van Ngo ,  Chih-Yuh Yang ,  David K. Foote ,  Scott A. Bell ,  Olov B. Karlsson ,  Christopher F. Lyons

    IPC分类号： H01L21/768 ,  H01L29/78

    CPC分类号： H01L21/76897 ,  H01L21/76895

    摘要： During damascene formation of local interconnects in a semiconductor wafer, a punch-through region can be formed into the substrate as a result of exposing the oxide spacers that are adjacent to a transistor gate to one or more etching plasmas that are used to etch one or more overlying dielectric layers. A punch-through region can damage the transistor circuit. Improved, multipurpose spacers are provided to reduce the chances of over-etching. The multipurpose spacers are made of silicon oxime. The etching plasmas that are used to etch one or more overlying dielectric layers tend to have a higher selectivity ratio to the multipurpose spacers than to the conventional oxide spacers. Additionally, the multipurpose spacers do not tend to degrade the hot carrier injection (HCI) properties as would a typical nitride spacer.

    摘要翻译： 在半导体晶片中局部互连的镶嵌形成期间，由于将与晶体管栅极相邻的氧化物间隔物暴露于用于蚀刻一个或多个蚀刻等离子体的一个或多个蚀刻等离子体，可以将穿透区域形成为衬底， 更重叠的电介质层。 穿通区域可能会损坏晶体管电路。 提供改进的多用途间隔件以减少过度蚀刻的机会。 多用途间隔件由硅肟制成。 用于蚀刻一个或多个上覆电介质层的蚀刻等离子体与常规氧化物间隔物相比往往具有比多用途间隔物更高的选择比。 此外，多用途间隔物不会像典型的氮化物间隔物一样降低热载流子注入（HCl）性质。

    Gate pattern formation using a bottom anti-reflective coating
    4.
    发明授权
    Gate pattern formation using a bottom anti-reflective coating 失效
    使用底部抗反射涂层的栅格图案形成

    公开(公告)号：US5963841A

    公开(公告)日：1999-10-05

    申请号：US924370

    申请日：1997-09-05

    申请人： Olov B. Karlsson ,  Christopher F. Lyons ,  Minh Van Ngo ,  Scott A. Bell ,  David K. Foote

    发明人： Olov B. Karlsson ,  Christopher F. Lyons ,  Minh Van Ngo ,  Scott A. Bell ,  David K. Foote

    IPC分类号： H01L21/3213 ,  H01L21/302

    CPC分类号： H01L21/32139

    摘要： A gate is formed on a semiconductor substrate by using a bottom anti-reflective coating (BARC) to better control the critical dimension (CD) of the gate as defined via a deep-UV resist mask formed thereon. The wafer stack includes a gate oxide layer over a semiconductor substrate, a polysilicon gate layer over the gate oxide layer, a SiON BARC over the conductive layer, a thin oxide film over the SiON BARC. The resist mask is formed on the oxide film. The SiON BARC improves the resist mask formation process. The wafer stack is then shaped to form one or more polysilicon gates by sequentially etching through selected portions of the oxide film, the BARC, and the gate conductive layer as defined by the etch windows in the resist mask. Once properly shaped, the remaining portions of the resist mask, oxide film and SiON BARC are removed.

    摘要翻译： 通过使用底部抗反射涂层（BARC）在半导体衬底上形成栅极以更好地控制通过形成在其上的深UV抗蚀剂掩模所限定的栅极的临界尺寸（CD）。 晶片堆叠包括半导体衬底上的栅极氧化物层，栅极氧化物层上的多晶硅栅极层，导电层上的SiON BARC，SiON BARC上的薄氧化物膜。 在氧化物膜上形成抗蚀剂掩模。 SiON BARC改进了抗蚀剂掩模形成过程。 然后通过依次蚀刻通过抗蚀剂掩模中由蚀刻窗口限定的氧化膜，BARC和栅极导电层的选定部分，将晶片堆叠成形以形成一个或多个多晶硅栅极。 一旦适当成形，就去除了抗蚀剂掩模，氧化膜和SiON BARC的其余部分。

    Method for creating partially UV transparent anti-reflective coating for semiconductors
    9.
    发明授权
    Method for creating partially UV transparent anti-reflective coating for semiconductors 有权
    半导体部分UV透明抗反射涂层的制造方法

    公开(公告)号：US06380067B1

    公开(公告)日：2002-04-30

    申请号：US09588119

    申请日：2000-05-31

    申请人： Ramkumar Subramanian ,  Minh Van Ngo ,  Suzette K. Pangrle ,  Kashmir Sahota ,  Christopher F. Lyons

    发明人： Ramkumar Subramanian ,  Minh Van Ngo ,  Suzette K. Pangrle ,  Kashmir Sahota ,  Christopher F. Lyons

    IPC分类号： H01L21302

    CPC分类号： H01L21/76895 ,  H01L21/0276 ,  H01L21/76802 ,  H01L27/105 ,  H01L27/11526 ,  H01L27/11534

    摘要： The present invention provides a method for manufacturing a semiconductor device with a bottom anti-reflective coating (BARC) that acts as an etch stop layer and does not need to be removed. In one embodiment, electrical devices are formed on a semiconductor substrate. Contacts are then formed for each electrical device and a partially UV transparent BARC is then deposited. An inter-layer dielectric (ILD) layer is then formed and then covered with photoresist. A top ARC (TARC) is then added and the photoresist is then photolithographically processed and subsequently developed. The TARC, ILD, and BARC layers are then selectively etched down to the device contacts forming local interconnects. The photoresist and TARC are later removed, but the BARC does not require removal due to its optical transparency.

    摘要翻译： 本发明提供一种用于制造半导体器件的方法，该半导体器件具有用作蚀刻停止层并且不需要去除的底部抗反射涂层（BARC）。 在一个实施例中，电子器件形成在半导体衬底上。 然后为每个电气设备形成触点，然后沉积部分UV透明的BARC。 然后形成层间电介质（ILD）层，然后用光致抗蚀剂覆盖。 然后加入顶部ARC（TARC），然后对光致抗蚀剂进行光刻处理并随后显影。 然后将TARC，ILD和BARC层选择性地刻蚀成形成局部互连的器件触点。 光致抗蚀剂和TARC随后被去除，但由于其光学透明性，BARC不需要去除。