On-wafer integrated circuit electrical testing
    1.
    发明授权
    On-wafer integrated circuit electrical testing 失效
    片上集成电路电气测试

    公开(公告)号:US5336992A

    公开(公告)日:1994-08-09

    申请号:US892908

    申请日:1992-06-03

    IPC分类号: G01R1/073 G01R1/06 G01R31/02

    CPC分类号: G01R1/07357

    摘要: An electrical testing device is provided for testing integrated circuits located on a wafer. The testing device employs a multi-layer test circuit having a plurality of contacts for contacting the integrated circuits on a wafer. The layers of the test circuit are embedded in a flexible, supportive dielectric material which allows vertical flexing of the contacts. Cross bar switches are further employed to switch among the plurality of contacts thereby enabling the testing of individual dies of the water to be tested. A microprocessor is further included for controlling the switching and the testing of each die. In an alternate embodiment, the plurality of contacts are mechanically moved relative to the wafer to allow testing of the dies without the need for the switches.

    摘要翻译: 提供一种用于测试位于晶片上的集成电路的电测试装置。 测试装置采用具有多个触点的多层测试电路,用于接触晶片上的集成电路。 测试电路的层被嵌入柔性的支撑电介质材料中,允许触点的垂直弯曲。 进一步采用十字杆开关在多个触点之间切换,从而能够测试要测试的水的各个模具。 还包括微处理器,用于控制每个管芯的切换和测试。 在替代实施例中,多个触点相对于晶片机械地移动,以允许模具的测试而不需要开关。

    Integrated waveguide/stripline transition
    2.
    发明授权
    Integrated waveguide/stripline transition 失效
    集成波导/带状线过渡

    公开(公告)号:US5311153A

    公开(公告)日:1994-05-10

    申请号:US917633

    申请日:1992-07-17

    IPC分类号: H01P5/107 H03H5/00

    CPC分类号: H01P5/107

    摘要: An integrated waveguide/stripline signal transition structure and method for fabricating the same are provided for allowing high frequency signal transitions. The signal transition structure includes a waveguide which has a conductive cavity for guiding electromagnetic waves therethrough. A first conductive circuit layer is fabricated within the conductive cavity and is electrically connected thereto. A second conductive signal layer is fabricated within the conductive cavity and is isolated from the conductive cavity and the first conductive signal layer. A plurality of dielectric layers are provided which suspend the first and second conductive signal layers within the conductive cavity. The second conductive signal layer and the conductive cavity thereby allow for signal transitions therebetween. The first and second conductive signal layers and dielectric material are integrally fabricated on top of a removable material which is subsequently removed. In an alternate embodiment, a single dielectric layer is provided for suspending the first and second conductive signal layers. In addition, an array of signal transition structures may be integrally fabricated within a housing structure.

    摘要翻译: 提供了一种集成的波导/带状线信号转换结构及其制造方法,用于允许高频信号转换。 信号转换结构包括具有导电电磁波的导电腔的波导。 第一导电电路层制造在导电腔内并与其电连接。 在导电腔内制造第二导电信号层,并与导电腔和第一导电信号层隔离。 提供了多个介电层,其将第一和第二导电信号层悬挂在导电腔内。 因此,第二导电信号层和导电腔允许它们之间的信号转换。 第一和第二导电信号层和电介质材料整体地制造在随后被去除的可去除材料的顶部上。 在替代实施例中,提供单个电介质层用于悬挂第一和第二导电信号层。 此外,信号转变结构的阵列可以一体地制造在壳体结构内。

    Single crystal diamond wafer fabrication
    3.
    发明授权
    Single crystal diamond wafer fabrication 失效
    单晶金刚石晶圆制造

    公开(公告)号:US5290392A

    公开(公告)日:1994-03-01

    申请号:US894685

    申请日:1992-06-05

    IPC分类号: C30B25/02 C30B29/04

    摘要: This invention discloses a method of fabricating a plurality of diamond semiconductor wafers from a single crystal diamond semiconductor boule, where the diamond boule is grown by a chemical vapor deposition (CVD) process. Initially, a single crystal diamond seed is polished and an impurity layer is deposited on the polished seed crystal. The CVD growth process is then initiated to deposit a layer of single crystal diamond over the impurity layer to form the diamond boule. At desirable intervals, the CVD growth process is stopped and a surface of the diamond boule is polished in order to accept another impurity layer. Each impurity layer is photolithographically patterned in order to generate an alternating configuration of impurity regions and hole regions. The impurity regions and the hole regions enable the bond between the diamond layers to be weakened without causing the crystalline orientation to deviate. Once the diamond semiconductor boule is developed by this process, it can be easily sliced by a laser slicing process into a plurality of diamond semiconductor wafers along the impurity layers.

    摘要翻译: 本发明公开了一种从单晶金刚石半导体晶锭制造多个金刚石半导体晶片的方法,其中通过化学气相沉积(CVD)工艺生长金刚石晶粒。 最初,抛光单晶金刚石晶种,杂质层沉积在抛光晶种上。 然后开始CVD生长过程,以在杂质层上沉积一层单晶金刚石以形成金刚石晶粒。 以期望的间隔,停止CVD生长过程并抛光金刚石晶粒的表面以接受另一个杂质层。 每个杂质层被光刻图案化以便产生杂质区域和孔区域的交替构型。 杂质区域和空穴区域能够使金刚石层之间的结合减弱而不会导致晶体取向偏离。 一旦通过该工艺开发了金刚石半导体晶锭,则可以通过激光切片工艺将其容易地沿着杂质层切割成多个金刚石半导体晶片。

    Laminated magnet keeper for implant device
    5.
    发明授权
    Laminated magnet keeper for implant device 有权
    用于植入装置的层压磁铁保持器

    公开(公告)号:US06178353B1

    公开(公告)日:2001-01-23

    申请号:US09353236

    申请日:1999-07-14

    IPC分类号: A61N1378

    摘要: An implantable medical device, such as an implantable cochlear stimulator (ICS) system, utilizes laminated, sectionalized or particle-ized permanent magnets and/or keepers in both the implant portion and external (non-implanted) portion so as to reduce the electrical energy absorbed by both the implant device and the external device when in use. In one embodiment, the implant device employs a sectionalized, laminated or particle-based “keeper”, while the external device employs a sectionalized, laminated or particle-ized magnet, making the implant device immune to being damaged by MRI (magnetic resonance imaging). The combination of the sectionalized/laminated/particle magnets and the sectionalized/laminated/particle keepers creates a very high electrical resistance path across the boundaries of the laminations, sections, or particles, thereby reducing the magnitude of eddy currents that would otherwise flow transversely through the keeper in the presence of a magnetic flux passing through the keeper or magnet. The reduction of eddy currents, in turn, reduces energy loss.

    摘要翻译: 植入式医疗装置,例如植入式耳蜗刺激器(ICS)系统,在植入部分和外部(未植入)部分中都使用层压的,分段的或颗粒化的永磁体和/或保持器,以便减少电能 在使用时由植入装置和外部装置吸收。 在一个实施例中,植入装置采用分段,层压或基于粒子的“保持器”,而外部装置采用分段,层压或粒化的磁体,使得植入装置免受MRI(磁共振成像)的损伤, 。 分段/层压/颗粒磁体和分段/层压/颗粒保持器的组合在叠片,部分或颗粒的边界上产生非常高的电阻路径,从而减小横向通过的涡流的大小 在存在通过保持器或磁体的磁通量的情况下的保持器。 涡流的减少又降低了能量损失。

    Brazeless ceramic-to-metal bond for use in implantable devices
    6.
    发明授权
    Brazeless ceramic-to-metal bond for use in implantable devices 失效
    用于可植入设备的无釉陶瓷 - 金属粘合剂

    公开(公告)号:US5513793A

    公开(公告)日:1996-05-07

    申请号:US319580

    申请日:1994-10-07

    摘要: In a method and apparatus for forming a hermetically sealed bond for use in implantable medical devices, a first structure, made from a first material, is positioned against a second structure, made from a second material. A compressive force directed at the second structure is applied to the first structure, and an equal force directed at the first structure in a direction opposite the compressive force is applied to the second structure so that the first and second structures are isodynamically pressed together. The first and second structures are heated to a diffusion temperature whereat the first material and the second material undergo diffusion, thereby forming a hermetically sealed bond between the first and second materials.

    摘要翻译: 在用于形成用于可植入医疗装置的气密密封的方法和装置中,由第一材料制成的第一结构抵靠由第二材料制成的第二结构定位。 向第一结构施加指向第二结构的压缩力,并且在与第二结构相反的方向上将与第一结构相反的力施加到第二结构,使得第一和第二结构被动态地压在一起。 将第一和第二结构加热到第一材料和第二材料经历扩散的扩散温度,从而在第一和第二材料之间形成密封的结合。

    Hair clip retention system for headpiece of cochlear implant system
    7.
    发明授权
    Hair clip retention system for headpiece of cochlear implant system 失效
    用于耳蜗植入系统头盔的夹子固定系统

    公开(公告)号:US06275736B1

    公开(公告)日:2001-08-14

    申请号:US09312158

    申请日:1999-05-14

    IPC分类号: A61N136

    摘要: A hair clip for use with a cochlear implant system retains a headpiece assembly, including a transmitting coil, in an aligned position relative to an implanted stimulator. In one embodiment, the hair clip provides a retention system that uses a magnet which forms part of the transmitting coil. A comb or plurality of prongs forms part of the retention system. In another embodiment, the comb has central teeth that are made from ferromagnetic material, and typically also has a non-central teeth that are made from non-ferromagnetic material. The comb is placed and secured in the patient's hair over the area where a cochlear implant is implanted. The transmitting coil is then placed next to the comb, and the magnet within the transmitting coil attaches to the ferromagnetic teeth of the comb. In another embodiment, the transmitting coil is housed in a headpiece, and the headpiece and comb or hair clip are fastened together, along an edge of the comb or hair clip where the teeth or prongs are bonded, with a hinge attachment spring. In a further embodiment, the hair clip is formed from a single sheet of stainless steel, and a plurality of prongs engage a lower surface of the headpiece while a retaining band, with an integral spring, securely holds the headpiece in place against the prongs. The hair clip is opened by applying a manual force against the spring and retaining band.

    摘要翻译: 与耳蜗植入系统一起使用的发夹将相对于植入的刺激器保持在对准位置的包括发射线圈的头戴组件。 在一个实施例中,发夹提供使用形成发射线圈的一部分的磁体的保持系统。 梳子或多个插脚构成保持系统的一部分。 在另一个实施例中,梳具有由铁磁材料制成的中心齿,并且通常还具有由非铁磁材料制成的非中心齿。 将梳子放置并固定在植入人耳蜗植入物的区域上的患者头发中。 然后将发射线圈放置在梳子附近,并且发射线圈内的磁体附着到梳子的铁磁齿上。 在另一个实施例中,发射线圈被容纳在头盔中,并且头盔和梳子或发夹沿着梳子或发夹的边缘固定在一起,其中齿或尖头被接合在一起,具有铰链附接弹簧。 在另一实施例中,发夹由单片不锈钢形成,并且多个插脚与头戴臂的下表面接合,而具有整体弹簧的保持带牢固地将针头固定在针头上。 通过对弹簧和保持带施加手动力来打开发夹。

    Connector for integrated circuit chips
    8.
    发明授权
    Connector for integrated circuit chips 失效
    集成电路芯片连接器

    公开(公告)号:US5491304A

    公开(公告)日:1996-02-13

    申请号:US315017

    申请日:1994-09-29

    IPC分类号: H01L21/48 H01L23/498 H05K1/16

    摘要: A connector is disclosed for electrically coupling groups of contact points formed on a first and second electronic circuit chip. The connector is constructed by applying a layer of dielectric material to a planar electrically conductive base, lithographically printing a pattern onto the dielectric material, etching the pattern and creating a plurality of wells extending through the dielectric material and a matching plurality of cavities in the surface of the base, and electroplating the pattern and filling the wells with an electrically conductive electroplate material. The electroplate thereby forms a plurality of conductive members, each extending through the dielectric material. The base is then removed from the dielectric material, thereby forming a connector board having the conductive members extending therethrough for electrically coupling the first and second groups of contact points on the circuit chips.

    摘要翻译: 公开了用于电耦合形成在第一和第二电子电路芯片上的接触点组的连接器。 连接器通过将电介质材料层施加到平面导电基底上而构成,将图案光刻地印刷到电介质材料上,蚀刻图案并产生延伸穿过电介质材料的多个阱以及表面上匹配的多个空腔 的基底,并且用导电电镀材料电镀图案并填充孔。 因此,电镀板形成多个导电构件,每个导电构件延伸穿过电介质材料。 然后将基底从电介质材料中取出,从而形成一个连接板,该连接器板具有穿过其中的导电构件,用于电耦合电路芯片上的第一和第二组接触点。

    Testing device for integrated circuits on wafer
    9.
    发明授权
    Testing device for integrated circuits on wafer 失效
    晶圆上集成电路测试装置

    公开(公告)号:US5479109A

    公开(公告)日:1995-12-26

    申请号:US187952

    申请日:1994-01-28

    IPC分类号: G01R1/073 G01R1/06

    CPC分类号: G01R1/07357

    摘要: An electrical testing device is provided for testing integrated circuits located on a wafer. The testing device employs a multi-layer test circuit having a plurality of contacts for contacting the integrated circuits on a wafer. The layers of the test circuit are embedded in a flexible transparent dielectric material which allows vertical flexing of the contacts and visual transparency through the circuit. Alignment markers are provided on the circuit and wafer and one or more viewing tubes may be used to allow a user to view the alignment markers so as to bring the circuit into proper alignment with the wafer. A microscope may further be employed with each viewing tube to provide accurate alignment examination. A stretching fixture is mounted on the circuit which enables a user to stretch the circuit to achieve a larger size when necessary.

    摘要翻译: 提供一种用于测试位于晶片上的集成电路的电测试装置。 测试装置采用具有多个触点的多层测试电路,用于接触晶片上的集成电路。 测试电路的层被嵌入柔性透明电介质材料中,允许触点的垂直弯曲和通过电路的视觉透明度。 对准标记设置在电路和晶片上,并且一个或多个观察管可以用于允许用户观看对准标记,以使电路与晶片正确对准。 每个观察管可以进一步使用显微镜以提供精确的对准检查。 拉伸夹具安装在电路上,使得用户能够在必要时拉伸电路以实现更大的尺寸。

    Method of making connector for integrated circuit chips
    10.
    发明授权
    Method of making connector for integrated circuit chips 失效
    制造集成电路芯片连接器的方法

    公开(公告)号:US5376226A

    公开(公告)日:1994-12-27

    申请号:US10235

    申请日:1993-01-28

    摘要: A connector is disclosed for electrically coupling groups of contact points formed on a first and second electronic circuit chip. The connector is constructed by applying a layer of dielectric material to a planar electrically conductive base, lithographically printing a pattern onto the dielectric material, etching the pattern and creating a plurality of wells extending through the dielectric material and a matching plurality of cavities in the surface of the base, and electroplating the pattern and filling the wells with an electrically conductive electroplate material. The electroplate thereby forms a plurality of conductive members, each extending through the dielectric material. The base is then removed from the dielectric material, thereby forming a connector board having the conductive members extending therethrough for electrically coupling the first and second groups of contact points on the circuit chips.

    摘要翻译: 公开了用于电耦合形成在第一和第二电子电路芯片上的接触点组的连接器。 连接器通过将电介质材料层施加到平面导电基底上而构成,将图案光刻地印刷到电介质材料上,蚀刻图案并产生延伸穿过电介质材料的多个阱以及表面上匹配的多个空腔 的基底,并且用导电电镀材料电镀图案并填充孔。 因此,电镀板形成多个导电构件,每个导电构件延伸穿过电介质材料。 然后将基底从电介质材料中取出,从而形成一个连接板,该连接器板具有穿过其中的导电构件,用于电耦合电路芯片上的第一和第二组接触点。