公开(公告)号：US5709927A

公开(公告)日：1998-01-20

申请号：US623836

申请日：1996-03-29

申请人： Yoshiyuki Miyase ,  Tohru Nomura ,  Akihiko Naito ,  Takamasa Okumura

发明人： Yoshiyuki Miyase ,  Tohru Nomura ,  Akihiko Naito ,  Takamasa Okumura

IPC分类号： H05K1/16 ,  H01C1/146 ,  H01L27/01 ,  B32B9/00

CPC分类号： H01C1/146 ,  H01L27/013 ,  Y10S428/901 ,  Y10T428/24917 ,  Y10T428/24926

摘要： A thick film circuit board comprising an insulating substrate; conductor wiring layers of a conductive material containing an oxide and formed on the insulating substrate by printing and firing; a resistance layer of a resistive material having a selected sheet resistance, being chemically reactive with the oxide, and formed between and bridging the conductor wiring layers by printing and firing; and a conductive barrier layer interposed between each of the conductor wiring layers and the resistance layer to prevent chemical reaction between the oxide of the conductor wiring layers and the resistive material of the resistance layer.

摘要翻译： 一种厚膜电路板，包括绝缘基板; 含有氧化物的导电材料的导体布线层，通过印刷和烧制形成在绝缘基板上; 具有选择的薄层电阻的电阻材料的电阻层，与氧化物发生化学反应，并通过印刷和烧制形成并桥接导体布线层; 以及插入在每个导体布线层和电阻层之间的导电阻挡层，以防止导体布线层的氧化物和电阻层的电阻材料之间的化学反应。

公开(公告)号：US5156903A

公开(公告)日：1992-10-20

申请号：US631853

申请日：1990-12-21

申请人： Takamasa Okumura ,  Kohmei Kawaguchi ,  Masataka Aoki ,  Takashi Nagasaka ,  Tohru Nomura ,  Yoshiyuki Miyase

发明人： Takamasa Okumura ,  Kohmei Kawaguchi ,  Masataka Aoki ,  Takashi Nagasaka ,  Tohru Nomura ,  Yoshiyuki Miyase

IPC分类号： B32B18/00 ,  H05K1/03 ,  H05K1/09 ,  H05K3/24 ,  H05K3/40 ,  H05K3/46

CPC分类号： B32B18/00 ,  H05K3/4061 ,  C04B2235/6567 ,  C04B2235/6582 ,  C04B2237/341 ,  C04B2237/343 ,  C04B2237/345 ,  H05K1/0306 ,  H05K1/092 ,  H05K2201/035 ,  H05K2203/121 ,  H05K3/248 ,  H05K3/4611 ,  H05K3/4629 ,  Y10S428/901 ,  Y10T428/24917 ,  Y10T428/24926

摘要： A multilayer ceramic substrate having improved mechanical and electrical properties and suitable for use to form a hybrid integrated circuit and a process for the manufacture thereof. The multilayer ceramic substrate has at least one layer of a first conductor based on a refractory metal as an internal conductor layer and at least one layer of a Cu-based second conductor as a surface conductor layer, wherein the second conductor layer is connected to the first conductor layer through a metallic layer formed by coating with a metalloorganics paste containing one or more metals selected from the group consisting of Pt, Pd, Ni, Cu, Au, Rh, Ru, Re, Co, and Ir followed by firing in an inert or reducing atmosphere.

摘要翻译： 一种具有改进的机械和电学性质并且适合用于形成混合集成电路的多层陶瓷基片及其制造方法。 多层陶瓷基板具有至少一层作为内部导体层的耐火金属的第一导体层和作为表面导体层的至少一层作为表面导体层的Cu系第二导体层，其中，第二导体层与 第一导体层通过用含有选自Pt，Pd，Ni，Cu，Au，Rh，Ru，Re，Co和Ir中的一种或多种金属的金属组合物糊料涂覆形成的金属层，随后在 惰性或还原气氛。

公开(公告)号：US5729893A

公开(公告)日：1998-03-24

申请号：US561539

申请日：1995-11-22

申请人： Nozomi Tanifuji ,  Akihiko Naito ,  Koji Sawada ,  Tohru Nomura ,  Yoshiyuki Miyase ,  Takashi Nagasaka

发明人： Nozomi Tanifuji ,  Akihiko Naito ,  Koji Sawada ,  Tohru Nomura ,  Yoshiyuki Miyase ,  Takashi Nagasaka

IPC分类号： H05K1/09 ,  H01L23/498 ,  H01L23/538 ,  H05K1/03 ,  H05K1/11 ,  H05K3/24 ,  H05K3/40 ,  H05K3/46 ,  H05K3/36 ,  H05K3/42

CPC分类号： H05K3/248 ,  H01L23/49883 ,  H01L23/5384 ,  H05K3/4061 ,  H01L2924/0002 ,  H05K1/0306 ,  H05K1/092 ,  H05K1/113 ,  H05K2201/035 ,  H05K3/245 ,  H05K3/4611 ,  H05K3/4629 ,  Y10S428/901 ,  Y10T29/49126 ,  Y10T29/49128 ,  Y10T29/49163 ,  Y10T29/49165

摘要： A method for producing a multilayer ceramic circuit substrate having therein internal conductor patterns comprising W and/or Mo as a main component and surface conductor patterns comprising Cu as a main component formed onto a surface layer of the multilayer ceramic circuit substrate, wherein an intermediate metal layer comprising 40 to 90 wt. % of W and/or Mo and 10 to 60 wt. % of at least one element selected from the group consisting of Ir, Pt, Ti, and Cr is formed in through-holes of the surface layer and on parts of the surface layer in the vicinity of the through holes on the surface layer, whereby the internal conductor patterns and the surface conductor patterns are electrically connected through the intermediate metal layer. The alumina multilayer ceramic circuit substrate enables an excellent bonding strength and electrical conductivity between the internal conductors and the surface conductors and high precision wiring and miniaturization of an electronic circuit part.

摘要翻译： 一种多层陶瓷电路基板的制造方法，其特征在于，具有以W和/或Mo为主要成分的内部导体图案，以及形成在所述多层陶瓷电路基板的表面层上的以Cu为主要成分的表面导体图案， 层包含40〜90重量％ W和/或Mo的％，和10〜60wt。 在表面层的通孔和表面层的通孔附近的表面层的一部分的通孔中形成选自由Ir，Pt，Ti和Cr组成的组中的至少一种元素的％，由此 内部导体图案和表面导体图案通过中间金属层电连接。 氧化铝多层陶瓷电路基板能够在内部导体和表面导体之间具有优异的接合强度和导电性，并且高精度布线和电子电路部件的小型化。

公开(公告)号：US5627344A

公开(公告)日：1997-05-06

申请号：US362129

申请日：1994-12-22

申请人： Nozomi Tanifuji ,  Akihiko Naito ,  Koji Sawada ,  Tohru Nomura ,  Yoshiyuki Miyase ,  Takashi Nagasaka

发明人： Nozomi Tanifuji ,  Akihiko Naito ,  Koji Sawada ,  Tohru Nomura ,  Yoshiyuki Miyase ,  Takashi Nagasaka

IPC分类号： H05K1/09 ,  H01L23/498 ,  H01L23/538 ,  H05K1/03 ,  H05K1/11 ,  H05K3/24 ,  H05K3/40 ,  H05K3/46

CPC分类号： H05K3/248 ,  H01L23/49883 ,  H01L23/5384 ,  H05K3/4061 ,  H01L2924/0002 ,  H05K1/0306 ,  H05K1/092 ,  H05K1/113 ,  H05K2201/035 ,  H05K3/245 ,  H05K3/4611 ,  H05K3/4629 ,  Y10S428/901 ,  Y10T29/49126 ,  Y10T29/49128 ,  Y10T29/49163 ,  Y10T29/49165

摘要： A multilayer ceramic circuit substrate having therein internal conductor patterns comprising W and/or Mo as a main component and surface conductor patterns comprising Cu as a main component formed onto a surface layer of the multilayer ceramic circuit substrate, wherein an intermediate metal layer comprising 40 to 90 wt. % of W and/or Mo and 10 to 60 wt. % of at least one element selected from the group consisting of Ir, Pt, Ti, and Cr is formed in through-holes of the surface layer and on parts of the surface layer in the vicinity of the through holes on the surface layer, whereby the internal conductor patterns and the surface conductor patterns are electrically connected through the intermediate metal layer. The alumina multilayer ceramic circuit substrate provides an excellent bonding strength and electrical conductivity between the internal conductors and the surface conductors and enables high precision wiring and miniaturization of an electronic circuit part.

摘要翻译： 一种多层陶瓷电路基板，其中具有包含W和/或Mo作为主要成分的内部导体图案和形成在所述多层陶瓷电路基板的表面层上的以Cu为主要成分的表面导体图案，其中， 90重量％ W和/或Mo的％，和10〜60wt。 在表面层的通孔和表面层的通孔附近的表面层的一部分的通孔中形成选自由Ir，Pt，Ti和Cr组成的组中的至少一种元素的％，由此 内部导体图案和表面导体图案通过中间金属层电连接。 氧化铝多层陶瓷电路基板在内部导体和表面导体之间提供优异的接合强度和导电性，并且能够实现电子电路部件的高精度布线和小型化。

公开(公告)号：US4994880A

公开(公告)日：1991-02-19

申请号：US412552

申请日：1989-09-25

申请人： Naohito Kato ,  Yoshiyuki Miyase ,  Tomoatsu Makino ,  Kasuhiro Yamada ,  Masami Yamaoka ,  Takeshi Matsui ,  Masahiro Yamamoto ,  Yoshiki Ishida ,  Tohru Nomura

发明人： Naohito Kato ,  Yoshiyuki Miyase ,  Tomoatsu Makino ,  Kasuhiro Yamada ,  Masami Yamaoka ,  Takeshi Matsui ,  Masahiro Yamamoto ,  Yoshiki Ishida ,  Tohru Nomura

IPC分类号： H01L29/72 ,  H01L29/06 ,  H01L29/417

CPC分类号： H01L29/0692 ,  H01L29/41708

摘要： Base regions of first and second stage transistors are formed in a semiconductor substrate consisting of low and high resistivity collector layers, and emitter regions are formed in the respective base regions. The emitter region of the second stage transistor has an interdigital structure with a plurality of finger portions, and an emitter surface electrode is formed on the emitter region of the second stage transistor. The second stage transistor emitter surface electrode has an extending portion at a position spaced apart from a transistor operation region where the finger portions are formed. An emitter connection electrode is formed on the extending portion, and a lead is connected by soldering or the like to the emitter connection electrode. In a portion of the emitter surface electrode extending from the emitter connection electrode to the transistor operation region, slits are formed such that they are bypassed by emitter current so that the lead resistance from each finger portion to the emitter connection electrode is substantially uniform.

摘要翻译： 第一和第二级晶体管的基极区域形成在由低和高电阻率集电极层组成的半导体衬底中，并且发射极区域形成在各个基极区域中。 第二级晶体管的发射极区域具有多个指状部分的叉指结构，并且发射极表面电极形成在第二级晶体管的发射极区域上。 第二级晶体管发射体表面电极在与形成指状部分的晶体管工作区间隔开的位置处具有延伸部分。 发射极连接电极形成在延伸部分上，引线通过焊接等连接到发射极连接电极。 在从发射极连接电极延伸到晶体管工作区域的发射体表面电极的一部分中，形成狭缝，使得它们被发射极电流旁路，使得从每个指状部分到发射极连接电极的引线电阻基本上均匀。

公开(公告)号：US4658788A

公开(公告)日：1987-04-21

申请号：US810291

申请日：1985-12-18

申请人： Noboru Yamamoto ,  Katsuhisa Mase ,  Motoshi Kawai ,  Yoshiyuki Miyase ,  Takeshi Matsui

发明人： Noboru Yamamoto ,  Katsuhisa Mase ,  Motoshi Kawai ,  Yoshiyuki Miyase ,  Takeshi Matsui

IPC分类号： F02P3/045 ,  F02P5/15 ,  F02P5/155 ,  F02P7/077 ,  F02P15/00

CPC分类号： F02P15/008 ,  F02P3/0456 ,  F02P5/1502 ,  F02P5/155 ,  F02P5/1558 ,  F02P7/077 ,  Y02T10/46

摘要： In an ignition system for an internal combustion engine, a signal generator generates a given ac signal in synchronism with the rotation of the engine and a waveform reshaping circuit reshapes the waveform of the ac signal from the signal generator thus generating a pulse signal. An ignition timing control circuit is responsive to the pulse signal from the waveform reshaping circuit to control the timing of ignition of an ignition coil in which a primary current is switched on and off in accordance with the pulse signal.

摘要翻译： 在内燃机的点火系统中，信号发生器与发动机的旋转同步地产生给定的交流信号，并且波形整形电路重新形成来自信号发生器的交流信号的波形，从而产生脉冲信号。 点火正时控制电路响应来自波形整形电路的脉冲信号，以根据脉冲信号控制其中初级电流被接通和断开的点火线圈的点火定时。

公开(公告)号：US06452219B1

公开(公告)日：2002-09-17

申请号：US08917488

申请日：1997-08-26

申请人： Yoshiyuki Miyase ,  Naohito Kato ,  Haruo Kawakita ,  Naoto Okabe

发明人： Yoshiyuki Miyase ,  Naohito Kato ,  Haruo Kawakita ,  Naoto Okabe

IPC分类号： H01L2974

CPC分类号： H01L29/66333 ,  H01L29/1095 ,  H01L29/7395 ,  Y10S257/913

摘要： An IGBT having a buffer layer for shortening the turn-off time and for preventing the latching up is improved. The buffer layer of the present invention is not bare at the edge of a diced cross-section of the IGBT chip. According to this construction, a withstanding voltage between a semiconductor substrate and the buffer layer is lower than the withstand voltage of the pn junction at the edge of the diced cross-section. Therefore, the whole pn junction between the semiconductor substrate and the buffer layer, which has wide area, breaks down, as a result, energy caused by a negative voltage is absorbed, and the withstanding voltage against the negative voltage is improved.

摘要翻译： 具有用于缩短关断时间和防止闭锁的缓冲层的IGBT得到改善。 本发明的缓冲层在IGBT芯片的切割截面的边缘处不裸露。 根据这种结构，半导体衬底和缓冲层之间的耐电压低于切割截面边缘处的pn结的耐电压。 因此，半导体衬底与具有宽面积的缓冲层之间的整个pn结被分解，结果，由负电压引起的能量被吸收，并且抵抗负电压的耐受电压提高。

公开(公告)号：US5343014A

公开(公告)日：1994-08-30

申请号：US838304

申请日：1992-03-12

申请人： Akihiko Ogino ,  Yoshiyuki Miyase ,  Shuuzi Sakou ,  Shinzi Shibata

发明人： Akihiko Ogino ,  Yoshiyuki Miyase ,  Shuuzi Sakou ,  Shinzi Shibata

IPC分类号： B23K26/32 ,  B23K26/00

CPC分类号： B23K26/32 ,  B23K26/323 ,  B23K2201/34 ,  B23K2203/12 ,  B23K2203/18 ,  B23K2203/22 ,  B23K2203/50

摘要： The present invention is to provide a method for laser welding different kinds of metals by which at least two types of metal members having mutually different laser reflection factor, are put one upon another and welded when the metal members are irradiated with lasers emitted in the superposed direction, comprising a process to put the first metal member on the second metal member, wherein the first metal member has a first laser reflection factor and the second metal member has a second laser reflection factor which is lower than that of the aforementioned first laser reflection factor, and the first and the second metal member are put one upon another through a metal layer and when irradiated with lasers, the aforementioned metal layer is more difficult to melt than the aforementioned second metal member. The method of the present invention further comprises a process in which lasers are irradiated from the aforementioned first metal member side. According to the aforementioned method, laser output which is sufficiently high to melt the first metal member having a high laser reflection factor, is irradiated from the first metal member side, so that this laser output is excessively high to melt the second metal member. However, the aforementioned metal layer acts as if it inhibits the laser input to the second metal member. Accordingly, abrupt laser input into the second metal member can be avoided, and the occurrence of scatter of the metal can be prevented so that an excellent joint condition can be obtained.

摘要翻译： PCT No.PCT / JP91 / 00913 371日期：1992年3月12日 102（e）1992年3月12日PCT PCT 1991年7月8日PCT公布。 出版物WO92 / 00828 日本1992年1月23日。本发明提供一种激光焊接不同种类的金属的方法，通过该方法将具有相互不同的激光反射系数的至少两种类型的金属构件放置在另一个上并在金属构件为 用叠加方向发射的激光照射，包括将第一金属构件放置在第二金属构件上的处理，其中第一金属构件具有第一激光反射系数，第二金属构件具有低于第二金属构件的第二激光反射系数 上述第一激光反射因子以及第一和第二金属构件通过金属层彼此重叠，并且当用激光照射时，上述金属层比上述第二金属构件更难熔化。 本发明的方法还包括从上述第一金属构件侧照射激光的工序。 根据上述方法，从第一金属构件侧照射足够高以熔化具有高激光反射系数的第一金属构件的激光输出，使得该激光输出过高而熔化第二金属构件。 然而，上述金属层的作用就好像它抑制了对第二金属构件的激光输入。 因此，可以避免输入到第二金属构件的突然的激光，并且可以防止金属的散射的发生，从而可以获得良好的接合状态。

公开(公告)号：US4649888A

公开(公告)日：1987-03-17

申请号：US723308

申请日：1985-04-15

申请人： Motoshi Kawai ,  Noboru Yamamoto ,  Katuhisa Mase ,  Takeshi Matsui ,  Tomoatsu Mikino ,  Yoshiyuki Miyase ,  Ryoichi Okuda ,  Koichi Suzumura

发明人： Motoshi Kawai ,  Noboru Yamamoto ,  Katuhisa Mase ,  Takeshi Matsui ,  Tomoatsu Mikino ,  Yoshiyuki Miyase ,  Ryoichi Okuda ,  Koichi Suzumura

IPC分类号： F02P5/155 ,  F02P3/045 ,  F02P3/05 ,  F02P5/15

CPC分类号： F02P3/053 ,  F02P3/0456 ,  F02P3/051 ,  F02P5/1502 ,  Y02T10/46

摘要： In an apparatus for controlling the energization time of an ignition coil of an internal combustion engine, a desired ignition timing is computed in accordance with a load and rotation speed of the engine and an energization starting time of the ignition coil is computed in accordance with the ignition timing. The energization starting time is retarded in accordance with the primary current through the ignition coil and the energization time of the ignition coil is reduced. The primary current flow through the ignition coil is interrupted at the ignition timing.

摘要翻译： 在用于控制内燃机的点火线圈的通电时间的装置中，根据发动机的负载和转速来计算期望的点火正时，并且根据该情况计算点火线圈的通电开始时间 点火正时 激励开始时间根据通过点火线圈的初级电流而延迟，并且点火线圈的通电时间减小。 在点火正时，通过点火线圈的初级电流中断。