公开(公告)号：US4994880A

公开(公告)日：1991-02-19

申请号：US412552

申请日：1989-09-25

申请人： Naohito Kato ,  Yoshiyuki Miyase ,  Tomoatsu Makino ,  Kasuhiro Yamada ,  Masami Yamaoka ,  Takeshi Matsui ,  Masahiro Yamamoto ,  Yoshiki Ishida ,  Tohru Nomura

发明人： Naohito Kato ,  Yoshiyuki Miyase ,  Tomoatsu Makino ,  Kasuhiro Yamada ,  Masami Yamaoka ,  Takeshi Matsui ,  Masahiro Yamamoto ,  Yoshiki Ishida ,  Tohru Nomura

IPC分类号： H01L29/72 ,  H01L29/06 ,  H01L29/417

CPC分类号： H01L29/0692 ,  H01L29/41708

摘要： Base regions of first and second stage transistors are formed in a semiconductor substrate consisting of low and high resistivity collector layers, and emitter regions are formed in the respective base regions. The emitter region of the second stage transistor has an interdigital structure with a plurality of finger portions, and an emitter surface electrode is formed on the emitter region of the second stage transistor. The second stage transistor emitter surface electrode has an extending portion at a position spaced apart from a transistor operation region where the finger portions are formed. An emitter connection electrode is formed on the extending portion, and a lead is connected by soldering or the like to the emitter connection electrode. In a portion of the emitter surface electrode extending from the emitter connection electrode to the transistor operation region, slits are formed such that they are bypassed by emitter current so that the lead resistance from each finger portion to the emitter connection electrode is substantially uniform.

摘要翻译： 第一和第二级晶体管的基极区域形成在由低和高电阻率集电极层组成的半导体衬底中，并且发射极区域形成在各个基极区域中。 第二级晶体管的发射极区域具有多个指状部分的叉指结构，并且发射极表面电极形成在第二级晶体管的发射极区域上。 第二级晶体管发射体表面电极在与形成指状部分的晶体管工作区间隔开的位置处具有延伸部分。 发射极连接电极形成在延伸部分上，引线通过焊接等连接到发射极连接电极。 在从发射极连接电极延伸到晶体管工作区域的发射体表面电极的一部分中，形成狭缝，使得它们被发射极电流旁路，使得从每个指状部分到发射极连接电极的引线电阻基本上均匀。

公开(公告)号：US5709927A

公开(公告)日：1998-01-20

申请号：US623836

申请日：1996-03-29

申请人： Yoshiyuki Miyase ,  Tohru Nomura ,  Akihiko Naito ,  Takamasa Okumura

发明人： Yoshiyuki Miyase ,  Tohru Nomura ,  Akihiko Naito ,  Takamasa Okumura

IPC分类号： H05K1/16 ,  H01C1/146 ,  H01L27/01 ,  B32B9/00

CPC分类号： H01C1/146 ,  H01L27/013 ,  Y10S428/901 ,  Y10T428/24917 ,  Y10T428/24926

摘要： A thick film circuit board comprising an insulating substrate; conductor wiring layers of a conductive material containing an oxide and formed on the insulating substrate by printing and firing; a resistance layer of a resistive material having a selected sheet resistance, being chemically reactive with the oxide, and formed between and bridging the conductor wiring layers by printing and firing; and a conductive barrier layer interposed between each of the conductor wiring layers and the resistance layer to prevent chemical reaction between the oxide of the conductor wiring layers and the resistive material of the resistance layer.

摘要翻译： 一种厚膜电路板，包括绝缘基板; 含有氧化物的导电材料的导体布线层，通过印刷和烧制形成在绝缘基板上; 具有选择的薄层电阻的电阻材料的电阻层，与氧化物发生化学反应，并通过印刷和烧制形成并桥接导体布线层; 以及插入在每个导体布线层和电阻层之间的导电阻挡层，以防止导体布线层的氧化物和电阻层的电阻材料之间的化学反应。

公开(公告)号：US5729893A

公开(公告)日：1998-03-24

申请号：US561539

申请日：1995-11-22

申请人： Nozomi Tanifuji ,  Akihiko Naito ,  Koji Sawada ,  Tohru Nomura ,  Yoshiyuki Miyase ,  Takashi Nagasaka

发明人： Nozomi Tanifuji ,  Akihiko Naito ,  Koji Sawada ,  Tohru Nomura ,  Yoshiyuki Miyase ,  Takashi Nagasaka

IPC分类号： H05K1/09 ,  H01L23/498 ,  H01L23/538 ,  H05K1/03 ,  H05K1/11 ,  H05K3/24 ,  H05K3/40 ,  H05K3/46 ,  H05K3/36 ,  H05K3/42

CPC分类号： H05K3/248 ,  H01L23/49883 ,  H01L23/5384 ,  H05K3/4061 ,  H01L2924/0002 ,  H05K1/0306 ,  H05K1/092 ,  H05K1/113 ,  H05K2201/035 ,  H05K3/245 ,  H05K3/4611 ,  H05K3/4629 ,  Y10S428/901 ,  Y10T29/49126 ,  Y10T29/49128 ,  Y10T29/49163 ,  Y10T29/49165

摘要： A method for producing a multilayer ceramic circuit substrate having therein internal conductor patterns comprising W and/or Mo as a main component and surface conductor patterns comprising Cu as a main component formed onto a surface layer of the multilayer ceramic circuit substrate, wherein an intermediate metal layer comprising 40 to 90 wt. % of W and/or Mo and 10 to 60 wt. % of at least one element selected from the group consisting of Ir, Pt, Ti, and Cr is formed in through-holes of the surface layer and on parts of the surface layer in the vicinity of the through holes on the surface layer, whereby the internal conductor patterns and the surface conductor patterns are electrically connected through the intermediate metal layer. The alumina multilayer ceramic circuit substrate enables an excellent bonding strength and electrical conductivity between the internal conductors and the surface conductors and high precision wiring and miniaturization of an electronic circuit part.

摘要翻译： 一种多层陶瓷电路基板的制造方法，其特征在于，具有以W和/或Mo为主要成分的内部导体图案，以及形成在所述多层陶瓷电路基板的表面层上的以Cu为主要成分的表面导体图案， 层包含40〜90重量％ W和/或Mo的％，和10〜60wt。 在表面层的通孔和表面层的通孔附近的表面层的一部分的通孔中形成选自由Ir，Pt，Ti和Cr组成的组中的至少一种元素的％，由此 内部导体图案和表面导体图案通过中间金属层电连接。 氧化铝多层陶瓷电路基板能够在内部导体和表面导体之间具有优异的接合强度和导电性，并且高精度布线和电子电路部件的小型化。

公开(公告)号：US5627344A

公开(公告)日：1997-05-06

申请号：US362129

申请日：1994-12-22

申请人： Nozomi Tanifuji ,  Akihiko Naito ,  Koji Sawada ,  Tohru Nomura ,  Yoshiyuki Miyase ,  Takashi Nagasaka

发明人： Nozomi Tanifuji ,  Akihiko Naito ,  Koji Sawada ,  Tohru Nomura ,  Yoshiyuki Miyase ,  Takashi Nagasaka

IPC分类号： H05K1/09 ,  H01L23/498 ,  H01L23/538 ,  H05K1/03 ,  H05K1/11 ,  H05K3/24 ,  H05K3/40 ,  H05K3/46

CPC分类号： H05K3/248 ,  H01L23/49883 ,  H01L23/5384 ,  H05K3/4061 ,  H01L2924/0002 ,  H05K1/0306 ,  H05K1/092 ,  H05K1/113 ,  H05K2201/035 ,  H05K3/245 ,  H05K3/4611 ,  H05K3/4629 ,  Y10S428/901 ,  Y10T29/49126 ,  Y10T29/49128 ,  Y10T29/49163 ,  Y10T29/49165

摘要： A multilayer ceramic circuit substrate having therein internal conductor patterns comprising W and/or Mo as a main component and surface conductor patterns comprising Cu as a main component formed onto a surface layer of the multilayer ceramic circuit substrate, wherein an intermediate metal layer comprising 40 to 90 wt. % of W and/or Mo and 10 to 60 wt. % of at least one element selected from the group consisting of Ir, Pt, Ti, and Cr is formed in through-holes of the surface layer and on parts of the surface layer in the vicinity of the through holes on the surface layer, whereby the internal conductor patterns and the surface conductor patterns are electrically connected through the intermediate metal layer. The alumina multilayer ceramic circuit substrate provides an excellent bonding strength and electrical conductivity between the internal conductors and the surface conductors and enables high precision wiring and miniaturization of an electronic circuit part.

摘要翻译： 一种多层陶瓷电路基板，其中具有包含W和/或Mo作为主要成分的内部导体图案和形成在所述多层陶瓷电路基板的表面层上的以Cu为主要成分的表面导体图案，其中， 90重量％ W和/或Mo的％，和10〜60wt。 在表面层的通孔和表面层的通孔附近的表面层的一部分的通孔中形成选自由Ir，Pt，Ti和Cr组成的组中的至少一种元素的％，由此 内部导体图案和表面导体图案通过中间金属层电连接。 氧化铝多层陶瓷电路基板在内部导体和表面导体之间提供优异的接合强度和导电性，并且能够实现电子电路部件的高精度布线和小型化。

公开(公告)号：US5156903A

公开(公告)日：1992-10-20

申请号：US631853

申请日：1990-12-21

申请人： Takamasa Okumura ,  Kohmei Kawaguchi ,  Masataka Aoki ,  Takashi Nagasaka ,  Tohru Nomura ,  Yoshiyuki Miyase

发明人： Takamasa Okumura ,  Kohmei Kawaguchi ,  Masataka Aoki ,  Takashi Nagasaka ,  Tohru Nomura ,  Yoshiyuki Miyase

IPC分类号： B32B18/00 ,  H05K1/03 ,  H05K1/09 ,  H05K3/24 ,  H05K3/40 ,  H05K3/46

CPC分类号： B32B18/00 ,  H05K3/4061 ,  C04B2235/6567 ,  C04B2235/6582 ,  C04B2237/341 ,  C04B2237/343 ,  C04B2237/345 ,  H05K1/0306 ,  H05K1/092 ,  H05K2201/035 ,  H05K2203/121 ,  H05K3/248 ,  H05K3/4611 ,  H05K3/4629 ,  Y10S428/901 ,  Y10T428/24917 ,  Y10T428/24926

摘要： A multilayer ceramic substrate having improved mechanical and electrical properties and suitable for use to form a hybrid integrated circuit and a process for the manufacture thereof. The multilayer ceramic substrate has at least one layer of a first conductor based on a refractory metal as an internal conductor layer and at least one layer of a Cu-based second conductor as a surface conductor layer, wherein the second conductor layer is connected to the first conductor layer through a metallic layer formed by coating with a metalloorganics paste containing one or more metals selected from the group consisting of Pt, Pd, Ni, Cu, Au, Rh, Ru, Re, Co, and Ir followed by firing in an inert or reducing atmosphere.

摘要翻译： 一种具有改进的机械和电学性质并且适合用于形成混合集成电路的多层陶瓷基片及其制造方法。 多层陶瓷基板具有至少一层作为内部导体层的耐火金属的第一导体层和作为表面导体层的至少一层作为表面导体层的Cu系第二导体层，其中，第二导体层与 第一导体层通过用含有选自Pt，Pd，Ni，Cu，Au，Rh，Ru，Re，Co和Ir中的一种或多种金属的金属组合物糊料涂覆形成的金属层，随后在 惰性或还原气氛。

公开(公告)号：US20120223444A1

公开(公告)日：2012-09-06

申请号：US13449484

申请日：2012-04-18

申请人： Tetsuto YAMAGISHI ,  Tohru Nomura ,  Norihisa Imaizumi ,  Yasutomi Asai

发明人： Tetsuto YAMAGISHI ,  Tohru Nomura ,  Norihisa Imaizumi ,  Yasutomi Asai

IPC分类号： H01L23/28 ,  H01L21/56

CPC分类号： H01L24/83 ,  H01L21/4807 ,  H01L23/13 ,  H01L23/15 ,  H01L23/315 ,  H01L23/3677 ,  H01L23/4334 ,  H01L23/49506 ,  H01L23/49531 ,  H01L23/49822 ,  H01L23/50 ,  H01L23/562 ,  H01L24/45 ,  H01L24/48 ,  H01L24/73 ,  H01L25/16 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48247 ,  H01L2224/73204 ,  H01L2224/73265 ,  H01L2924/00014 ,  H01L2924/01019 ,  H01L2924/01046 ,  H01L2924/01068 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/1461 ,  H01L2924/15192 ,  H01L2924/15747 ,  H01L2924/15787 ,  H01L2924/181 ,  H01L2924/1815 ,  H01L2924/19015 ,  H01L2924/19041 ,  H01L2924/19105 ,  H01L2924/19107 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45015 ,  H01L2924/207

摘要： An electronic device includes: a substrate having first and second surfaces, wherein the first surface is opposite to the second surface; a first electronic element mounted on the first surface of the substrate; a second electronic element mounted on the second surface of the substrate; and a resin mold sealing the first electronic element and the first surface of the substrate. The resin mold further seals the second electronic element on the second surface of the substrate. The second surface of the substrate has a portion, which is exposed from the resin mold. The second electronic element is not disposed on the portion of the second surface.

摘要翻译： 电子设备包括：具有第一和第二表面的基底，其中第一表面与第二表面相对; 安装在所述基板的第一表面上的第一电子元件; 安装在所述基板的第二表面上的第二电子元件; 以及密封第一电子元件和基板的第一表面的树脂模具。 树脂模具进一步密封基板的第二表面上的第二电子元件。 基板的第二表面具有从树脂模露出的部分。 第二电子元件不设置在第二表面的部分上。

公开(公告)号：US07417318B2

公开(公告)日：2008-08-26

申请号：US10831229

申请日：2004-04-26

申请人： Tohru Nomura ,  Yoshihiro Shimoide ,  Yoshihiko Shiraishi ,  Rikiya Kamimura ,  Hiroshi Kasugai

发明人： Tohru Nomura ,  Yoshihiro Shimoide ,  Yoshihiko Shiraishi ,  Rikiya Kamimura ,  Hiroshi Kasugai

IPC分类号： H01L23/48

CPC分类号： H05K3/4061 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/48227 ,  H01L2224/48472 ,  H01L2224/73265 ,  H05K1/092 ,  H05K3/248 ,  H05K2201/035 ,  H05K2201/09981 ,  H05K2203/1572 ,  H01L2924/00

摘要： A thick film circuit board that can be produced at a low cost, a method of producing the same, and an integrated circuit device. A first thick film circuit board has conducting layers of a copper-containing conductor fired at not higher than 750° C., and includes conducting portions formed by using a silver-containing conductor. A second thick film circuit board has conductors that are formed in the through holes so as to close the openings of at least the one side thereof. The thick film circuit board is produced at a low cost and suppresses a drop in electric conductivity when it is in use.

摘要翻译： 可以低成本制造的厚膜电路板，其制造方法和集成电路器件。 第一厚膜电路板具有在不高于750℃下烧制的含铜导体的导电层，并且包括通过使用含银导体形成的导电部分。 第二厚膜电路板具有形成在通孔中的导体，以便至少封闭其一侧的开口。 以低成本生产厚膜电路板，并且在使用时抑制电导率的降低。

公开(公告)号：US20070278623A1

公开(公告)日：2007-12-06

申请号：US11806675

申请日：2007-06-01

申请人： Tohru Nomura

发明人： Tohru Nomura

IPC分类号： H01L29/40

CPC分类号： H05K3/284 ,  H01L23/24 ,  H01L23/3135 ,  H01L24/48 ,  H01L25/16 ,  H01L2224/48227 ,  H01L2924/00014 ,  H01L2924/01057 ,  H01L2924/14 ,  H01L2924/19041 ,  H01L2924/19105 ,  H05K1/0263 ,  H05K2201/0162 ,  H05K2201/10015 ,  H05K2201/10272 ,  H05K2201/2045 ,  H05K2203/1322 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： An electric circuit device and related manufacturing method are disclosed as having a case incorporating therein a substrate on which electric circuit elements are mounted. A sealant is filled in the case to cover the electric circuit elements and the substrate and is composed of a lower layer gel and an upper layer gel formed in a two-layer structure. The upper layer gel has a penetration equal to or less than 90 and the lower layer gel has a penetration greater than that of the upper layer gel to allow the upper layer gel to suppress vibration of a surface of the lower gel for thereby suppressing the deformation of the lower layer gel even in the presence of a tendency causing the electric circuit elements or the substrate to vibrate, preventing a degraded function in insulation, waterproof and vibrational relaxation of the lower layer gel.

摘要翻译： 公开了一种电路装置及相关的制造方法，其具有其中安装有电路元件的基板的壳体。 在壳体中填充密封剂以覆盖电路元件和基板，并且由下层凝胶和形成为两层结构的上层凝胶组成。 上层凝胶具有等于或小于90的渗透性，并且下层凝胶的穿透力大于上层凝胶的渗透，以允许上层凝胶抑制下凝胶表面的振动，从而抑制变形 即使存在导致电路元件或基板振动的趋势，防止下层凝胶的绝缘，防水和振动松弛的功能降低。

公开(公告)号：US08749055B2

公开(公告)日：2014-06-10

申请号：US13449484

申请日：2012-04-18

申请人： Tetsuto Yamagishi ,  Tohru Nomura ,  Norihisa Imaizumi ,  Yasutomi Asai

发明人： Tetsuto Yamagishi ,  Tohru Nomura ,  Norihisa Imaizumi ,  Yasutomi Asai

IPC分类号： H01L23/28 ,  H01L21/56

CPC分类号： H01L24/83 ,  H01L21/4807 ,  H01L23/13 ,  H01L23/15 ,  H01L23/315 ,  H01L23/3677 ,  H01L23/4334 ,  H01L23/49506 ,  H01L23/49531 ,  H01L23/49822 ,  H01L23/50 ,  H01L23/562 ,  H01L24/45 ,  H01L24/48 ,  H01L24/73 ,  H01L25/16 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48247 ,  H01L2224/73204 ,  H01L2224/73265 ,  H01L2924/00014 ,  H01L2924/01019 ,  H01L2924/01046 ,  H01L2924/01068 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/1461 ,  H01L2924/15192 ,  H01L2924/15747 ,  H01L2924/15787 ,  H01L2924/181 ,  H01L2924/1815 ,  H01L2924/19015 ,  H01L2924/19041 ,  H01L2924/19105 ,  H01L2924/19107 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45015 ,  H01L2924/207

摘要： An electronic device includes: a substrate having first and second surfaces, wherein the first surface is opposite to the second surface; a first electronic element mounted on the first surface of the substrate; a second electronic element mounted on the second surface of the substrate; and a resin mold sealing the first electronic element and the first surface of the substrate. The resin mold further seals the second electronic element on the second surface of the substrate. The second surface of the substrate has a portion, which is exposed from the resin mold. The second electronic element is not disposed on the portion of the second surface.

摘要翻译： 电子设备包括：具有第一和第二表面的基底，其中第一表面与第二表面相对; 安装在所述基板的第一表面上的第一电子元件; 安装在所述基板的第二表面上的第二电子元件; 以及密封第一电子元件和基板的第一表面的树脂模具。 树脂模具进一步密封基板的第二表面上的第二电子元件。 基板的第二表面具有从树脂模露出的部分。 第二电子元件不设置在第二表面的部分上。

公开(公告)号：US07675150B2

公开(公告)日：2010-03-09

申请号：US11806675

申请日：2007-06-01

申请人： Tohru Nomura

发明人： Tohru Nomura

IPC分类号： H01L21/302

CPC分类号： H05K3/284 ,  H01L23/24 ,  H01L23/3135 ,  H01L24/48 ,  H01L25/16 ,  H01L2224/48227 ,  H01L2924/00014 ,  H01L2924/01057 ,  H01L2924/14 ,  H01L2924/19041 ,  H01L2924/19105 ,  H05K1/0263 ,  H05K2201/0162 ,  H05K2201/10015 ,  H05K2201/10272 ,  H05K2201/2045 ,  H05K2203/1322 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/45015 ,  H01L2924/207

摘要： An electric circuit device and related manufacturing method are disclosed as having a case incorporating therein a substrate on which electric circuit elements are mounted. A sealant is filled in the case to cover the electric circuit elements and the substrate and is composed of a lower layer gel and an upper layer gel formed in a two-layer structure. The upper layer gel has a penetration equal to or less than 90 and the lower layer gel has a penetration greater than that of the upper layer gel to allow the upper layer gel to suppress vibration of a surface of the lower gel for thereby suppressing the deformation of the lower layer gel even in the presence of a tendency causing the electric circuit elements or the substrate to vibrate, preventing a degraded function in insulation, waterproof and vibrational relaxation of the lower layer gel.

摘要翻译： 公开了一种电路装置及相关的制造方法，其具有其中安装有电路元件的基板的壳体。 在壳体中填充密封剂以覆盖电路元件和基板，并且由下层凝胶和形成为两层结构的上层凝胶组成。 上层凝胶具有等于或小于90的渗透性，并且下层凝胶的穿透力大于上层凝胶的渗透，以允许上层凝胶抑制下凝胶表面的振动，从而抑制变形 即使存在导致电路元件或基板振动的趋势，防止下层凝胶的绝缘，防水和振动松弛的功能降低。