利索-全球专利检索

  1. 登录
  2. 注册

搜索结果

18 条记录 (耗时 0.024 秒)

    System to control effective series resistance of decoupling capacitor
    2.
    发明申请
    System to control effective series resistance of decoupling capacitor 有权
    系统来控制去耦电容的有效串联电阻

    公开(公告)号：US20060091564A1

    公开(公告)日：2006-05-04

    申请号：US10976716

    申请日：2004-10-29

    申请人： Dong Zhong ,  David Figueroa ,  Yuan-Liang Li ,  Michael Desmith

    发明人： Dong Zhong ,  David Figueroa ,  Yuan-Liang Li ,  Michael Desmith

    IPC分类号： H01L23/52 ,  H01L23/48

    CPC分类号： H01L23/50 ,  H01L2224/16225 ,  H01L2924/01079 ,  H01L2924/15311 ,  H01L2924/15312 ,  H01L2924/19106

    摘要： According to some embodiments, a system includes an integrated circuit package to support an integrated circuit die. The integrated circuit package may include a plurality of conductive contacts and a decoupling capacitor. The decoupling capacitor may include a positive terminal contact pad coupled to a first one of the plurality of conductive contacts, the positive terminal contact pad comprising a first substantially non-conductive area, and a negative terminal contact pad coupled to a second one of the plurality of conductive contacts, the negative terminal contact pad comprising a second substantially non-conductive area.

    摘要翻译： 根据一些实施例，系统包括用于支撑集成电路管芯的集成电路封装。 集成电路封装可以包括多个导电触点和去耦电容器。 去耦电容器可以包括耦合到多个导电触点中的第一个的正极端子接触焊盘，正极端子接触焊盘包括第一基本上不导电的区域，以及耦合到多个导电触点中的第二个的负极端子接触焊盘 的导电触点，负极接触焊盘包括第二基本上不导电的区域。

    CAPACITOR HAVING SEPARATE TERMINALS ON THREE OR MORE SIDES AND METHODS OF FABRICATION
    5.
    发明申请
    CAPACITOR HAVING SEPARATE TERMINALS ON THREE OR MORE SIDES AND METHODS OF FABRICATION 审中-公开
    在三面或三面以上具有单独端子的电容器和制造方法

    公开(公告)号：US20060256502A1

    公开(公告)日：2006-11-16

    申请号：US11460290

    申请日：2006-07-27

    申请人： Yuan-Liang Li ,  David Figueroa ,  Chee-Yee Chung

    发明人： Yuan-Liang Li ,  David Figueroa ,  Chee-Yee Chung

    IPC分类号： H01G4/228

    CPC分类号： H01G4/232

    摘要： A multilayer capacitor comprises separate terminals on at least three sides, and on as many as six sides. The capacitor can be fabricated in a large number of different configurations, types, and sizes, depending upon the target application. The separate terminals that are disposed on different sides of the capacitor can be readily coupled to a variety of different adjacent conductors, such as die terminals (including bumpless terminals or bars), IC package terminals (including pads or bars), and the terminals of adjacent discrete components. Methods of fabrication, as well as application of the capacitor to an electronic assembly, are also described.

    摘要翻译： 多层电容器包括在至少三个侧面上以及多达六个侧面的分开的端子。 根据目标应用，电容器可以以大量不同的配置，类型和尺寸制造。 设置在电容器的不同侧上的单独的端子可以容易地耦合到各种不同的相邻导体，例如模具端子（包括无扰动端子或条），IC封装端子（包括焊盘或条），以及端子 相邻的分立元件。 还描述了制造方法以及将电容器应用于电子组件。

    Capacitor pad network to manage equivalent series resistance
    6.
    发明申请
    Capacitor pad network to manage equivalent series resistance 审中-公开
    电容焊盘网络来管理等效的串联电阻

    公开(公告)号：US20060138639A1

    公开(公告)日：2006-06-29

    申请号：US11024059

    申请日：2004-12-28

    申请人： David Figueroa ,  Jennifer Hester ,  Yuan-Liang Li

    发明人： David Figueroa ,  Jennifer Hester ,  Yuan-Liang Li

    IPC分类号： H01L23/12

    CPC分类号： H01L23/49827 ,  H01L23/49822 ,  H01L23/49838 ,  H01L23/50 ,  H01L2224/16 ,  H01L2924/01079 ,  H01L2924/15312 ,  H01L2924/19103 ,  H01L2924/19106 ,  H05K1/0231 ,  H05K1/113 ,  H05K3/4644 ,  H05K2201/09627 ,  H05K2201/097 ,  H05K2201/09709

    摘要： According to some embodiments, an apparatus includes a first conductive pad, a first conductive plane, first dielectric material disposed between the first conductive plane and the first conductive pad, a second conductive plane, second dielectric material disposed between the first conductive plane and the second conductive plane, and a first conductive network. The first conductive network includes a first microvia within the first dielectric material and coupled to the first conductive pad, a first conductive trace within the first conductive plane and coupled to the first microvia, a second microvia within the second dielectric material and coupled to the first conductive trace, a second conductive trace within the second conductive plane and coupled to the second microvia, a third microvia within the second dielectric material and coupled to the second conductive trace, a third conductive trace within the first conductive plane and coupled to the third microvia, and a fourth microvia within the second dielectric material and coupled to the third conductive trace.

    摘要翻译： 根据一些实施例，装置包括第一导电焊盘，第一导电平面，设置在第一导电平面和第一导电焊盘之间的第一电介质材料，第二导电平面，第二电介质材料，设置在第一导电平面和第二导电平面之间 导电平面和第一导电网络。 所述第一导电网络包括所述第一电介质材料内的第一微孔并且耦合到所述第一导电焊盘，所述第一导电平面内的第一导电迹线并耦合到所述第一微孔，所述第二介电材料内的第二微孔， 导电迹线，第二导电平面内的第二导电迹线，并且耦合到第二微孔，在第二介电材料内的第三微孔并耦合到第二导电迹线，第一导电平面内的第三导电迹线并耦合到第三微孔 以及在第二电介质材料内的第四微孔并且耦合到第三导电迹线。

    INDUCTIVE FILTERS AND METHODS OF FABRICATION THEREFOR
    9.
    发明申请
    INDUCTIVE FILTERS AND METHODS OF FABRICATION THEREFOR 有权
    电感滤波器及其制造方法

    公开(公告)号：US20060267216A1

    公开(公告)日：2006-11-30

    申请号：US11462611

    申请日：2006-08-04

    申请人： Yuan-Liang Li ,  David Figueroa

    发明人： Yuan-Liang Li ,  David Figueroa

    IPC分类号： H01L23/48

    CPC分类号： H01F17/0033 ,  H01F41/041 ,  H01L23/49822 ,  H01L23/49838 ,  H01L2224/16 ,  H01L2924/00014 ,  H01L2924/01046 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01087 ,  H01L2924/15312 ,  H05K1/115 ,  H05K1/165 ,  H05K3/06 ,  H05K3/42 ,  H05K2201/086 ,  H05K2201/097 ,  H05K2201/1006 ,  H05K2203/0723 ,  H01L2224/0401

    摘要： A series of plated through hole (PTH) vias are interconnected by traces that alternate between a top surface and a bottom surface of a dielectric board. The PTH vias in the series can be positioned to create a collinear inductive filter, a coil-type inductive filter, or a transformer. Multiple, electrically isolated series of interconnected PTH vias can be used as a multi-phase inductive filter in one embodiment. In another embodiment, multiple series of interconnected PTH vias are electrically connected by a linking portion of conductive material, resulting in a low-resistance inductive filter. Ferromagnetic material patterns can be embedded in the dielectric board to enhance the inductive characteristics of the interconnected via structures. In one embodiment, a closed-end pattern is provided with two series of interconnected vias coiling around the pattern, resulting in an embedded transformer structure. A method of producing an interconnected series of PTH vias includes providing a dielectric board having a series of holes. In some embodiments, the board includes an embedded ferromagnetic material pattern. The holes and the top and bottom surface of the dielectric board have a conductive material thereupon. Portions of the conductive material are selectively removed, resulting in the embedded inductive filter and/or transformer structure.

    摘要翻译： 一系列电镀通孔（PTH）通孔在电介质板的顶表面和底表面之间交替的迹线互连。 该系列中的PTH通孔可以定位成产生共线感应滤波器，线圈型感应滤波器或变压器。 在一个实施例中，多个电隔离的互连PTH通孔系列可用作多相感应滤波器。 在另一个实施例中，多个互连的PTH通孔系列通过导电材料的连接部分电连接，导致低电阻感应滤波器。 铁磁材料图案可以嵌入电介质板中以增强互连通孔结构的感应特性。 在一个实施例中，闭合端图案具有围绕图案卷绕的两系列互连的通孔，从而形成嵌入式变压器结构。 制造互连的PTH通孔系列的方法包括提供具有一系列孔的电介质板。 在一些实施例中，板包括嵌入的铁磁材料图案。 电介质板的孔和顶表面和底表面具有导电材料。 选择性地去除导电材料的部分，从而产生嵌入的感应滤波器和/或变压器结构。

    Capacitor design for controlling equivalent series resistance
    10.
    发明申请
    Capacitor design for controlling equivalent series resistance 有权
    用于控制等效串联电阻的电容器设计

    公开(公告)号：US20060139847A1

    公开(公告)日：2006-06-29

    申请号：US11024060

    申请日：2004-12-28

    申请人： Yuan-Liang Li ,  David Figueroa ,  Farzaneh Yahyaei-moayyed ,  Dong Zhong

    发明人： Yuan-Liang Li ,  David Figueroa ,  Farzaneh Yahyaei-moayyed ,  Dong Zhong

    IPC分类号： H01G4/228

    CPC分类号： H01G4/012 ,  H01G4/232 ,  H01G4/30 ,  H01L2224/16 ,  H01L2924/15312 ,  H01L2924/19103 ,  H01L2924/19106 ,  H05K1/0231

    摘要： According to some embodiments, a capacitor includes a first external capacitor plane comprising a first at least one terminal of a first polarity, and a first internal capacitor plane comprising a second at least one terminal of the first polarity. The second at least one terminal of the first polarity may be electrically coupled to the first at least one terminal of the first polarity, and a total area of the second at least one terminal of the first polarity may be less than a total area of the first at least one terminal of the first polarity.

    摘要翻译： 根据一些实施例，电容器包括包括第一极性的第一至少一个端子和包括第一极性的第二至少一个端子的第一内部电容器平面的第一外部电容器平面。 第一极性的第二至少一个端子可以电耦合到第一极性的第一至少一个端子，并且第一极性的第二至少一个端子的总面积可以小于第一极性的总面积 第一极性的至少一个端子。