公开(公告)号：US20090166644A1

公开(公告)日：2009-07-02

申请号：US12293196

申请日：2007-03-22

申请人： Yuichi Hiroyama ,  Masahiko Hata ,  Yoshihiko Tsuchida

发明人： Yuichi Hiroyama ,  Masahiko Hata ,  Yoshihiko Tsuchida

IPC分类号： H01L33/00

CPC分类号： G02B6/0068 ,  G02B6/0025 ,  G02B6/0046 ,  G02B6/0051 ,  G02B6/0073 ,  H01L27/156 ,  H01L51/0007 ,  H01L51/5036

摘要： A monolithic light-emitting device and driving method therefore includes a plurality of light-emitting diodes, array-arranged monolithically on a single substrate. Thie light-emitting diodes include a pn junction-containing semiconductor material and a phosphor-containing layer passing light emitted from the semiconductor material, absorbing part, or whole of the light for conversion into light having a different wavelength. The array is constituted of a light-emitting diode group consisting of m (m≧2) pieces of the light-emitting diode, the light emitting diode group being constituted of N types (N≧2, providing N≦m) of light-emitting diodes, each having either one of preset N types of light-emitting spectrum patterns. An average light-emitting spectrum from the whole array can be changed by regulating a power supplied to the light-emitting diodes for each light-emitting diode group sorted according to the type of the light-emitting spectrum pattern.

摘要翻译： 因此，单片发光器件和驱动方法包括多个发光二极管，其单个阵列地排列在单个衬底上。 发光二极管包括含有pn结的半导体材料和通过从半导体材料发射的光的含磷光体层，吸收部分或全部光以转换成具有不同波长的光。 该阵列由发光二极管的m（m≥2）个组成的发光二极管组构成，发光二极管组由N种（N> = 2，提供N

公开(公告)号：US07956366B2

公开(公告)日：2011-06-07

申请号：US12293196

申请日：2007-03-22

申请人： Yuichi Hiroyama ,  Masahiko Hata ,  Yoshihiko Tsuchida

发明人： Yuichi Hiroyama ,  Masahiko Hata ,  Yoshihiko Tsuchida

IPC分类号： H01L33/00

CPC分类号： G02B6/0068 ,  G02B6/0025 ,  G02B6/0046 ,  G02B6/0051 ,  G02B6/0073 ,  H01L27/156 ,  H01L51/0007 ,  H01L51/5036

摘要： A monolithic light-emitting device and driving method therefore includes a plurality of light-emitting diodes, array-arranged monolithically on a single substrate. The light-emitting diodes include a pn junction-containing semiconductor material and a phosphor-containing layer passing light emitted from the semiconductor material, absorbing part, or whole of the light for conversion into light having a different wavelength. The array is constituted of a light-emitting diode group consisting of m (m≧2) pieces of the light-emitting diode, the light emitting diode group being constituted of N types (N≧2, providing N≦m) of light-emitting diodes, each having either one of preset N types of light-emitting spectrum patterns. An average light-emitting spectrum from the whole array can be changed by regulating a power supplied to the light-emitting diodes for each light-emitting diode group sorted according to the type of the light-emitting spectrum pattern.

摘要翻译： 因此，单片发光器件和驱动方法包括多个发光二极管，其单个阵列地排列在单个衬底上。 发光二极管包括含有pn结的半导体材料和通过从半导体材料发射的光的含磷光体层，吸收部分或全部光以转换成具有不同波长的光。 该阵列由发光二极管m（m≥2）组成的发光二极管组构成，发光二极管组由N种（N≥2，提供N＆amp; N，E） 发光二极管，每个具有预设N种类型的发光光谱图案中的任一种。 可以通过调节根据发光光谱图案的类型分类的每个发光二极管组的发光二极管的电力来改变来自整个阵列的平均发光光谱。

公开(公告)号：US20090320746A1

公开(公告)日：2009-12-31

申请号：US12524519

申请日：2008-01-24

申请人： Yoshihiko Tsuchida ,  Masahiko Hata

发明人： Yoshihiko Tsuchida ,  Masahiko Hata

IPC分类号： C30B25/02 ,  C23C16/54

CPC分类号： C23C16/303 ,  C23C16/45585 ,  C30B25/02 ,  C30B29/406 ,  H01L21/0242 ,  H01L21/02458 ,  H01L21/0254 ,  H01L21/02576 ,  H01L21/02579 ,  H01L21/0262 ,  H01L33/007

摘要： The present invention provides a method for producing a Group III-V compound semiconductor, comprising a step of feeding a Group III raw material, a Group V raw material, a carrier gas, and if necessary, other raw materials, to a reactor to grow a Group III-V compound semiconductor on a substrate in the reactor by a metalorganic vapor phase epitaxy, wherein the Group III raw material and the Group V raw material are independently fed to the reactor, and hydrogen halide is fed to the reactor together with a raw material other than the Group V raw material, or the carrier gas.

摘要翻译： 本发明提供了一种III-V族化合物半导体的制造方法，其特征在于，包括将III族原料，V族原料，载气，必要时将其他原料进料到反应器中生长的工序 通过金属有机气相外延在反应器中的基板上的III-V族化合物半导体，其中第III族原料和第V族原料独立地进料到反应器中，并将卤化氢与 不属于V组原料的原料，或载气。

公开(公告)号：US08890213B2

公开(公告)日：2014-11-18

申请号：US13301272

申请日：2011-11-21

申请人： Sadanori Yamanaka ,  Masahiko Hata ,  Noboru Fukuhara

发明人： Sadanori Yamanaka ,  Masahiko Hata ,  Noboru Fukuhara

IPC分类号： H01L29/70 ,  H01L29/66 ,  H01L31/0304 ,  H01L29/737 ,  H01L21/02 ,  H01L31/0312 ,  H01L31/18

CPC分类号： H01L29/7371 ,  H01L21/02381 ,  H01L21/0245 ,  H01L21/02521 ,  H01L21/02546 ,  H01L21/0262 ,  H01L21/02639 ,  H01L29/66318 ,  H01L31/0304 ,  H01L31/03044 ,  H01L31/0312 ,  H01L31/1852 ,  Y02E10/544 ,  Y02P70/521

摘要： There is provided a semiconductor wafer including a base wafer that has an impurity region in which an impurity atom has been introduced into silicon, a plurality of seed bodies provided in contact with the impurity region, and a plurality of compound semiconductors each provided in contact with the corresponding seed bodies and lattice-matched or pseudo-lattice-matched to the corresponding seed bodies. The semiconductor wafer can further include an inhibitor provided on the base wafer and in which a plurality of apertures exposing at least a part of the impurity region are provided.

摘要翻译： 提供了一种半导体晶片，其包括：基底晶片，其具有将杂质原子引入到硅中的杂质区域，与杂质区域接触的多个晶种;以及多个化合物半导体，各自与 相应的种子体和与对应的种子晶格匹配或伪晶格匹配。 半导体晶片还可以包括设置在基底晶片上的抑制剂，其中设置暴露至少一部分杂质区域的多个孔。

公开(公告)号：US08878250B2

公开(公告)日：2014-11-04

申请号：US13594442

申请日：2012-08-24

申请人： Masahiko Hata ,  Sadanori Yamanaka ,  Tomoyuki Takada ,  Kazuhiko Honjo

发明人： Masahiko Hata ,  Sadanori Yamanaka ,  Tomoyuki Takada ,  Kazuhiko Honjo

IPC分类号： H01L29/737 ,  H01L23/31 ,  H01L27/06 ,  H01L23/00

CPC分类号： H01L27/0605 ,  H01L23/3121 ,  H01L23/3171 ,  H01L23/3192 ,  H01L24/03 ,  H01L24/05 ,  H01L24/13 ,  H01L2224/0401 ,  H01L2224/05569 ,  H01L2224/05571 ,  H01L2224/13023 ,  H01L2224/94 ,  H01L2924/00014 ,  H01L2924/0002 ,  H01L2924/01004 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01023 ,  H01L2924/01029 ,  H01L2924/01032 ,  H01L2924/01033 ,  H01L2924/01074 ,  H01L2924/01082 ,  H01L2924/10329 ,  H01L2924/10336 ,  H01L2924/1305 ,  H01L2924/1306 ,  H01L2924/14 ,  H01L2224/03 ,  H01L2224/11 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2224/05552

摘要： Electronic device is provided, including: a base wafer whose surface is made of silicon crystal; a Group 3-5 compound semiconductor crystal formed directly or indirectly on partial region of the silicon crystal; an electronic element including a portion of the Group 3-5 compound semiconductor crystal as active layer; an insulating film formed directly or indirectly on the base wafer and covering the electronic element; an electrode formed directly or indirectly on the insulating film; a first coupling wiring extending through the insulating film, having at least a portion thereof formed directly or indirectly on the insulating film, and electrically coupling the electronic element with the electrode; a passive element formed directly or indirectly on the insulating film; a second coupling wiring extending through the insulating film, having at least a portion thereof formed directly or indirectly on the insulating film, and electrically coupling the electronic element with the passive element.

摘要翻译： 提供电子器件，其包括：其表面由硅晶体制成的基底晶片; 在硅晶体的部分区域上直接或间接形成的3-5族化合物半导体晶体; 包含部分3-5族化合物半导体晶体作为活性层的电子元件; 直接或间接地形成在基底晶片上并覆盖电子元件的绝缘膜; 在绝缘膜上直接或间接形成的电极; 延伸穿过所述绝缘膜的第一耦合布线，其至少一部分直接或间接地形成在所述绝缘膜上，并且将所述电子元件与所述电极电耦合; 绝缘膜上直接或间接形成的无源元件; 延伸穿过绝缘膜的第二耦合布线，其至少一部分直接或间接地形成在绝缘膜上，并将电子元件与无源元件电连接。

公开(公告)号：US08772830B2

公开(公告)日：2014-07-08

申请号：US12811074

申请日：2008-12-26

申请人： Tomoyuki Takada ,  Sadanori Yamanaka ,  Masahiko Hata

发明人： Tomoyuki Takada ,  Sadanori Yamanaka ,  Masahiko Hata

IPC分类号： H01L29/12

CPC分类号： H01L29/045 ,  H01L21/02381 ,  H01L21/02433 ,  H01L21/0245 ,  H01L21/02463 ,  H01L21/02516 ,  H01L21/02546 ,  H01L21/0262 ,  H01L21/02639 ,  H01L29/205 ,  H01L29/66242 ,  H01L29/7371

摘要： A high-quality GaAs-type crystal thin film using an inexpensive Si wafer with good thermal release characteristics is achieved. Provided is a semiconductor wafer comprising an Si wafer; an inhibiting layer that is formed on the wafer and that inhibits crystal growth, the inhibiting layer including a covering region that covers a portion of the wafer and an open region that does not cover a portion of the wafer within the covering region; a Ge layer that is crystal-grown in the open region; a buffer layer that is crystal-grown on the Ge layer and is a group 3-5 compound semiconductor layer containing P; and a functional layer that is crystal-grown on the buffer layer. The Ge layer may be formed then annealing with a temperature and duration that enables movement of crystal defects.

摘要翻译： 实现了具有良好热释放特性的廉价Si晶片的高质量GaAs型晶体薄膜。 提供了包括Si晶片的半导体晶片; 所述抑制层形成在所述晶片上并且抑制晶体生长，所述抑制层包括覆盖所述晶片的一部分的覆盖区域和不覆盖所述覆盖区域内的所述晶片的一部分的开放区域; 在开放区域晶体生长的Ge层; 在Ge层上晶体生长并且是含有P的3-5族化合物半导体层的缓冲层; 以及在缓冲层上晶体生长的功能层。 可以形成Ge层，然后以能够移动晶体缺陷的温度和持续时间进行退火。

公开(公告)号：US08766318B2

公开(公告)日：2014-07-01

申请号：US12920455

申请日：2009-02-27

申请人： Masahiko Hata ,  Tomoyuki Takada

发明人： Masahiko Hata ,  Tomoyuki Takada

IPC分类号： H01L29/12

CPC分类号： H01L29/16 ,  H01L21/02381 ,  H01L21/02433 ,  H01L21/0245 ,  H01L21/02538 ,  H01L21/02546 ,  H01L21/02551 ,  H01L21/02609 ,  H01L21/02639 ,  H01L21/02647 ,  H01L21/845 ,  H01L27/1211 ,  H01L29/045 ,  H01L29/165 ,  H01L29/267 ,  H01L29/78648 ,  H01L29/78681

摘要： The objective is to improve capabilities such as high-speed switching of a compound semiconductor device. Provided is a semiconductor wafer comprising a silicon wafer; an insulating film that is formed on the silicon wafer and that has an open portion reaching the silicon wafer; a Ge crystal formed in the open portion; a seed compound semiconductor crystal that is grown with the Ge crystal as a nucleus and that protrudes beyond a surface of the insulating film; and a laterally grown compound semiconductor layer that is laterally grown on the insulating film with a specified surface of the seed compound semiconductor crystal as a seed surface.

摘要翻译： 目的是提高复合半导体器件的高速切换等能力。 提供了包括硅晶片的半导体晶片; 绝缘膜，其形成在所述硅晶片上，并且具有到达所述硅晶片的开口部分; 形成在开口部的Ge晶体; 种子化合物半导体晶体，其以Ge晶体为核生长并突出超过绝缘膜的表面; 横向生长的化合物半导体层，其以种子化合物半导体晶体的指定表面作为种子表面在绝缘膜上横向生长。

公开(公告)号：US08709904B2

公开(公告)日：2014-04-29

申请号：US13131523

申请日：2009-11-26

申请人： Tomoyuki Takada ,  Masahiko Hata ,  Hisashi Yamada

发明人： Tomoyuki Takada ,  Masahiko Hata ,  Hisashi Yamada

IPC分类号： H01L21/331 ,  H01L21/336 ,  H01L21/46 ,  H01L21/78 ,  H01L21/26

CPC分类号： H01L21/02532 ,  H01L21/02667 ,  H01L21/2686 ,  H01L21/67115 ,  H01L29/78

摘要： There is provided a method of producing a semiconductor wafer by thermally processing a base wafer having a portion to be thermally processed that is to be thermally processed. The method comprises a step of providing, on the base wafer, a portion to be heated that generates heat through absorption of an electromagnetic wave and selectively heats the portion to be thermally processed, a step of applying an electromagnetic wave to the base wafer, and a step of lowering the lattice defect density of the portion to be thermally processed, by means of the heat generated by the portion to be heated through the absorption of the electromagnetic wave.

摘要翻译： 提供了通过热处理具有待热处理部分的基底晶片来制造半导体晶片的方法。 该方法包括在基底晶片上提供通过吸收电磁波产生热并选择性地加热待热处理的部分的加热部分，向基底晶片施加电磁波的步骤，以及 借助于通过吸收电磁波而被加热部分产生的热量来降低待热处理部分的晶格缺陷密度的步骤。

公开(公告)号：US20110266595A1

公开(公告)日：2011-11-03

申请号：US13122124

申请日：2009-10-01

申请人： Masahiko Hata

发明人： Masahiko Hata

IPC分类号： H01L29/06 ,  H01L21/20

CPC分类号： H01L21/8252 ,  H01L21/02381 ,  H01L21/02433 ,  H01L21/0245 ,  H01L21/02461 ,  H01L21/02463 ,  H01L21/02538 ,  H01L21/02551 ,  H01L21/02645 ,  H01L21/02647 ,  H01L21/8258 ,  H01L21/84 ,  H01L27/1203 ,  H01L29/20 ,  H01L29/66742 ,  H01L29/7371 ,  H01L29/78681

摘要： There is provided a semiconductor wafer including a base wafer, an insulating layer, and a Si crystal layer in the stated order. The semiconductor wafer further includes an inhibition layer that is provided on the Si crystal layer and has an opening penetrating therethrough to reach the Si crystal layer. The inhibition layer inhibiting crystal growth of a compound semiconductor. Furthermore, a seed crystal is provided within the opening, and a compound semiconductor has a lattice match or a pseudo lattice match with the seed crystal. There is also provided an electronic device includes a substrate, an insulating layer that is provided on the substrate, a Si crystal layer that is provided on the insulating layer, an inhibition layer that is provided on the Si crystal layer and has an opening penetrating therethrough to reach the Si crystal layer, where the inhibition layer inhibits crystal growth of a compound semiconductor, a seed crystal that is provided within the opening, a compound semiconductor that has a lattice match or a pseudo lattice match with the seed crystal, and a semiconductor device that is formed using the compound semiconductor.

摘要翻译： 提供了以所述顺序包括基底晶片，绝缘层和Si晶体层的半导体晶片。 半导体晶片还包括设置在Si晶体层上并具有贯穿其的开口以到达Si晶体层的抑制层。 抑制层抑制化合物半导体的晶体生长。 此外，在开口内设置晶种，化合物半导体与晶种具有晶格匹配或伪晶格匹配。 还提供了一种电子器件，包括衬底，设置在衬底上的绝缘层，设置在绝缘层上的Si晶体层，设置在Si晶体层上并具有贯穿其的开口的抑制层 到达Si晶体层，其中抑制层抑制化合物半导体的晶体生长，设置在开口内的晶种，具有晶格匹配或与晶种的伪晶格匹配的化合物半导体以及半导体 使用化合物半导体形成的器件。

公开(公告)号：US20110233689A1

公开(公告)日：2011-09-29

申请号：US13133092

申请日：2009-11-27

申请人： Masahiko Hata ,  Noboru Fukuhara ,  Hisashi Yamada ,  Shinichi Takagi ,  Masakazu Sugiyama ,  Mitsuru Takenaka ,  Tetsuji Yasuda ,  Noriyuki Miyata ,  Taro Itatani ,  Hiroyuki Ishii ,  Akihiro Ohtake ,  Jun Nara

发明人： Masahiko Hata ,  Noboru Fukuhara ,  Hisashi Yamada ,  Shinichi Takagi ,  Masakazu Sugiyama ,  Mitsuru Takenaka ,  Tetsuji Yasuda ,  Noriyuki Miyata ,  Taro Itatani ,  Hiroyuki Ishii ,  Akihiro Ohtake ,  Jun Nara

IPC分类号： H01L29/78 ,  H01L29/04 ,  H01L21/336 ,  H01L29/20 ,  H01L21/20

CPC分类号： H01L29/045 ,  H01L29/20 ,  H01L29/7833 ,  H01L29/78681

摘要： There is provided a semiconductor device that includes a III-V Group compound semiconductor having a zinc-blende-type crystal structure, an insulating material being in contact with the (111) plane of the III-V Group compound semiconductor, a plane of the III-V Group compound semiconductor equivalent to the (111) plane, or a plane that has an off angle with respect to the (111) plane or the plane equivalent to the (111) plane, and an MIS-type electrode being in contact with the insulating material and including a metal conductive material.

摘要翻译： 提供了一种半导体器件，其包括具有锌闪光体型晶体结构的III-V族化合物半导体，与III-V族化合物半导体的（111）面接触的绝缘材料， 相当于（111）面的III-V族化合物半导体，或相对于（111）面或与（111）面相当的面的偏角的平面，和与MIS接触的MIS型电极 具有绝缘材料并且包括金属导电材料。