Optical element module and manufacturing method thereof, electronic element module and manufacturing method thereof, and electronic information device
    1.
    发明申请
    Optical element module and manufacturing method thereof, electronic element module and manufacturing method thereof, and electronic information device 审中-公开
    光元件模块及其制造方法,电子元件模块及其制造方法以及电子信息装置

    公开(公告)号:US20110050988A1

    公开(公告)日:2011-03-03

    申请号:US12805960

    申请日:2010-08-26

    IPC分类号: H04N5/225 G02B9/00 B23P11/00

    摘要: An optical element module according to the present invention is provided, in which: one or a plurality of optical elements are housed within a light shielding holder; a slanting surface is provided on an outer circumference side of an optical surface of the optical element facing an aperture opening of the light shielding holder; a slanting surface is provided on an inner surface on a back side of the aperture opening of the light shielding holder in such a manner to face the slanting surface of the optical element; and the slanting surface of the optical element and the slanting surface of the light shielding holder are guided together, so that the aperture opening of the light shielding holder and the optical surface of the optical element are positioned.

    摘要翻译: 本发明提供了一种光学元件模块,其中:一个或多个光学元件容纳在遮光保持器内; 在与所述遮光保持架的开口面对置的所述光学元件的光学面的外周侧设有倾斜面, 以与光学元件的倾斜面相对的方式在遮光保持架的开口开口的背侧的内表面上设置倾斜面; 并且光学元件的倾斜表面和遮光保持器的倾斜表面一起被引导,使得遮光保持器的孔径和光学元件的光学表面被定位。

    Semiconductor device including memory capable of reducing power consumption
    3.
    发明授权
    Semiconductor device including memory capable of reducing power consumption 有权
    包括能够降低功耗的存储器的半导体装置

    公开(公告)号:US09135966B2

    公开(公告)日:2015-09-15

    申请号:US13566779

    申请日:2012-08-03

    IPC分类号: G11C7/00 G11C7/22 G11C7/10

    摘要: A semiconductor device includes a plurality of memory arrays and a plurality of memory array control circuits. Each of the plurality of memory array control circuits includes a read/write control circuit for controlling a read/write operation for the memory array, and a selection circuit for selecting and activating the memory array based on a clock signal and an output signal from the read/write control circuit.

    摘要翻译: 半导体器件包括多个存储器阵列和多个存储器阵列控制电路。 多个存储器阵列控制电路中的每一个包括用于控制存储器阵列的读/写操作的读/写控制电路,以及用于基于时钟信号和来自该存储器阵列控制电路的输出信号选择和激活存储器阵列的选择电路 读/写控制电路。

    Associative memory apparatus for searching data in which manhattan distance is minimum
    8.
    发明授权
    Associative memory apparatus for searching data in which manhattan distance is minimum 有权
    用于搜索曼哈顿距离最小的数据的关联存储装置

    公开(公告)号:US07113416B2

    公开(公告)日:2006-09-26

    申请号:US10915430

    申请日:2004-08-11

    IPC分类号: G11C7/00

    CPC分类号: G11C15/00

    摘要: In the present invention, focusing on the point that the number of transistors can be reduced to about ⅖ of that in a prior art due to an absolute-value-of-difference calculating circuit for an associative memory being configured of an addition circuit and a bit inversion circuit. The absolute-value-of-difference calculating circuit is built in a fully-parallel type associative memory as a unit comparison circuit, and all of the outputs of the absolute-value-of-difference calculating circuits for which the number of comparisons thereof are prepared are input to weight comparison circuits, whereby the calculation of the Manhattan distance between the search data and the reference data is carried out. In accordance with the configuration, because a Manhattan distance calculating circuit can be realized by a fewer number of transistors and with a small area, an associative memory apparatus as well can be realized at a low power consumption and with a small area.

    摘要翻译: 在本发明中,由于由联结存储器的差值绝对值计算电路由加法电路构成,因此重点在于现有技术中晶体管的数目可以减少到约2/5, 和位反转电路。 差分绝对值计算电路作为单位比较电路而构成全平行型联想存储器,并且其比较数的差分计算电路的绝对值计算电路的所有输出 准备的输入到加权比较电路,由此执行搜索数据和参考数据之间的曼哈顿距离的计算。 根据该结构,由于可以通过较少数量的晶体管和小面积来实现曼哈顿距离计算电路,所以可以在低功耗和小面积上实现关联存储装置。

    Associative memory apparatus for searching data in which manhattan distance is minimum
    9.
    发明申请
    Associative memory apparatus for searching data in which manhattan distance is minimum 有权
    用于搜索曼哈顿距离最小的数据的关联存储装置

    公开(公告)号:US20050162878A1

    公开(公告)日:2005-07-28

    申请号:US10915430

    申请日:2004-08-11

    CPC分类号: G11C15/00

    摘要: In the present invention, focusing on the point that the number of transistors can be reduced to about ⅖ of that in a prior art due to an absolute-value-of-difference calculating circuit for an associative memory being configured of an addition circuit and a bit inversion circuit. The absolute-value-of-difference calculating circuit is built in a fully-parallel type associative memory as a unit comparison circuit, and all of the outputs of the absolute-value-of-difference calculating circuits for which the number of comparisons thereof are prepared are input to weight comparison circuits, whereby the calculation of the Manhattan distance between the search data and the reference data is carried out. In accordance with the configuration, because a Manhattan distance calculating circuit can be realized by a fewer number of transistors and with a small area, an associative memory apparatus as well can be realized at a low power consumption and with a small area.

    摘要翻译: 在本发明中,由于由联结存储器的差值绝对值计算电路由加法电路构成,因此重点在于现有技术中晶体管的数目可以减少到约2/5, 和位反转电路。 差分绝对值计算电路作为单位比较电路而构成全平行型联想存储器,并且其比较数的差分计算电路的绝对值计算电路的所有输出 准备的输入到加权比较电路,由此执行搜索数据和参考数据之间的曼哈顿距离的计算。 根据该结构,由于可以通过较少数量的晶体管和小面积来实现曼哈顿距离计算电路,所以可以在低功耗和小面积上实现关联存储装置。