公开(公告)号：US20120074560A1

公开(公告)日：2012-03-29

申请号：US12890161

申请日：2010-09-24

申请人： Hin Hwa Goh ,  Xusheng Bao ,  Yung Kuan Hsiao ,  Kang Chen ,  Rui Huang

发明人： Hin Hwa Goh ,  Xusheng Bao ,  Yung Kuan Hsiao ,  Kang Chen ,  Rui Huang

IPC分类号： H01L23/04 ,  H01L21/50

CPC分类号： H01L23/544 ,  H01L23/055 ,  H01L23/10 ,  H01L23/552 ,  H01L23/562 ,  H01L24/16 ,  H01L2224/81005 ,  H01L2224/81007 ,  H01L2924/14 ,  H01L2924/16152 ,  H01L2924/16235 ,  H01L2924/167 ,  H01L2924/1676 ,  H01L2924/3511 ,  H01L2924/00

摘要： A method of manufacture of an integrated circuit packaging system includes: providing a carrier; mounting an integrated circuit device having component connectors directly on the carrier; placing a restraint structure over the integrated circuit device for controlling warpage of the integrated circuit device during bonding of the component connectors to the carrier causing some of the component connectors to separate from the carrier; and bonding all of the component connectors to the carrier.

摘要翻译： 一种集成电路封装系统的制造方法，包括：提供载体; 将具有部件连接器的集成电路装置安装在载体上; 在所述集成电路装置上放置约束结构，用于控制所述部件连接器与所述载体接合期间所述集成电路装置的翘曲，从而使所述部件连接器中的一些与所述载体分离; 并将所有组件连接器连接到载体上。

公开(公告)号：US08766426B2

公开(公告)日：2014-07-01

申请号：US12890161

申请日：2010-09-24

申请人： Hin Hwa Goh ,  Xusheng Bao ,  Yung Kuan Hsiao ,  Kang Chen ,  Rui Huang

发明人： Hin Hwa Goh ,  Xusheng Bao ,  Yung Kuan Hsiao ,  Kang Chen ,  Rui Huang

IPC分类号： H01L23/02

CPC分类号： H01L23/544 ,  H01L23/055 ,  H01L23/10 ,  H01L23/552 ,  H01L23/562 ,  H01L24/16 ,  H01L2224/81005 ,  H01L2224/81007 ,  H01L2924/14 ,  H01L2924/16152 ,  H01L2924/16235 ,  H01L2924/167 ,  H01L2924/1676 ,  H01L2924/3511 ,  H01L2924/00

摘要： A method of manufacture of an integrated circuit packaging system includes: providing a carrier; mounting an integrated circuit device having component connectors directly on the carrier; placing a restraint structure over the integrated circuit device for controlling warpage of the integrated circuit device during bonding of the component connectors to the carrier causing some of the component connectors to separate from the carrier; and bonding all of the component connectors to the carrier.

摘要翻译： 一种集成电路封装系统的制造方法，包括：提供载体; 将具有部件连接器的集成电路装置安装在载体上; 在所述集成电路装置上放置约束结构，用于控制所述部件连接器与所述载体接合期间所述集成电路装置的翘曲，从而使所述部件连接器中的一些与所述载体分离; 并将所有组件连接器连接到载体上。

公开(公告)号：US08455991B2

公开(公告)日：2013-06-04

申请号：US12890338

申请日：2010-09-24

申请人： Yung Kuan Hsiao ,  Xusheng Bao ,  Kang Chen ,  Hin Hwa Goh ,  Rui Huang

发明人： Yung Kuan Hsiao ,  Xusheng Bao ,  Kang Chen ,  Hin Hwa Goh ,  Rui Huang

IPC分类号： H01L21/56

CPC分类号： H01L23/4334 ,  H01L21/561 ,  H01L21/563 ,  H01L21/568 ,  H01L21/6835 ,  H01L23/3128 ,  H01L23/562 ,  H01L24/13 ,  H01L24/16 ,  H01L24/27 ,  H01L24/29 ,  H01L24/32 ,  H01L24/33 ,  H01L24/73 ,  H01L24/81 ,  H01L24/83 ,  H01L24/92 ,  H01L24/93 ,  H01L24/94 ,  H01L24/97 ,  H01L25/0655 ,  H01L2221/68327 ,  H01L2221/6834 ,  H01L2221/68363 ,  H01L2221/68368 ,  H01L2221/68381 ,  H01L2224/16225 ,  H01L2224/27436 ,  H01L2224/32225 ,  H01L2224/33181 ,  H01L2224/73204 ,  H01L2224/73253 ,  H01L2224/81005 ,  H01L2224/8101 ,  H01L2224/81095 ,  H01L2224/81815 ,  H01L2224/8385 ,  H01L2224/92 ,  H01L2224/92125 ,  H01L2224/92242 ,  H01L2224/93 ,  H01L2224/94 ,  H01L2224/97 ,  H01L2924/01033 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/301 ,  H01L2924/351 ,  H01L2924/3511 ,  H01L2224/81 ,  H01L2224/83 ,  H01L2224/11 ,  H01L21/78 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2924/3512 ,  H01L2924/00014

摘要： A method of manufacture of an integrated circuit packaging system includes: providing an integrated circuit device having chip interconnects; applying an attachment layer directly on the integrated circuit device; attaching a device stiffener to the integrated circuit device with the attachment layer; attaching a chip carrier to the chip interconnects with the device stiffener attached to the integrated circuit device for controlling warpage of the integrated circuit device to prevent the warpage from causing some of the chip interconnects to separate from the chip carrier during attachment of the chip interconnects to the chip carrier; and applying an underfill between the chip carrier and the integrated circuit device for controlling connectivity of all the chip interconnects to the chip carrier.

摘要翻译： 一种集成电路封装系统的制造方法，包括：提供具有芯片互连的集成电路器件; 将附着层直接施加在集成电路装置上; 将装置加强件附接到具有附接层的集成电路装置; 将芯片载体附接到与集成电路器件连接的器件加强件的芯片互连件，用于控制集成电路器件的翘曲，以防止翘曲导致芯片互连在将芯片互连连接到芯片互连期间与芯片载体分离 芯片载体; 以及在芯片载体和集成电路器件之间施加底部填充物，以控制所有芯片互连件与芯片载体的连接性。

公开(公告)号：US08421212B2

公开(公告)日：2013-04-16

申请号：US12887681

申请日：2010-09-22

申请人： Kang Chen ,  Xusheng Bao ,  Rui Huang ,  Yung Kuan Hsiao ,  Hin Hwa Goh

发明人： Kang Chen ,  Xusheng Bao ,  Rui Huang ,  Yung Kuan Hsiao ,  Hin Hwa Goh

IPC分类号： H01L23/48

CPC分类号： H01L23/5389 ,  H01L21/568 ,  H01L23/13 ,  H01L23/36 ,  H01L23/49816 ,  H01L23/49827 ,  H01L24/14 ,  H01L24/16 ,  H01L24/73 ,  H01L24/92 ,  H01L24/96 ,  H01L24/97 ,  H01L2224/0401 ,  H01L2224/04105 ,  H01L2224/12105 ,  H01L2224/13024 ,  H01L2224/1403 ,  H01L2224/14051 ,  H01L2224/16245 ,  H01L2224/24155 ,  H01L2224/32245 ,  H01L2224/73209 ,  H01L2224/92133 ,  H01L2224/92135 ,  H01L2224/97 ,  H01L2924/01029 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2224/83 ,  H01L2224/82 ,  H01L2924/00

摘要： A method of manufacture of an integrated circuit packaging system includes: providing an interconnect structure having a structure bottom side, a structure top side, and a cavity, the structure bottom side electrically connected to the structure top side; mounting an integrated circuit entirely within the cavity, the integrated circuit having an active side coplanar with the structure top side; forming an encapsulation partially covering the interconnect structure and the integrated circuit, the encapsulation having an encapsulation top side coplanar with the structure top side and the active side; forming a top re-passivation layer over the structure top side and the encapsulation; and mounting a heat sink over the top re-passivation layer for removing heat from the active side.

摘要翻译： 一种集成电路封装系统的制造方法，包括：提供具有结构底侧，结构顶侧和空腔的互连结构，所述结构底侧电连接到所述结构顶侧; 将集成电路完全安装在腔内，该集成电路具有与结构顶侧共面的有源侧; 形成部分覆盖所述互连结构和所述集成电路的封装，所述封装具有与所述结构顶侧和所述有源侧共面的封装顶侧; 在结构顶侧上形成顶部再钝化层和封装; 并将散热器安装在顶部再钝化层上，以从活动侧去除热量。

公开(公告)号：US20120074588A1

公开(公告)日：2012-03-29

申请号：US12890338

申请日：2010-09-24

申请人： Yung Kuan Hsiao ,  Xusheng Bao ,  Kang Chen ,  Hin Hwa Goh ,  Rui Huang

发明人： Yung Kuan Hsiao ,  Xusheng Bao ,  Kang Chen ,  Hin Hwa Goh ,  Rui Huang

IPC分类号： H01L23/52 ,  H01L21/50

CPC分类号： H01L23/4334 ,  H01L21/561 ,  H01L21/563 ,  H01L21/568 ,  H01L21/6835 ,  H01L23/3128 ,  H01L23/562 ,  H01L24/13 ,  H01L24/16 ,  H01L24/27 ,  H01L24/29 ,  H01L24/32 ,  H01L24/33 ,  H01L24/73 ,  H01L24/81 ,  H01L24/83 ,  H01L24/92 ,  H01L24/93 ,  H01L24/94 ,  H01L24/97 ,  H01L25/0655 ,  H01L2221/68327 ,  H01L2221/6834 ,  H01L2221/68363 ,  H01L2221/68368 ,  H01L2221/68381 ,  H01L2224/16225 ,  H01L2224/27436 ,  H01L2224/32225 ,  H01L2224/33181 ,  H01L2224/73204 ,  H01L2224/73253 ,  H01L2224/81005 ,  H01L2224/8101 ,  H01L2224/81095 ,  H01L2224/81815 ,  H01L2224/8385 ,  H01L2224/92 ,  H01L2224/92125 ,  H01L2224/92242 ,  H01L2224/93 ,  H01L2224/94 ,  H01L2224/97 ,  H01L2924/01033 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2924/301 ,  H01L2924/351 ,  H01L2924/3511 ,  H01L2224/81 ,  H01L2224/83 ,  H01L2224/11 ,  H01L21/78 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2924/3512 ,  H01L2924/00014

摘要： A method of manufacture of an integrated circuit packaging system includes: providing an integrated circuit device having chip interconnects; applying an attachment layer directly on the integrated circuit device; attaching a device stiffener to the integrated circuit device with the attachment layer; attaching a chip carrier to the chip interconnects with the device stiffener attached to the integrated circuit device for controlling warpage of the integrated circuit device to prevent the warpage from causing some of the chip interconnects to separate from the chip carrier during attachment of the chip interconnects to the chip carrier; and applying an underfill between the chip carrier and the integrated circuit device for controlling connectivity of all the chip interconnects to the chip carrier.

摘要翻译： 一种集成电路封装系统的制造方法，包括：提供具有芯片互连的集成电路器件; 将附着层直接施加在集成电路装置上; 将装置加强件附接到具有附接层的集成电路装置; 将芯片载体附接到与集成电路器件连接的器件加强件的芯片互连件，用于控制集成电路器件的翘曲，以防止翘曲导致芯片互连在将芯片互连连接到芯片互连期间与芯片载体分离 芯片载体; 以及在芯片载体和集成电路器件之间施加底部填充物，以控制所有芯片互连件与芯片载体的连接性。

公开(公告)号：US20120068328A1

公开(公告)日：2012-03-22

申请号：US12887681

申请日：2010-09-22

申请人： Kang Chen ,  Xusheng Bao ,  Rui Huang ,  Yung Kuan Hsiao ,  Hin Hwa Goh

发明人： Kang Chen ,  Xusheng Bao ,  Rui Huang ,  Yung Kuan Hsiao ,  Hin Hwa Goh

IPC分类号： H01L23/34 ,  H01L21/50

CPC分类号： H01L23/5389 ,  H01L21/568 ,  H01L23/13 ,  H01L23/36 ,  H01L23/49816 ,  H01L23/49827 ,  H01L24/14 ,  H01L24/16 ,  H01L24/73 ,  H01L24/92 ,  H01L24/96 ,  H01L24/97 ,  H01L2224/0401 ,  H01L2224/04105 ,  H01L2224/12105 ,  H01L2224/13024 ,  H01L2224/1403 ,  H01L2224/14051 ,  H01L2224/16245 ,  H01L2224/24155 ,  H01L2224/32245 ,  H01L2224/73209 ,  H01L2224/92133 ,  H01L2224/92135 ,  H01L2224/97 ,  H01L2924/01029 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/181 ,  H01L2224/83 ,  H01L2224/82 ,  H01L2924/00

摘要： A method of manufacture of an integrated circuit packaging system includes: providing an interconnect structure having a structure bottom side, a structure top side, and a cavity, the structure bottom side electrically connected to the structure top side; mounting an integrated circuit entirely within the cavity, the integrated circuit having an active side coplanar with the structure top side; forming an encapsulation partially covering the interconnect structure and the integrated circuit, the encapsulation having an encapsulation top side coplanar with the structure top side and the active side; forming a top re-passivation layer over the structure top side and the encapsulation; and mounting a heat sink over the top re-passivation layer for removing heat from the active side.

摘要翻译： 一种集成电路封装系统的制造方法，包括：提供具有结构底侧，结构顶侧和空腔的互连结构，所述结构底侧电连接到所述结构顶侧; 将集成电路完全安装在腔内，该集成电路具有与结构顶侧共面的有源侧; 形成部分覆盖所述互连结构和所述集成电路的封装，所述封装具有与所述结构顶侧和所述有源侧共面的封装顶侧; 在结构顶侧上形成顶部再钝化层和封装; 并将散热器安装在顶部再钝化层上，以从活动侧去除热量。

公开(公告)号：US09236278B2

公开(公告)日：2016-01-12

申请号：US13242306

申请日：2011-09-23

申请人： Rui Huang ,  Xusheng Bao ,  Kang Chen ,  Yung Kuan Hsiao ,  Hin Hwa Goh

发明人： Rui Huang ,  Xusheng Bao ,  Kang Chen ,  Yung Kuan Hsiao ,  Hin Hwa Goh

IPC分类号： H01L21/58 ,  H01L23/14 ,  H01L23/498 ,  H01L23/31 ,  H01L21/56 ,  H01L23/00

CPC分类号： H01L21/568 ,  H01L21/563 ,  H01L23/147 ,  H01L23/3107 ,  H01L23/3128 ,  H01L23/49816 ,  H01L23/49827 ,  H01L24/13 ,  H01L24/16 ,  H01L24/81 ,  H01L24/97 ,  H01L2224/16237 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2224/81191 ,  H01L2224/81192 ,  H01L2224/814 ,  H01L2224/83104 ,  H01L2224/97 ,  H01L2924/10253 ,  H01L2924/12042 ,  H01L2924/15311 ,  H01L2224/81 ,  H01L2924/00014 ,  H01L2924/014 ,  H01L2224/16225 ,  H01L2924/00012 ,  H01L2924/00

摘要： A method of manufacture of an integrated circuit packaging system includes: providing a dummy-die paddle having a first inactive side facing up, a second inactive side facing down; forming an insulator in a single continuous structure around and in direct contact with the first inactive side; and mounting an integrated circuit over the dummy-die paddle and the insulator, the integrated circuit and the dummy-die paddle having the same coefficient of thermal expansion as the dummy-die paddle.

摘要翻译： 一种制造集成电路封装系统的方法，包括：提供一个虚拟焊盘，其具有面朝上的第一无效侧，朝下的第二无效侧; 在与第一非活性侧直接接触的单一连续结构中形成绝缘体; 并且将集成电路安装在虚拟芯片桨和绝缘体，集成电路和虚拟模具板上，其具有与虚拟芯片桨相同的热膨胀系数。

公开(公告)号：US20130075922A1

公开(公告)日：2013-03-28

申请号：US13242306

申请日：2011-09-23

申请人： Rui Huang ,  Xusheng Bao ,  Kang Chen ,  Yung Kuan Hsiao ,  Hin Hwa Goh

发明人： Rui Huang ,  Xusheng Bao ,  Kang Chen ,  Yung Kuan Hsiao ,  Hin Hwa Goh

IPC分类号： H01L23/48 ,  H01L21/60 ,  H01L21/58

CPC分类号： H01L21/568 ,  H01L21/563 ,  H01L23/147 ,  H01L23/3107 ,  H01L23/3128 ,  H01L23/49816 ,  H01L23/49827 ,  H01L24/13 ,  H01L24/16 ,  H01L24/81 ,  H01L24/97 ,  H01L2224/16237 ,  H01L2224/32225 ,  H01L2224/73204 ,  H01L2224/81191 ,  H01L2224/81192 ,  H01L2224/814 ,  H01L2224/83104 ,  H01L2224/97 ,  H01L2924/10253 ,  H01L2924/12042 ,  H01L2924/15311 ,  H01L2224/81 ,  H01L2924/00014 ,  H01L2924/014 ,  H01L2224/16225 ,  H01L2924/00012 ,  H01L2924/00

摘要： A method of manufacture of an integrated circuit packaging system includes: providing a dummy-die paddle having a first inactive side facing up, a second inactive side facing down; forming an insulator in a single continuous structure around and in direct contact with the first inactive side; and mounting an integrated circuit over the dummy-die paddle and the insulator, the integrated circuit and the dummy-die paddle having the same coefficient of thermal expansion as the dummy-die paddle.

摘要翻译： 一种制造集成电路封装系统的方法，包括：提供一个虚拟焊盘，其具有面朝上的第一无效侧，朝下的第二无效侧; 在与第一非活性侧直接接触的单一连续结构中形成绝缘体; 并且将集成电路安装在虚拟芯片桨和绝缘体，集成电路和虚拟模具板上，其具有与虚拟芯片桨相同的热膨胀系数。

公开(公告)号：US08456002B2

公开(公告)日：2013-06-04

申请号：US13333739

申请日：2011-12-21

申请人： Yaojian Lin ,  Pandi C. Marimuthu ,  Kang Chen ,  Hin Hwa Goh ,  Yu Gu ,  Il Kwon Shim ,  Rui Huang ,  Seng Guan Chow ,  Jianmin Fang ,  Xia Feng

发明人： Yaojian Lin ,  Pandi C. Marimuthu ,  Kang Chen ,  Hin Hwa Goh ,  Yu Gu ,  Il Kwon Shim ,  Rui Huang ,  Seng Guan Chow ,  Jianmin Fang ,  Xia Feng

IPC分类号： H01L23/52

CPC分类号： H01L23/3114 ,  H01L21/31 ,  H01L21/56 ,  H01L21/568 ,  H01L21/768 ,  H01L21/76877 ,  H01L21/78 ,  H01L23/3128 ,  H01L23/3135 ,  H01L23/49816 ,  H01L23/522 ,  H01L23/528 ,  H01L23/5389 ,  H01L23/562 ,  H01L24/19 ,  H01L24/20 ,  H01L24/94 ,  H01L24/96 ,  H01L24/97 ,  H01L2224/04105 ,  H01L2224/12105 ,  H01L2224/48091 ,  H01L2224/73265 ,  H01L2224/94 ,  H01L2224/96 ,  H01L2924/01004 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01019 ,  H01L2924/01029 ,  H01L2924/01043 ,  H01L2924/01047 ,  H01L2924/01049 ,  H01L2924/01073 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01322 ,  H01L2924/014 ,  H01L2924/10156 ,  H01L2924/10157 ,  H01L2924/12041 ,  H01L2924/12042 ,  H01L2924/1306 ,  H01L2924/13091 ,  H01L2924/14 ,  H01L2924/181 ,  H01L2924/1815 ,  H01L2924/3511 ,  H01L2224/19 ,  H01L2924/00014 ,  H01L2924/00 ,  H01L2224/03 ,  H01L2924/00012 ,  H01L2224/214

摘要： A semiconductor device has a semiconductor die and conductive layer formed over a surface of the semiconductor die. A first channel can be formed in the semiconductor die. An encapsulant is deposited over the semiconductor die. A second channel can be formed in the encapsulant. A first insulating layer is formed over the semiconductor die and first conductive layer and into the first channel. The first insulating layer extends into the second channel. The first insulating layer has characteristics of tensile strength greater than 150 MPa, elongation between 35-150%, and thickness of 2-30 micrometers. A second insulating layer can be formed over the semiconductor die prior to forming the first insulating layer. An interconnect structure is formed over the semiconductor die and encapsulant. The interconnect structure is electrically connected to the first conductive layer. The first insulating layer provides stress relief during formation of the interconnect structure.

公开(公告)号：US20130113092A9

公开(公告)日：2013-05-09

申请号：US13333739

申请日：2011-12-21

申请人： Yaojian Lin ,  Pandi C. Marimuthu ,  Kang Chen ,  Hin Hwa Goh ,  Yu Gu ,  Il Kwon Shim ,  Rui Huang ,  Seng Guan Chow ,  Jianmin Fang ,  Xia Feng

发明人： Yaojian Lin ,  Pandi C. Marimuthu ,  Kang Chen ,  Hin Hwa Goh ,  Yu Gu ,  Il Kwon Shim ,  Rui Huang ,  Seng Guan Chow ,  Jianmin Fang ,  Xia Feng

IPC分类号： H01L23/52 ,  H01L21/56 ,  H01L21/78

CPC分类号： H01L23/3114 ,  H01L21/31 ,  H01L21/56 ,  H01L21/568 ,  H01L21/768 ,  H01L21/76877 ,  H01L21/78 ,  H01L23/3128 ,  H01L23/3135 ,  H01L23/49816 ,  H01L23/522 ,  H01L23/528 ,  H01L23/5389 ,  H01L23/562 ,  H01L24/19 ,  H01L24/20 ,  H01L24/94 ,  H01L24/96 ,  H01L24/97 ,  H01L2224/04105 ,  H01L2224/12105 ,  H01L2224/48091 ,  H01L2224/73265 ,  H01L2224/94 ,  H01L2224/96 ,  H01L2924/01004 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01019 ,  H01L2924/01029 ,  H01L2924/01043 ,  H01L2924/01047 ,  H01L2924/01049 ,  H01L2924/01073 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01322 ,  H01L2924/014 ,  H01L2924/10156 ,  H01L2924/10157 ,  H01L2924/12041 ,  H01L2924/12042 ,  H01L2924/1306 ,  H01L2924/13091 ,  H01L2924/14 ,  H01L2924/181 ,  H01L2924/1815 ,  H01L2924/3511 ,  H01L2224/19 ,  H01L2924/00014 ,  H01L2924/00 ,  H01L2224/03 ,  H01L2924/00012 ,  H01L2224/214

摘要： A semiconductor device has a semiconductor die and conductive layer formed over a surface of the semiconductor die. A first channel can be formed in the semiconductor die. An encapsulant is deposited over the semiconductor die. A second channel can be formed in the encapsulant. A first insulating layer is formed over the semiconductor die and first conductive layer and into the first channel. The first insulating layer extends into the second channel. The first insulating layer has characteristics of tensile strength greater than 150 MPa, elongation between 35-150%, and thickness of 2-30 micrometers. A second insulating layer can be formed over the semiconductor die prior to forming the first insulating layer. An interconnect structure is formed over the semiconductor die and encapsulant. The interconnect structure is electrically connected to the first conductive layer. The first insulating layer provides stress relief during formation of the interconnect structure.

摘要翻译： 半导体器件具有形成在半导体管芯的表面上的半导体管芯和导电层。 可以在半导体管芯中形成第一通道。 密封剂沉积在半导体管芯上。 可以在密封剂中形成第二通道。 在半导体管芯和第一导电层上形成第一绝缘层并进入第一沟道。 第一绝缘层延伸到第二通道中。 第一绝缘层的拉伸强度大于150MPa，伸长率在35-150％之间，厚度为2-30微米。 在形成第一绝缘层之前，可以在半导体管芯上方形成第二绝缘层。 在半导体管芯和密封剂上形成互连结构。 互连结构电连接到第一导电层。 第一绝缘层在形成互连结构期间提供应力释放。