利索-全球专利检索

  1. 登录
  2. 注册

搜索结果

113 条记录 (耗时 0.021 秒)

    Semiconductor apparatus and transfer method
    3.
    发明授权
    Semiconductor apparatus and transfer method 有权

    公开(公告)号：US11914538B2

    公开(公告)日：2024-02-27

    申请号：US17352406

    申请日：2021-06-21

    申请人： FUJITSU LIMITED

    发明人： Takahiro Shikibu

    IPC分类号： G06F13/40 ,  G06F12/123

    CPC分类号： G06F13/4022 ,  G06F12/124 ,  G06F2212/1044

    摘要： A semiconductor apparatus that selects a first packet from a plurality of packets stored in a buffer and transfers the first packet. The semiconductor apparatus switches a plurality of different conditions for grouping the plurality of packets according to a priority order of the plurality of conditions; and selects the first packet from a plurality of packets pertaining to a group extracted on a condition selected by the switching according to a given selecting scheme, and transfers the first packet from the buffer.

    Methods for controlling asynchronous FIFO memory and data transmission system utilizing the same
    5.
    发明公开
    Methods for controlling asynchronous FIFO memory and data transmission system utilizing the same 审中-公开

    公开(公告)号：US20230236989A1

    公开(公告)日：2023-07-27

    申请号：US17881634

    申请日：2022-08-05

    申请人： Realtek Semiconductor Corp.

    发明人： YUEFENG CHEN ,  HUI GU

    IPC分类号： G06F12/123

    CPC分类号： G06F12/124

    摘要： A method for controlling operations of an asynchronous FIFO memory includes: determining a current depth of the asynchronous FIFO memory according to at least one of a clock ratio, a burst length and a continuous transmission length, where the clock ratio is a ratio of a frequency of a first clock signal used by a master device to a frequency of a second clock signal used by a slave device; configuring one or more entries of the asynchronous FIFO memory to be used according to the current depth; and controlling a plurality of FIFO clock signals provided to the asynchronous FIFO memory according to the current depth. One FIFO clock signal corresponds to one entry, and one or more FIFO clock signals corresponding to one or more entries that are not configured according to the current depth are disabled.

    Read performance of memory devices
    6.
    发明授权
    Read performance of memory devices 有权

    公开(公告)号：US11645006B2

    公开(公告)日：2023-05-09

    申请号：US16863202

    申请日：2020-04-30

    申请人： Macronix International Co., Ltd.

    发明人： Ting-Yu Liu ,  Yi-Chun Liu

    IPC分类号： G06F3/06 ,  G06F12/123 ,  G06F12/10

    CPC分类号： G06F3/0659 ,  G06F3/0604 ,  G06F3/0674 ,  G06F12/10 ,  G06F12/124

    摘要： A memory controller managing a memory device receives a memory read command from a host device that is communicably coupled to the memory device. The memory device includes a storage memory comprising a first type of memory cells and a cache memory comprising a second type of memory cells. The memory controller determines, from the memory read command, a physical address of a target memory location in the storage memory indicated by the memory read command. The memory controller executes a read operation on the target memory location corresponding to the physical address. The memory controller determines a read attribute of the target memory location. Conditioned on determining that the read attribute satisfies one or more threshold conditions, the memory controller programs an entry in the cache memory with information corresponding to the target memory location.

    Data storage using bitmaps
    9.
    发明授权
    Data storage using bitmaps 有权
    使用位图的数据存储

    公开(公告)号：US08843721B2

    公开(公告)日：2014-09-23

    申请号：US13829488

    申请日：2013-03-14

    申请人： International Business Machines Corporation

    发明人： Carlos Francisco Fuente ,  William James Scales ,  Barry Douglas Whyte

    IPC分类号： G06F12/00 ,  G06F3/06 ,  G06F12/12

    CPC分类号： G06F3/065 ,  G06F3/0611 ,  G06F3/0613 ,  G06F3/0685 ,  G06F12/124

    摘要： A data storage system comprises a controller, a first lower performance storage medium and a second higher performance storage medium. The controller is connected to the storage mediums and is arranged to control I/O access to the storage mediums. The controller is further arranged to store an image on the first storage medium, initiate a copy function from the first storage medium to the second storage medium, direct all I/O access for the image to the second storage medium, periodically age data from the second storage medium to the first storage medium, create a new empty bitmap for each period, and in response to an I/O access for data in the image, update the latest bitmap to indicate that the data has been accessed and update the previous bitmaps to indicate that the data has not been accessed.

    摘要翻译： 数据存储系统包括控制器，第一低性能存储介质和第二高性能存储介质。 控制器连接到存储介质，并且被布置成控制对存储介质的I / O访问。 控制器还被布置为在第一存储介质上存储图像，发起从第一存储介质到第二存储介质的复制功能，将图像的所有I / O访问引导到第二存储介质，周期性地从 第二存储介质到第一存储介质，为每个周期创建新的空位图，并且响应于图像中的数据的I / O访问，更新最新位图以指示数据已经被访问并且更新先前的位图 以指示数据未被访问。