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公开(公告)号:US20150171133A1
公开(公告)日:2015-06-18
申请号:US14300948
申请日:2014-06-10
申请人: SK hynix Inc.
发明人: Do-Hwan KIM , Yun-Hee YANG , Dae-Woo KIM , Jong-Chae KIM , Su-Hwan LIM
IPC分类号: H01L27/146
CPC分类号: H01L27/14623 , H01L27/1461 , H01L27/14612 , H01L27/14621 , H01L27/14627 , H01L27/1464 , H01L27/14643 , H01L29/76816 , H01L29/76825
摘要: An age sensor including a transfer gate formed on a substrate, a photoelectric conversion region formed on a side of the transfer gate, a floating diffusion region with a trench formed on another side of the transfer gate, a barrier layer which covers a bottom of the trench and a conducting layer, which is gap-filled in the trench.
摘要翻译: 一种年龄传感器,包括形成在基板上的转移门,形成在转移门侧的光电转换区,形成在转移门另一侧的沟槽的浮动扩散区, 沟槽和导电层,其在沟槽中间隙填充。
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公开(公告)号:US4291243A
公开(公告)日:1981-09-22
申请号:US106313
申请日:1979-12-21
IPC分类号: G11C19/28 , H01L29/768 , H03K3/353 , H01L29/78 , H03K5/153
CPC分类号: G11C19/285 , H01L29/76825
摘要: Charge packet refreshment in a charge transfer device is performed by comparing an input charge packet to be refreshed with a reference level to form a corresponding signal and reference potential barrier and by ejecting charge from beneath a ramp electrode between said signal and reference potential barriers over the lesser of the two barriers. The area of the ramp electrode may be sufficiently large to generate refreshed charge packet of amplified size to spill over one of the two potential barriers in reponse to an input charge packet.
摘要翻译: 通过将要刷新的输入电荷分组与参考电平进行比较来形成电荷转移装置中的充电分组刷新,以形成对应的信号和参考电势势垒,并且通过在所述信号和参考电位屏障之下的斜坡电极下方的电荷 较小的两个障碍。 斜坡电极的面积可能足够大,以产生放大尺寸的刷新电荷分组,以便响应于输入电荷分组而溢出两个势垒之一。
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公开(公告)号:US4135104A
公开(公告)日:1979-01-16
申请号:US856780
申请日:1977-12-02
申请人: Reginald A. Allen
发明人: Reginald A. Allen
IPC分类号: G11C11/56 , G06F7/50 , G06F7/501 , G11C19/28 , G11C27/04 , H01L21/8247 , H01L29/768 , H01L29/788 , H01L29/792 , H03H11/26 , H03K19/08 , H03K19/21 , H01L27/10 , H01L29/78 , H03K5/18
CPC分类号: G06F7/501 , G11C19/285 , H01L29/76825 , H03K19/0806 , H03K19/21 , G06F2207/4808
摘要: The problem of gradual dissipation of charge in charge packets in charge-coupled devices (CCDs) as the packets are successively shifted is overcome by a regenerator circuit which also provides a basic structure for effecting elemental logic and arithmetic functions. A standardized charge packet is injected along with a digitally valued but somewhat diminished charge packet into a potential well under a storage electrode arranged to retain a single charge packet. Overflow from the storage electrode region that represents only some part of a full charge packet is detected by a master sensing gate that controls a slave gate forming a shunt path for the full charge packet and that is normally maintained in a transfer state. The slave gate shifts to a barrier state when the overflow packet is present, however, permitting the full charge packet to advance along another electrode path. Consequently, when a diminished charge packet having an assigned binary value is applied to the regenerator circuit, a full charge packet representing the same binary value is transferred out, and without inversion. In the absence of a charge packet at the binary input indicating the alternate binary value, the unitary charge under the storage electrode is directed out the shunt path. Advantageous arrangements are provided for in-line transfer of the data signal, sequential advance of the charge packets and dissipation of charge residues. By appropriate use of additional input transfer gates and output transfer gates, the regenerator circuit serves as a basic unit which can provide fundamental logical and digital functions needed in digital systems, including OR gates, AND gates, EXCLUSIVE-OR gates, half adders and full adders.
摘要翻译: 随着分组连续移位,电荷耦合器件(CCD)中的电荷分组中的电荷逐渐耗散的问题被再生器电路克服,再生器电路也提供用于实现元件逻辑和算术功能的基本结构。 将标准化的电荷包与数字值但稍微减小的电荷包一起注入到设置成保持单个电荷包的存储电极下方的势阱中。 来自仅表示完全充电分组的一部分的存储电极区域的溢出由主感测门来检测,该主感测门控制形成用于完全充电分组的分流路径的从门,并且通常保持在传输状态。 当存在溢出包时,从门转移到屏障状态,然而,允许完全充电分组沿另一个电极路径前进。 因此,当具有分配的二进制值的减小的电荷包被应用于再生器电路时,表示相同二进制值的完全充电分组被传送出去,而不会反转。 在没有指示二进制值的二进制输入的电荷分组的情况下,存储电极下的单位电荷被引出分流路径。 提供有利的布置用于数据信号的在线传输,电荷分组的顺序提前和电荷残留的耗散。 通过适当地使用额外的输入传输门和输出传输门,再生器电路用作可以提供数字系统中所需的基本逻辑和数字功能的基本单元,包括OR门,AND门,EXCLUSIVE-OR门,半加法器和满 加法器
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公开(公告)号:US4118795A
公开(公告)日:1978-10-03
申请号:US718243
申请日:1976-08-27
IPC分类号: G11C19/28 , H01L29/768 , G11C21/00 , G11C7/00 , G11C11/34
CPC分类号: H01L29/76825 , G11C19/285
摘要: Insulated gate field effect transistor charge regenerator amplifiers respectively cross-couple the output regions of a pair of two-phase CCD structures with the input regions of those structures. Each amplifier senses the level of binary data charge packets from the output region of one of the shift register structures and in response thereto applies a regenerated and inverted binary data charge packet to the input region of the other shift register structure. One of the amplifiers includes logic gating for inputting and outputting data into and from the shift register structure.A charge regenerator for a two-phase CCD structure comprising first and second shift registers. The charge regenerator comprises a source follower amplifier including a driver transistor, a load transistor and a positive feedback transistor connected between the gate and source of the driver transistor. The gate of the driver transistor is precharged to a predetermined level prior to sensing of the output region charge level and the regenerator inserts into the input region a charge packet corresponding to the data level sensed at the output region, without inversion.
摘要翻译: 绝缘栅场效应晶体管电荷再生器放大器分别将一对两相CCD结构的输出区域与这些结构的输入区域交叉耦合。 每个放大器感测来自移位寄存器结构之一的输出区域的二进制数据电荷分组的电平,并且响应于此,将再生和反相二进制数据电荷分组应用于另一个移位寄存器结构的输入区域。 其中一个放大器包括用于将数据输入和输出到移位寄存器结构中的逻辑门控。
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公开(公告)号:US4048519A
公开(公告)日:1977-09-13
申请号:US717705
申请日:1976-08-25
IPC分类号: G11C27/04 , G11C11/24 , G11C11/34 , G11C19/28 , H01L29/768 , H03H7/30 , H03H11/26 , H03K5/02 , H01L29/78 , H03K5/18
CPC分类号: H03K5/023 , G11C11/24 , G11C11/34 , G11C19/28 , G11C19/285 , H01L29/76825 , H03H7/30
摘要: Regenerator circuit for CCD elements in which charge representing information is transferred from a first CCD element to a second CCD element. The circuit includes a first MOS capacitance and a second capacitance connected in series with the first capacitance, the point at which the two capacitances are connected with one another being connected to the input of said second CCD. The output of the first CCD includes an output stage having an output diffusion zone. A transistor is connected between a terminal to which a potential .phi..sub.v can be connected and the point between said first and second capacitances. This transistor has a gate electrode which is connected by a line to the output diffusion zone of the first CCD.
摘要翻译: 用于CCD元件的再生电路,其中表示信息的电荷从第一CCD元件传送到第二CCD元件。 电路包括与第一电容串联连接的第一MOS电容和第二电容,两个电容彼此连接的点被连接到所述第二CCD的输入端。 第一CCD的输出包括具有输出扩散区的输出级。 晶体管连接在可以连接电位ph的端子与所述第一和第二电容之间的点之间。 该晶体管具有通过线连接到第一CCD的输出扩散区的栅电极。
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公开(公告)号:US06278142B1
公开(公告)日:2001-08-21
申请号:US09489347
申请日:2000-01-21
申请人: Jaroslav Hynecek
发明人: Jaroslav Hynecek
IPC分类号: H01L27148
CPC分类号: H01L27/14837 , H01L27/14812 , H01L27/14856 , H01L29/76825
摘要: A charge carrier multiplier is disclosed in which a carrier that passes through a high-field region lying entirely within the depleted semiconductor volume causes a single-step impact ionization without avalanching. By spacing the high-field region sufficiently away from any substrate region that is not depleted of carriers of opposite polarity than the ionizing carrier, generation of unwanted spurious charge is minimized. Preferably the cell includes a depleted channel formed in a substrate, a gate structure insulatively disposed over and transverse to the channel having an aperture formed therein, and a charge multiplication gate electrode insulatively disposed over the aperture. In one embodiment, the gate electrode structure includes a first aperture gate electrode having the aperture formed therethrough, and in another embodiment, the gate electrode structure includes first and second aperture gate electrodes having respective first and second reticulations therein so as to frame the aperture.
摘要翻译: 公开了一种电荷载流子倍增器,其中穿过完全在耗尽的半导体体积内的高场区域的载体导致单步冲击电离而没有雪崩。 通过将高场区域远离任何没有耗尽与电离载体相反极性的载流子的衬底区域,使不想要的杂散电荷的产生最小化。 优选地,电池包括形成在衬底中的耗尽沟道,绝缘地设置在具有形成在其中的孔的沟槽上方且横向于其中形成有孔的栅极结构以及绝缘地设置在孔径上方的电荷倍增栅电极。 在一个实施例中,栅极电极结构包括具有穿过其形成的孔的第一孔径栅极电极,在另一实施例中,栅极电极结构包括第一和第二孔径栅电极,其中具有相应的第一和第二网状结构以便形成孔。
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公开(公告)号:US4272693A
公开(公告)日:1981-06-09
申请号:US71539
申请日:1979-08-31
申请人: Guenther Meusburger
发明人: Guenther Meusburger
IPC分类号: G11C19/28 , G11C27/04 , H01L21/339 , H01L27/14 , H01L29/417 , H01L29/762 , H01L29/768 , H03K3/353
CPC分类号: G11C27/04 , G11C19/285 , H01L29/76825
摘要: A CCD arrangement which includes a semiconductor layer of a first conductivity type, a layer of insulating material on the semiconductor layer, a row of shift electrodes on the insulating layer. The row of shift electrodes on the insulating layer are fed with pulse train voltages displaced in phase relative to one another. The charges are fed to an output end diffusion zone of the opposite conductivity type which has previously been brought to a reference potential and then released from the latter producing a state which is not bound in potential to the exterior. One of the shift electrodes is connected via a terminal to a transistor switch which intermittently supplies the assigned pulse train voltage, and to the gate of a field effect capacitor whose counter electrode is fed with a periodic pulse voltage. The rising flanks of this pulse voltage are each delayed relative to the times at which the assigned pulse train voltage is interrupted. The terminal of the aforesaid one shift electrode is connected to the gate of a field effect capacitor which serves as a signal output.
摘要翻译: 一种CCD装置,其包括第一导电类型的半导体层,半导体层上的绝缘材料层,绝缘层上的一排移位电极。 绝缘层上的一列移位电极被馈送相对于彼此相位移位的脉冲串电压。 电荷被馈送到相对导电类型的输出端扩散区,其预先已经被引到参考电位,然后从后者释放,产生不与外部结合的状态。 一个移位电极通过端子连接到间歇地提供分配的脉冲序列电压的晶体管开关,以及对向电极馈送周期性脉冲电压的场效应电容器的栅极。 该脉冲电压的上升沿相对于分配的脉冲序列电压被中断的时间延迟。 上述一个移位电极的端子连接到用作信号输出的场效应电容器的栅极。
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公开(公告)号:US4242600A
公开(公告)日:1980-12-30
申请号:US897939
申请日:1978-04-19
申请人: Kurt Hoffmann , Manfred Mauthe
发明人: Kurt Hoffmann , Manfred Mauthe
IPC分类号: G11C27/04 , G11C19/28 , H01L29/768 , H03H11/26 , H01L29/78
CPC分类号: H01L29/76816 , G11C19/285 , H01L29/76825
摘要: A digital CCD arrangement is provided in which an output signal is emitted which is regenerated with respect to its voltage range, and is substantially insensitive to adverse influences. In this arrangement, the last shift electrode preceding the output end zone is coupled with respect to potential to a circuit point of a transistor stage, which point in the event of a quantity of charge carriers representing logic level "1," the output end zone experiences a change in potential which corresponds to the change in potential beneath the other shift electrodes. Between the last preceding shift electrode and the output end zone, there is arranged a further electrode which is insulated from the semiconductor layer and is connected to a second reference potential which corresponds to an intermediate value which is swept over by the potential across the circuit point.
摘要翻译: 提供了一种数字CCD装置,其中发射输出信号,其相对于其电压范围再生,并且对不利影响基本上不敏感。 在这种布置中,输出端区之前的最后一个移位电极相对于晶体管级的电路点的电位而耦合,这表示在表示逻辑电平“1”的电荷载流量的情况下,输出端区 经历与其他换挡电极下方的电位变化相对应的电位变化。 在最后的前一移位电极和输出端区之间,布置另外的电极,该电极与半导体层绝缘并且连接到第二参考电位,该第二参考电位对应于跨越电路点的电势扫过的中间值 。
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公开(公告)号:US4134028A
公开(公告)日:1979-01-09
申请号:US775408
申请日:1977-03-07
IPC分类号: G11C19/28 , H01L29/768 , H01L29/78
CPC分类号: H01L29/76825 , G11C19/285
摘要: Each time a charge signal is shifted, it suffers a small transfer loss. In the charge transfer systems of interest here, that transfer loss charge combines with previous transfer loss charges to form a transfer loss sum charge packet which propagates behind the charge signal. In the present system each charge signal is restored to substantially its initial level, by combining the transfer loss sum charge packet for that charge signal with that charge signal once each n charge transfers, where n is a relatively large number such as 50 or more.
摘要翻译: 每次充电信号移动时,都会承受较小的传输损耗。 在这里感兴趣的电荷转移系统中,该传输损耗电荷与先前的传输损耗电荷相结合,以形成在充电信号之后传播的传输损耗和电荷分组。 在本系统中,通过每n次充电转移,将该充电信号的传输损耗和电荷分组与该充电信号相组合,每个充电信号恢复到基本上其初始电平,其中n是比较大的数量,例如50或更大。
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公开(公告)号:US4075515A
公开(公告)日:1978-02-21
申请号:US717690
申请日:1976-08-25
申请人: Kurt Hoffmann
发明人: Kurt Hoffmann
IPC分类号: G11C11/24 , G11C11/34 , G11C19/28 , G11C27/04 , H01L29/768 , H03F3/00 , H03H7/30 , H03H11/26 , H03K5/18 , H01L29/78 , H03K5/02
摘要: Digital differential amplifier with pre-chargeable parasitic capacitances to switch on or hold blocked output transistors discharging or not discharging an output capacitance via a constant current sink for a combination of two charge coupled devices. The digital differential amplifier detects the presence or absence of charge on the output of a first charge coupled device and inputs a corresponding charge to a second charge coupled device. The combination of the two charge coupled devices with two digital differential amplifiers and two control transistors is such that stored charges may be recirculated between the two charge coupled devices or previously stored data may be serially read from the output of one charge coupled device and new data may be serially written into the input of the other charge coupled device. A method of recirculating previously stored data or writing new data into the second charge coupled device using precharged parasitic and diffusion zone capacitances is also described.
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