Abstract:
The invention relates to a semiconductor device with a housing, comprising: - a semiconductor substrate which is disposed between two contact elements and is provided with a gate electrode on at least one surface, said gate electrode being contacted with the aid of a gate contact element; and - at least one triggering unit for generating a gate current, said triggering unit being equipped with a first terminal that is contacted by means of the gate contact as well as a second terminal which is contacted by means of a first of the two contact elements. The inventive semiconductor device is characterized in that the first contact element forms a surface which lies across and at a distance from the gate electrode while a spring element is arranged such that a spring force puts the gate contact element in push contact with the gate electrode and simultaneously puts the second terminal of the triggering unit in push contact with the surface of the first contact element lying across from the gate electrode. The invention relates to further relates to a circuit assembly that is suitable for use in said semiconductor device.
Abstract:
Es wird eine Diode, insbesondere Leistungs-Einpressdiode für einen Gleichrichter in einem Kraftfahrzeug beschrieben, mit einem Halbleiterchip, der über Lotschichten mit einem Kopfdraht und einem Sockel verbunden ist. Eine Kunststoffummantelung, die wenigstens im Bereich des Chips vorhanden ist und eine Kunststoffhülse umfasst, ermöglicht einen Hartverguss und stellt eine mechanische Verbindung zwischen dem Sockel und dem Kopfdraht her und bildet zusammen mit dem Sockel ein Gehäuse. Eine Hinterschneidung B, die in die Vergussmasse ragt und ein Spalt A zwischen der Hülse und dem Rand des Sockels ermöglichen eine besonders kleine Bauweise. Beidseitig angeordnete Fasen erlauben ein Einpressen in den Gleichrichter von zwei Seiten.
Abstract:
A system that facilitates aligning a first semiconductor die with a second semiconductor die, wherein the first semiconductor die and the second semiconductor die are arranged active face to active face. The active face contains circuitry for communicating between semiconductor dies. The system starts by generating light on an active face of the first semiconductor die. The system then collimates the light within the active face of the first semiconductor die to form a first beam of light which is projected onto the second semiconductor die. Next, the system receives the first beam of light on an active face of the second semiconductor die and determines a position of the first beam of light on the active face of the second semiconductor die. The system determines an alignment of the second semiconductor die relative to the first semiconductor die based on the determined position of the first beam of light.
Abstract:
An integrated circuit ESD protection system comprises: a local power supply bus, a local ground bus, a first local ESD clamp, and ESD ground bus disposed between local power supply and ground busses and coupled to the local power supply bus through the first local ESD clamp, and coupled to the local ground bus through the second ESD clamp. The local power supply bus, the local ground bus, the first ESD clamp, the second ESD clamp and the ESD ground bus are disposed on a substrate. A reduced capacitance bonding pad is disposed on the substrate. A shunting ggNMOS ESD structure triggered by a divider circuit comprises a gate boosting structure disposed in an n-well that is coupled to the bonding pad.
Abstract:
An electrical device comprises a body of a switching material (3, 13, 24) and a pair of electrodes (1, 4; 11, 14 et 15; 22, 23) that are located on the switching material with at least part of the switching material between them. The switching material preferably comprises an amorphous silicon compound that has been formed by reacting amorphous silicon or a compound thereof with a passivating agent to remove or reduce the number of unpaired electrons occurring therein. The device exhibits a voltage controlled negative resistance (VCNR) which may be employed for example for transient protection; and also has relatively constant electrical properties over a long period of time.
Abstract:
A method for manufacturing a semiconductor device according to an embodiment includes making intermediate structural bodies. The shape of an upper and a lower portion of the body are different from each other. The rotational symmetry of the electrode corresponds to that of the semiconductor body. The method includes arranging the intermediate structural bodies to be separated from each other on a tray and vibrating the tray. By causing one of these portions to engage with a recess in an upper surface of a tray the bodies are self-assembled on the tray. The one portion is specially shaped to engage with the recess, while the opposite side does not to engage with the recess. The method includes forming an external electrode connected to an electrode of the intermediate structural body with extends laterally from the body.
Abstract:
Es wird ein Träger für einen optoelektronischen Halbleiterchip angegeben mit - einem Grundkörper (10), der eine erste Hauptfläche (10a) und eine zweite Hauptfläche (10b) aufweist, - zumindest eine Ausnehmung (11), die in den Grundkörper (10) eingebracht ist und die den Grundkörper (10) von der ersten Hauptfläche zur zweiten Hauptfläche vollständig durchdringt, und - einem Füllmaterial (12), das in die zumindest eine Ausnehmung (11) eingebracht ist, wobei - der Grundkörper (10) mit Silizium eines ersten Leitfähigkeitstyps gebildet ist, - das Füllmaterial (12) mit polykristallinem Silizium eines zweiten Leitfähigkeitstyps gebildet ist, und - der Grundkörper (10) und das Füllmaterial (12) stellenweise in direktem Kontakt stehen.