公开(公告)号：EP0771473A1

公开(公告)日：1997-05-07

申请号：EP95924756.0

申请日：1995-06-29

申请人： OLIN CORPORATION

发明人： MAHULIKAR, Deepak ,  TYLER, Derek, E. ,  BRADEN, Jeffrey, S. ,  POPPLEWELL, James, M.

IPC分类号： H01L23

CPC分类号： H01L24/32 ,  H01L23/315 ,  H01L23/4334 ,  H01L24/45 ,  H01L24/48 ,  H01L24/73 ,  H01L24/83 ,  H01L24/85 ,  H01L24/86 ,  H01L2224/2919 ,  H01L2224/32245 ,  H01L2224/45015 ,  H01L2224/45144 ,  H01L2224/45147 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/73265 ,  H01L2224/8319 ,  H01L2224/83801 ,  H01L2224/83856 ,  H01L2224/85 ,  H01L2924/00014 ,  H01L2924/01005 ,  H01L2924/01006 ,  H01L2924/01012 ,  H01L2924/01014 ,  H01L2924/01015 ,  H01L2924/01027 ,  H01L2924/01028 ,  H01L2924/01029 ,  H01L2924/0103 ,  H01L2924/01033 ,  H01L2924/0104 ,  H01L2924/01042 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/0105 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/0665 ,  H01L2924/07802 ,  H01L2924/0781 ,  H01L2924/09701 ,  H01L2924/14 ,  H01L2924/1532 ,  H01L2924/16152 ,  H01L2924/181 ,  H01L2924/20752 ,  H01L2924/3025 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2924/3512 ,  H01L2224/05599

摘要： There is provided a molded plastic electronic package having improved thermal dissipation. A thermal dissipator, such as a heat spreader or a heat slug is partially encapsulated in the molding resin. The thermal dissipator has a density less than that of copper and a coefficient of thermal conductivity that is constant or increases as the package periphery is approached.

公开(公告)号：EP0486829B1

公开(公告)日：1997-04-23

申请号：EP91118002.4

申请日：1991-10-22

申请人： SEIKO EPSON CORPORATION

发明人： Tsukamoto, Takashi, c/o Seiko Epson Corporation ,  Abe, Sachiyuki, c/o Seiko Epson Corporation ,  Yabushita, Tetsuo, c/o Seiko Epson Corporation ,  Hayashi, Yoshimitsu,c/o Seiko Epson Corporation

IPC分类号： H01L25/065 ,  H01L23/498 ,  H01L23/492 ,  H01L21/60 ,  H01L25/18 ,  H01L25/10 ,  G06F15/78

CPC分类号： H01L24/81 ,  G06F15/7835 ,  H01L23/3121 ,  H01L23/4922 ,  H01L23/49572 ,  H01L23/49811 ,  H01L23/4985 ,  H01L24/45 ,  H01L24/48 ,  H01L25/0657 ,  H01L25/105 ,  H01L25/18 ,  H01L2224/16145 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/48464 ,  H01L2224/81801 ,  H01L2225/0651 ,  H01L2225/06513 ,  H01L2225/06527 ,  H01L2225/06541 ,  H01L2225/06555 ,  H01L2225/06579 ,  H01L2225/06582 ,  H01L2225/1058 ,  H01L2924/00014 ,  H01L2924/01006 ,  H01L2924/01033 ,  H01L2924/01047 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/15153 ,  H01L2924/1517 ,  H01L2924/15312 ,  H01L2924/1532 ,  H01L2924/16195 ,  H01L2924/181 ,  H01L2924/30105 ,  Y02D10/12 ,  Y02D10/13 ,  H01L2224/05599 ,  H01L2924/00012

摘要： A package (1) comprising a first semiconductor chip (100) with pads for wire bonding and contacts for chip-to-chip interconnection, and a second semiconductor chip (200) also with contacts for chip-to-chip interconnection is mounted on a substrate (4) with a printed circuit (6). The first and second chips are coupled together via respective contacts. Chip-to-chip interconnections can be made by heat hardened silver pastel by anisotropic conductive material (9) or by a tape carrier having printed wires (9') supported by flexible film (8a). The two chips together are tightly-coupled pair having low interconnect capacitances and resistances. The first chip comprises an arithmetic logic unit (ALU), at least one register, a stack pointer, a program counter, and an index register. The second chip comprises a command register, a command decoder, and a timing generator, the command decoder in communication with the first semiconductor chip, the command register responsive to a program memory located outside the device.

公开(公告)号：EP0655705A3

公开(公告)日：1997-04-09

申请号：EP94116834.6

申请日：1994-10-25

申请人： Giesecke & Devrient GmbH

发明人： Böttge, Horst, Dr. ,  Gauch, Wolfgang ,  Hoppe, Joachim ,  Haghiri, Yahya

IPC分类号： G06K13/077

CPC分类号： H01L21/67144 ,  G06K19/07745 ,  G06K19/07747 ,  H01L23/3121 ,  H01L23/49855 ,  H01L24/45 ,  H01L24/48 ,  H01L2224/45014 ,  H01L2224/451 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2924/00014 ,  H01L2924/01068 ,  H01L2924/14 ,  H01L2924/1532 ,  H01L2924/181 ,  Y10T29/4913 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2924/00012

摘要： Die Erfindung betrifft ein Verfahren zur Herstellung von Chipkarten mit elektronischen Modulen. Aus dem Stand der Technik sind unterschiedliche Herstellungsverfahren für solche Chipkarten bekannt geworden, in denen das jeweils verwendete elektronische Modul einen speziellen Aufbau aufweist. Im Gegensatz dazu wird nunmehr ein Verfahren zur Herstellung von Chipkarten mit elektronischen Modulen vorgestellt, bei dem ein standardisiertes elektronisches Modul verwendet wird, das in einem letzten Verfahrensschritt an die Herstellungstechnik der Karte angepaßt und entsprechend der gewählten Technik mit dem Kartenkörper verbunden wird.

公开(公告)号：EP0749160A1

公开(公告)日：1996-12-18

申请号：EP96401205.8

申请日：1996-06-06

申请人： BULL S.A.

发明人： Fromont, Thierry

IPC分类号： H01L23/367

CPC分类号： H01L23/49811 ,  H01L23/3677 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L2224/16 ,  H01L2224/16225 ,  H01L2224/16235 ,  H01L2224/32245 ,  H01L2224/48091 ,  H01L2224/48227 ,  H01L2224/49109 ,  H01L2224/73265 ,  H01L2924/00014 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01027 ,  H01L2924/01029 ,  H01L2924/01061 ,  H01L2924/014 ,  H01L2924/1306 ,  H01L2924/14 ,  H01L2924/15153 ,  H01L2924/1517 ,  H01L2924/15311 ,  H01L2924/15312 ,  H01L2924/1532 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45099

摘要： La chaleur dissipée par le circuit intégré (11) est évacuée dans la plaque (13) pour être transmise dans le boîtier (10) et dans la carte de connexion (12) par l'intermédiaire des bornes d'entrée-sortie (17) du boîtier.

摘要翻译： 该方法包括安装在连接板（12）的封装（10）包含对集成电路（11）。 冷却板（13）位于所述集成电路的非活动表面上，并且通过热接合到它导电粘合剂或焊料层（14）。 横跨IC绝缘支撑材料（15）具有金属化的孔（19）来连接从内部端子（16）与外部销（17）的导体（18）。 在上表面（S1）的板相对，合成孔的至少一个在与所述板接触的标签（24）结束。

公开(公告)号：EP0747952A2

公开(公告)日：1996-12-11

申请号：EP96107832.6

申请日：1996-05-17

申请人： International Business Machines Corporation

发明人： Wilson, James Warren ,  Engle, Stephen Robert ,  Moore, Scott Preston

IPC分类号： H01L23/367

CPC分类号： H01L23/49838 ,  H01L23/36 ,  H01L23/3675 ,  H01L23/3737 ,  H01L23/49816 ,  H01L23/49833 ,  H01L24/48 ,  H01L24/49 ,  H01L2224/16 ,  H01L2224/32245 ,  H01L2224/48091 ,  H01L2224/49171 ,  H01L2924/00014 ,  H01L2924/0102 ,  H01L2924/09701 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/1532 ,  Y10T29/49144 ,  H01L2224/45015 ,  H01L2924/207 ,  H01L2224/45099 ,  H01L2224/05599 ,  H01L2224/85399

摘要： A thermally enhanced ball grid array package for electronic components, with an electronic and a plurality of ceramic component carriers bonded to a metal heat sink, enhances thermal performance, reduces solder ball fatigue and reduces stresses between the ceramic component carriers and the heat sink. Bonding the ceramic component carriers to the heat sink reduces expansion induced stresses of the solder balls on the carriers. Plural ceramic component carriers, smaller than a single carrier would have to be for the same package, reduce stresses at the interfaces between the ceramic component carriers and the heat sink.

摘要翻译： 热增强型电子封装（30）具有第一电子部件（32）和多个分立连接器（36），其结合到具有第一热膨胀系数的导热部件（34）。 连接器具有至少一个不同于第一个热膨胀系数的热膨胀系数，并且在至少一个表面上具有可熔导体（38）和导电通道，电子部件电连接到构件中的通道并经由它们到可熔导体。

公开(公告)号：EP0734588A1

公开(公告)日：1996-10-02

申请号：EP95910140.0

申请日：1995-01-26

申请人： W.L. GORE & ASSOCIATES, INC.

发明人： FISCHER, Paul, James ,  PETEFISH, William, George

IPC分类号： H01L23

CPC分类号： H01L23/49811 ,  H01L23/13 ,  H01L23/3128 ,  H01L23/3677 ,  H01L23/3736 ,  H01L23/49822 ,  H01L23/50 ,  H01L24/45 ,  H01L24/48 ,  H01L24/73 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/45124 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/4813 ,  H01L2224/48227 ,  H01L2224/73265 ,  H01L2924/00014 ,  H01L2924/01077 ,  H01L2924/01079 ,  H01L2924/01087 ,  H01L2924/01322 ,  H01L2924/10253 ,  H01L2924/14 ,  H01L2924/1433 ,  H01L2924/15153 ,  H01L2924/1517 ,  H01L2924/15311 ,  H01L2924/1532 ,  H01L2924/181 ,  H01L2924/30107 ,  H01L2924/3011 ,  H01L2924/00012 ,  H01L2924/00 ,  H01L2224/05599

摘要： An integrated circuit package for housing an integrated circuit (IC) chip and providing electrical connectivity of data signals and voltage signals between the IC chip and an electronic component includes a substrate, an IC chip affixed to the substrate and at least three conductive layers on the substrate. The three conductive layers include at least a first voltage layer adjacent to the substrate for providing a first reference voltage signal (i.e., ground) to the IC chip, a second voltage layer for providing a second reference voltage signal (i.e., power) to the IC chip, and a signal layer. To maximize speed and minimize complexing, all of the data signals to the IC chip are routed on the signal layer. The power and ground layers are closely coupled and separated by a dielectric layer having a relatively high dielectric constant for providing significant decoupling capacitance. A low dielectric layer is provided for separating the power layer from the signal layer. A plurality of electrical connections interconnect bonding pads on the IC chip with the electronic component (e.g., a PCB) by way of at least one of the conductive layers.

公开(公告)号：EP0658935A3

公开(公告)日：1996-07-10

申请号：EP94119957.2

申请日：1994-12-16

申请人： SEIKO EPSON CORPORATION

发明人： Otsuki, Tetsuya, c/o Seiko Epson Corporation

IPC分类号： H01L23/433

CPC分类号： H01L23/4334 ,  H01L23/3135 ,  H01L24/45 ,  H01L24/48 ,  H01L24/49 ,  H01L2224/05554 ,  H01L2224/32188 ,  H01L2224/45139 ,  H01L2224/45144 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/49171 ,  H01L2224/73265 ,  H01L2924/00014 ,  H01L2924/01079 ,  H01L2924/10162 ,  H01L2924/14 ,  H01L2924/1532 ,  H01L2924/181 ,  H01L2924/00 ,  H01L2224/05599 ,  H01L2924/00012

摘要： A resin sealing type semiconductor device (100) has first (10) and second (20) heat radiating portions located on opposite sides of a semiconductor element (30). The first heat radiating portion (10) has an element placing surface. A plurality of leads (32) are disposed at a given distance from the semiconductor element (30), and connected to the electrode pads through wires (34). The second heat radiating portion (20) is located in non-contact with the semiconductor element (30), leads (32) and wires (34). A first insulating portion (40) is located between the first heat radiating portion (10) and the leads (32). A second insulating portion (44) is located between the second heat radiating portion (20) and the leads (32). Preferably, the first insulating portion (40) is formed continuously on one side of the first heat radiating portion (10), and the second insulating portion (44) on one side of the second heat radiating portion (20). A space enclosed by these insulating (40,44) and heat radiating portions (10,20) houses the semiconductor element (30), the wires (34) and the tips of the leads (32).

摘要翻译： 树脂密封型半导体器件具有位于半导体元件的相对侧上的第一和第二散热部。 第一散热部分具有元件放置表面。 多个引线设置在距离半导体元件给定的距离处，并且通过导线连接到电极焊盘。 第二散热部分位于与半导体元件，引线和导线非接触的位置。 第一绝缘部分位于第一散热部分和引线之间。 第二绝缘部分位于第二散热部分和引线之间。 优选地，第一绝缘部分在第一散热部分的一侧上连续地形成，并且第二绝缘部分在第二散热部分的一侧上形成。 由这些绝缘和散热部分包围的空间容纳半导体元件，电线和引线的尖端。

公开(公告)号：EP0713250A2

公开(公告)日：1996-05-22

申请号：EP95117962.1

申请日：1995-11-14

申请人： SUMITOMO ELECTRIC INDUSTRIES, LTD.

发明人： Yamagata, Shin-ichi, c/o Itami Works of Sumitomo ,  Kamitake, Kazuya, c/o Itami Works of Sumitomo ,  Takano, Yoshishige, c/o Itami Works of Sumitomo

IPC分类号： H01L23/492 ,  H01L23/14 ,  H01L23/373

CPC分类号： H01L23/3733 ,  B22F1/0003 ,  C22C1/04 ,  H01L23/3736 ,  H01L24/48 ,  H01L2224/16225 ,  H01L2224/32225 ,  H01L2224/32245 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/73253 ,  H01L2224/73265 ,  H01L2924/00014 ,  H01L2924/01012 ,  H01L2924/01019 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01322 ,  H01L2924/01327 ,  H01L2924/09701 ,  H01L2924/12042 ,  H01L2924/14 ,  H01L2924/15311 ,  H01L2924/15312 ,  H01L2924/1532 ,  H01L2924/16195 ,  H01L2924/181 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/05599

摘要： A material for a semiconductor substrate comprising an aluminum-silicon alloy containing from 50% to 80% by weight of silicon and having a thermal conductivity of 0.28 cal/cm·sec·°C or higher, a coefficient of thermal expansion of 12 x 10⁻⁶/°C or smaller and a density of 2.5 g/cm³ or lower. This material is produced by molding an Al-Si alloy powder, which has been obtained through rapid solidification by atomization, to form a compact and then consolidating the compact by means of forging, sintering, etc. The substrate material may have an Al or Al alloy covering layer at least one surface thereof and, further, as necessary, an insulating or plating layer on the covering layer. The thus obtained substrate material is lightweight and has a suitable coefficient of thermal expansion for a substrate as well as a high thermal conductivity. Therefore, a semiconductor device with high performance and reliability can be obtained using such substrate material.

摘要翻译： 一种用于半导体衬底的材料，包括含有50重量％至80重量％硅并具有0.28卡/厘米2秒的导热率的铝硅合金。 ℃以上，热膨胀系数为12×10 -6 /℃以下，密度为2.5g / cm 3以下。 该材料通过模制通过雾化快速凝固而获得的Al-Si合金粉末来形成压块，然后通过锻造，烧结等将该压实体固结。该基材可以具有Al或Al 合金覆盖层的至少一个表面，并且还必要时在覆盖层上具有绝缘或镀层。 由此获得的基材材料重量轻并且对于基底具有合适的热膨胀系数以及高导热性。 因此，可以使用这种基板材料获得具有高性能和可靠性的半导体器件。

公开(公告)号：EP0684645A2

公开(公告)日：1995-11-29

申请号：EP95300554.3

申请日：1995-01-30

申请人： ANALOG DEVICES, INCORPORATED

发明人： Kierse, Oliver J.

IPC分类号： H01L23/433 ,  H01L23/552

CPC分类号： H01L23/49531 ,  H01L23/4334 ,  H01L23/552 ,  H01L24/48 ,  H01L24/49 ,  H01L24/73 ,  H01L2224/32245 ,  H01L2224/48091 ,  H01L2224/48247 ,  H01L2224/49171 ,  H01L2224/73265 ,  H01L2924/00014 ,  H01L2924/07802 ,  H01L2924/14 ,  H01L2924/15153 ,  H01L2924/15165 ,  H01L2924/1532 ,  H01L2924/16152 ,  H01L2924/16195 ,  H01L2924/3025 ,  H01L2924/00 ,  H01L2924/00012 ,  H01L2224/45099 ,  H01L2224/05599

摘要： A package for housing integrated circuit chips that provides EMF shielding and thermal protection, while conforming to an industry recognized package outline, is provided. This EMF shielding and thermal protection is achieved by providing an electrically conductive heat sink (10) that provides heat dissipation and that, together with a separate electrically conductive layer (12), also acts as an EMF shield. The heat sink (10) contains a recess (11) and is positioned against the conductive layer (12) with the recess (11) facing the conductive layer (12). The integrated circuit (8) resides inside the cavity formed by the heat sink (10) and conductive layer (12) and is protected from EMF by the heat sink (10) and conductive layer (12). The heat sink (10), electrically conductive layer (12) and IC (8) are then encapsulated in an electrically insulating molding compound (34) that is molded to an industry recognized package outline. Additional ICs (38) can be housed in this package by attaching them to the side of the electrically conductive layer (12) opposite the heat sink (10). These additional ICs (38) are protected from EMF emanating from the IC (8) that is housed inside the cavity. This allows for the possibility of housing EMF-generating components and EMF-sensitive components in the same package.

摘要翻译： 提供了一种用于容纳集成电路芯片的封装，其提供EMF屏蔽和热保护，同时符合业界公认的封装外形。 该EMF屏蔽和热保护通过提供提供散热的导电散热器（10）来实现，并且与单独的导电层（12）一起也用作EMF屏蔽。 散热器（10）包含凹部（11），并且其中凹部（11）面向导电层（12）抵靠导电层（12）定位。 集成电路（8）位于由散热器（10）和导电层（12）形成的空腔的内部，并且通过散热器（10）和导电层（12）免受EMF的保护。 然后将散热器（10），导电层（12）和IC（8）封装在电绝缘模制化合物（34）中，模制化合物（34）被模制成工业认可的封装外形。 附加的IC（38）可以通过将其附着到与散热器（10）相对的导电层（12）侧。 这些额外的IC（38）被保护免受从容纳在腔内的IC（8）发出的EMF。 这允许在同一封装中容纳EMF生成组件和EMF敏感组件。

公开(公告)号：EP0638931A3

公开(公告)日：1995-05-10

申请号：EP94400928.1

申请日：1994-04-29

申请人： FUJITSU LIMITED

发明人： Seyama, Kiyotaka ,  Kikuchi, Shunichi ,  Sumiyoshi, Makoto ,  Yasuda, Naoki ,  Hirano, Minoru ,  Nori, Hitoshi

IPC分类号： H01L23/538 ,  H01L23/498 ,  H01L25/065

CPC分类号： H01L25/0657 ,  H01L23/49811 ,  H01L24/48 ,  H01L2224/16 ,  H01L2224/48225 ,  H01L2224/48227 ,  H01L2225/0651 ,  H01L2225/06555 ,  H01L2225/06572 ,  H01L2225/06579 ,  H01L2225/06589 ,  H01L2924/00014 ,  H01L2924/01039 ,  H01L2924/10253 ,  H01L2924/15312 ,  H01L2924/1532 ,  H01L2924/181 ,  H01L2924/19041 ,  H05K1/141 ,  H05K3/3421 ,  H05K3/3426 ,  H05K3/3436 ,  H05K3/368 ,  H05K3/467 ,  H05K2201/0317 ,  H05K2201/1031 ,  H05K2201/10318 ,  H05K2201/10477 ,  Y02P70/611 ,  H01L2924/00 ,  H01L2224/45099 ,  H01L2224/05599

摘要： A multi-chip module includes a base board (30), a thin-film multi-layer circuit board (32) which is provided on a first surface of the base board and has a multi-layer structure in which insulating layers and wiring conductors are stacked, circuit elements (32A-5) mounted on a main surface of the thin-film multi-layer circuit board, and terminals (34) which are attached to the main surface of the thin-film multilayer circuit board and electrically connect the wiring conductors to circuits formed on a wiring board on which the multi-chip module is mounted.

摘要翻译： 多芯片模块包括基板（30），薄膜多层电路板（32），其设置在基板的第一表面上，并具有多层结构，其中绝缘层和布线导体 叠层在安装在薄膜多层电路板的主表面上的电路元件（32A-5）以及安装在薄膜多层电路板的主表面上的端子（34），并将 将导体连接到形成在其上安装有多芯片模块的布线板上的电路。