摘要:
The present invention relates to a method for contacting at least one electric contact surface (6) on a surface of a substrate (1) and/or a surface of a semiconductor chip (2) arranged on a substrate (1). According to the invention, a film (4) of electrically insulating plastic material is laminated onto the surfaces. A large-area contacting of the contact surfaces (6), which are freely accessible via the openings (3) in the film, with a layer of electrically conductive material is then carried out. It is the aim of a planar electric contacting method to produce openings (3) in an insulation during a short period of processing time. In particular, openings (3) are to be positioned at a precise position to the contact surfaces (6). To achieve this, openings (3) are produced in the film of electrically insulating plastic material in the region of the contact surface (6) to be contacted by means of laser cutting and prior to laminating. This method is suitable for all planar contacting processes. Substrates (1) or semiconductor chips (2) which are contacted accordingly may be produced. The semiconductor chips (2) used can be, in particular, power semiconductor chips.
摘要:
A multilayer printed wiring board, wherein, on a resin-insulating layer that houses a semiconductor element, another resin-insulating layer and a conductor circuit are formed with conductor circuits electrically connected through a via hole, wherein a electromagnetic shielding layer is formed on a resin-insulating layer surrounding a concave portion for housing a semiconductor element or on the inner wall surface of the concave portion, and the semiconductor element is embedded in the concave portion.
摘要:
The invention relates to an arrangement (1) which comprises at least one semiconductor module (2) and at least one electrical busbar (3). The semiconductor module comprises at least one substrate (6) and at least one semiconductor component (21, 22) arranged on said substrate and having at least one electrical contact (24) and at least one additional electrical contact (27). The busbar comprises at least one supply busbar (31) for providing a supply voltage for the contact of the semiconductor component. An electrical insulation film (7) is provided on the semiconductor component and/or on the supply busbar for electrically insulating the supply busbar from the additional contact of the semiconductor component. The contacts of the semiconductor component are contacted in a planar manner, the insulation film being used for the planar contact. The use of the insulation film eliminates the need for casting the semiconductor module with silicone, thereby obtaining a simple and compact design of the structure. The inventive arrangement is especially used for supplying power semiconductor components of power semiconductor modules. The power semiconductor modules are especially used in power converters.
摘要:
Ein optoelektronisches Bauelement gemäß der Erfindung enthält einen Halbleiterchip (1) und einen Trägerkörper (10), die mit einer transparenten, elektrisch isolierenden Verkapselungsschicht (3) versehen sind, wobei die Verkapselungsschicht (3) zwei Ausnehmungen (11, 12) zur Freilegung einer Kontaktfläche (6) und eines Anschlussbereichs (8) des Trägerkörpers aufweist, und eine elektrisch leitfähige Schicht (14) von der Kontaktfläche (6) über eine Teilbereich der Verkapselungsschicht (3) zu dem elektrischen Anschlussbereich (8) des Trägerkörpers (10) geführt ist, um die Kontaktfläche (6) und den elektrischen Anschlussbereich (8) elektrisch miteinander zu verbinden. Die von dem Halbleiterchip (1) in eine Hauptstrahlungsrichtung (13) emittierte Strahlung wird durch die Verkapselungsschicht (3) ausgekoppelt, die vorteilhaft Lumineszenz-Konversionsstoffe zur Wellenlängenkonversion der emittierten Strahlung enthält.
摘要:
The invention relates to an arrangement of at least one electrical component and at least one film composite laminated on a component surface, comprising at least one electrically-insulating plastic insulation film. The arrangement is characterised in that the film composite comprises at least one electrically-conducting plastic conducting film with at least one electrically conducting conductor. The invention further relates to a method for production of the arrangement. The plastic conducting film has a high-ohmic resistance. The above is of application in planar large-surface electrical contacting technology for the production of modules with power semiconductors. In this technology plastic films are laminated on the components. An electrical contacting of the components is achieved by means of the plastic films. According to the invention, a low lateral electrical conductivity is achieved, such that an electrical charging of the plastic films required for the contacting technology is prevented on operation of the component or the module.
摘要:
The invention relates to an arrangement (1) of an at least one electric component (2) and at least one cooling device (3) for dissipating heat from the component, the cooling device having at least a two-phase cooling device having at least one evaporator (31), and the evaporator having a structured evaporator surface (311) for evaporating a cooling fluid (34). The arrangement is characterized in that the structured surface of the evaporator is formed by an electric connecting line (6) for making electrical contact with an electric contact face (21) of the component. In particular, a liquefier (32) with a structured liquefier surface (321) is provided for liquefying the cooling fluid. In addition to the arrangement, a method for manufacturing the arrangement having the following method steps is specified: a) Provision of an electric component with an electric contact face and b) generation of the electric connecting line to the evaporator surface on the contact face of the component. The component is in particular a power semiconductor component. The connecting line is used for efficient cooling of the power semiconductor component and of a module (20) which is equipped therewith. Efficient thermal expansion and selective cooling of local hot spots occur. As a result, isothermal cooling with a low thermal loading of the power semiconductor component or of the module is possible. This is achieved in particular by virtue of the configuration of the two-phase cooling device as an evaporating bath cooling system. The invention is applied in the planar contact-making technology with a large surface.
摘要:
A resin layer in which adhesion to a conductive film is higher than that of a sealing resin to the conductive film is disposed on the sealing resin in which it is difficult to form the conductive film, and wiring patterns electrically connected to electronic components are disposed on the resin layer.
摘要:
The present publication discloses a method for manufacturing a circuit-board structure. In the method, a conductor layer is made, which comprises a conductor foil and a conductor pattern on the surface of the conductor foil. A component is attached to the conductor layer and at least some conductor material of the conductor layer is removed from outside the conductor pattern.
摘要:
A method of manufacturing an electronic parts packaging structure comprises the steps of: forming a first resin film uncured (32a) on a wiring substrate (24) including a wiring pattern (28a); burying an electronic part (20b) having a connection terminal (23) on an element formation surface in the first resin film uncured (32a) in a state where the connection terminal (23) is directed downward, and joining the connection terminal (23) to the wiring pattern (28a); obtaining an insulation film (32) by curing the first resin film uncured (32a) by heat treatment; forming a via hole (32x) in a predetermined portion of the insulation film (32) on the wiring pattern (28a); and forming an upper wiring pattern (28b) connected to the wiring pattern (28a) through the via hole (32x), on the insulation film (32).
摘要:
An RFID device. The device comprises a conductive layer formed on a first substrate. An opening line (or two or more opening lines) is formed in the conductive layer to make the conductive layer a part of an antenna structure. An integrated circuit chip is placed over at least a portion the opening line and coupled to the conductive layer. The integrated circuit chip is electrically interconnected to the conductive layer.