External connection terminal of metal core substrate
    41.
    发明专利
    External connection terminal of metal core substrate 有权
    金属核基板的外部连接端子

    公开(公告)号:JP2008218833A

    公开(公告)日:2008-09-18

    申请号:JP2007056247

    申请日:2007-03-06

    Abstract: PROBLEM TO BE SOLVED: To provide an inexpensive external connection terminal of a metal core substrate which can be made small and thin at low cost by eliminating the need to mount a connector on the metal core substrate. SOLUTION: Disclosed is the external connection terminal 15 of the metal core substrate 10 which is disposed at a terminal portion of the metal core substrate 10 for mounting an electronic component 17 on at least one surface of top and rear surfaces of a plate type metal substrate 11, and makes an electric connection with the outside. The external connection terminal 15 is composed of a member which has smaller heat conductivity than the metal substrate, and has, on its surface, an electrode pattern portion 16a for soldering and fixing a lead wire to be connected to the outside. COPYRIGHT: (C)2008,JPO&INPIT

    Abstract translation: 要解决的问题:为了提供一种廉价的金属芯基板的外部连接端子,可以通过消除在金属芯基板上安装连接器的需要,可以以低成本制造得小而薄。 解决方案:公开了金属芯基板10的外部连接端子15,其设置在金属芯基板10的端子部分处,用于将电子部件17安装在板的顶表面和后表面的至少一个表面上 型金属基板11,与外部电连接。 外部连接端子15由与金属基板相比热传导性较差的部件构成,表面上具有用于焊接固定与外部连接的引线的电极图形部分16a。 版权所有(C)2008,JPO&INPIT

    Electron source, image display device, image reproduction device, wiring board, and manufacturing method of wiring board
    43.
    发明专利
    Electron source, image display device, image reproduction device, wiring board, and manufacturing method of wiring board 有权
    电子源,图像显示装置,图像再现装置,接线板和制造方法

    公开(公告)号:JP2008016225A

    公开(公告)日:2008-01-24

    申请号:JP2006183699

    申请日:2006-07-03

    Abstract: PROBLEM TO BE SOLVED: To provide an electron source equipped with a wiring board in which a resistance value of a wire itself will not change with time. SOLUTION: The electron source is provided with a board having a groove on the surface, a wiring board equipped with a conductive wire with at least a part of it arranged in the groove and a wiring arranged on the wire so as to cross the same, and a plurality of electron emission elements arranged on the wiring board and electrically connected with the conductive wire as well as with the wiring. The surface of the wire is covered with a coating layer made of oxide of a material constituting the wire. COPYRIGHT: (C)2008,JPO&INPIT

    Abstract translation: 要解决的问题:提供一种配备有其中电线本身的电阻值不会随时间变化的布线板的电子源。 解决方案:电子源设置有在表面上具有凹槽的板,配备有至少一部分布置在凹槽中的导线的布线板和布置在导线上的布线以便交叉 以及布置在布线板上并与导线以及布线电连接的多个电子发射元件。 电线的表面覆盖有由构成导线的材料的氧化物制成的涂层。 版权所有(C)2008,JPO&INPIT

    Substrate and its production process
    46.
    发明专利
    Substrate and its production process 有权
    基材及其生产工艺

    公开(公告)号:JP2006135175A

    公开(公告)日:2006-05-25

    申请号:JP2004323940

    申请日:2004-11-08

    Inventor: YAMANO KOJI

    Abstract: PROBLEM TO BE SOLVED: To provide a substrate having a through via penetrating a basic material and wiring being connected with the through via in which generation of void in the through via is suppressed and electrical connection reliability of the wiring and the through via can be enhanced, and to provide its production process. SOLUTION: The through via 55 is constituted of a through portion 57, a wiring joint 56 provided at one end of the through portion 57 and wider than the diameter R1 at the through portion 57, and a connection pad 59 provided at the other end of the through portion 57 and wider than the diameter R1 at the through portion 57, and a conductive core material 58 located substantially on the central axis D of the through hole 52, and the through via 55 is formed by depositing conductive metal by using the conductive core material 58 as a power supply layer. COPYRIGHT: (C)2006,JPO&NCIPI

    Abstract translation: 要解决的问题:提供一种具有穿过基本材料的通孔的基板和与通孔中通孔的产生被抑制的通孔连接的布线,以及布线和通孔的电连接可靠性 可以加强,并提供其生产过程。 贯通通路55由贯通部57,设置在贯通部57的一端的布线接头56和贯通部57的直径R1构成,连接垫59 贯穿部分57的另一端并且比通孔部分57处的直径R1宽,并且基本上位于通孔52的中心轴线D上的导电芯材料58,并且通孔55通过沉积导电金属由 使用导电芯材料58作为电源层。 版权所有(C)2006,JPO&NCIPI

    Formation of inductance element
    49.
    发明专利
    Formation of inductance element 失效
    形成电感元件

    公开(公告)号:JPS61105811A

    公开(公告)日:1986-05-23

    申请号:JP22746884

    申请日:1984-10-29

    Inventor: MIURA YOSHIO

    Abstract: PURPOSE:To form an inductance element without going through a heating process by forming an insulating coil into an inductance element directly on an insulating substrate with a supersonic bonding device after soldering other circuit elements. CONSTITUTION:After conductive routes 2 and 2' are formed on a circuit substrate 1 and a desired circuit element 3 is soldered, a bobbin 5 is arranged on the circuit substrate 1. An end of a coil 7 is supersonically bonded on the conductive route 2 of the substrate 1 with a supersonic bonding device, the insulating coil 7 is wound on a bobbin 5 through revolving the circuit substrate 1, and another end of the insulating coil 7 is supersonically bonded to another conductive route 2'. As, thus, an inductance element can be built in on the circuit substrate 1 besides an IC, a transistor, a chip condenser o a circuit element 3 of chip resistance, external parts can be almost unnecessary, the inductance element is built in after a heating process of soldering, a short circuit never occurs because of heating the insulating coil 7.

    Abstract translation: 目的:通过在焊接其它电路元件之后,通过用超声波接合装置在绝缘基板上直接形成绝缘线圈,将绝缘线圈形成电感元件,形成电感元件而不进行加热处理。 构成:在导电路径2和2'形成在电路基板1上并且所需的电路元件3被焊接之后,线圈架5布置在电路基板1上。线圈7的端部被超声波接合在导电路径2上 通过超声波接合装置将基板1的绝缘线圈7通过旋转电路基板1卷绕在线轴5上,绝缘线圈7的另一端被超声波接合到另一导电路径2'。 因此,除了IC,晶体管,芯片电阻的芯片电容器,电路元件3之外,还可以在电路基板1上内置电感元件,外部部件几乎不需要,电感元件在加热后内置 焊接过程由于加热绝缘线圈7而不会发生短路。

    Formation of inductance element
    50.
    发明专利
    Formation of inductance element 失效
    形成电感元件

    公开(公告)号:JPS6197807A

    公开(公告)日:1986-05-16

    申请号:JP21994284

    申请日:1984-10-18

    Inventor: MIURA YOSHIO

    Abstract: PURPOSE:To obtain the inductance elements of extremely small size and low price and to form the elements in an arbitrary position of an insulating substrate continuously by forming the elements on the insulating substrate directly by use of a supersonic bonding device of insulating wires. CONSTITUTION:After a copper foil is stuck to the overall surface of one of the main planes of an insulating substrate 1, the copper foil is etched selectively to form the conductive paths of desired pattern. A winding frame body 3 is placed and fixed on the insulating substrate 1 with being close to the conductive paths by an adhesive 4. The winding frame body 3 has a function of winding the wire for forming an inductance element. One end of a wire 5 is supersonic- bonded on one of the conductive paths 2 by use of a supersonic bonding device. The insulating wire 5 is wound on the winding frame body 3 by providing a capillary chip 9 around the body 3. During this process, the insulating wire 5 is wound on the body 3 only by the predetermined number of tuns in one direction into a coil from thereby obtaining the inductance element of desired value.

    Abstract translation: 目的:为了获得极小尺寸和低价格的电感元件,并通过使用绝缘导线的超声波接合装置直接形成绝缘基板上的元件,从而连续地形成绝缘基板的任意位置的元件。 构成:在将铜箔粘贴在绝缘基板1的主面的整个表面之后,铜箔被选择性地蚀刻以形成所需图案的导电路径。 卷绕框架体3通过粘合剂4靠近导电路径放置并固定在绝缘基板1上。卷绕框架体3具有卷绕用于形成电感元件的导线的功能。 电线5的一端通过使用超音速键合装置超声波结合在一个导电路径2上。 绝缘线5通过在主体3周围设置毛细管芯片9而卷绕在绕线框架体3上。在此过程中,绝缘线5仅沿着一个方向缠绕在主体3上, 从而获得所需值的电感元件。

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