公开(公告)号：US20180374718A1

公开(公告)日：2018-12-27

申请号：US15840900

申请日：2017-12-13

Applicant: Applied Materials, Inc.

Inventor： Han-Wen CHEN ,  Steven VERHAVERBEKE ,  Roman GOUK ,  Guan Huei SEE ,  Yu GU ,  Arvind SUNDARRAJAN ,  Kyuil CHO ,  Colin Costano NEIKIRK ,  Boyi FU

IPC: H01L21/56 ,  H01L23/31

Abstract: Embodiments of the present disclosure generally describe methods for minimizing the occurrence and the extent of die shift during the formation of a reconstituted substrate in fan-out wafer level packaging processes. Die shift is a process defect that occurs when a die (device) moves from its intended position within a reconstituted substrate during the formation thereof. Generally, the methods disclosed herein include depositing a device immobilization layer and/or a plurality of device immobilization beads over and/or adjacent to a plurality of singular devices (individual dies), and the carrier substrate they are positioned on, before forming a reconstituted substrate with an epoxy molding compound. The device immobilization layer and/or the plurality of device immobilization beads immobilize the plurality of singular devices and prevents them from shifting on the carrier substrate during the molding process.

公开(公告)号：US20170098555A1

公开(公告)日：2017-04-06

申请号：US15268158

申请日：2016-09-16

Applicant: Applied Materials, Inc.

Inventor： Roman GOUK ,  Han-Wen CHEN ,  Steven VERHAVERBEKE ,  Jean DELMAS

IPC: H01L21/67 ,  F26B21/14 ,  H01L21/677 ,  B08B7/00 ,  H01L21/02 ,  H01L21/687

CPC classification number: H01L21/67034 ,  B08B7/0021 ,  B08B7/0035 ,  C11D11/0047 ,  F26B21/14 ,  H01L21/02101 ,  H01L21/6704 ,  H01L21/67126 ,  H01L21/6719 ,  H01L21/67739 ,  H01L21/67748 ,  H01L21/68792

Abstract: Embodiments described herein generally relate to a processing chamber incorporating a small thermal mass which enable efficient temperature cycling for supercritical drying processes. The chamber generally includes a body, a liner, and an insulation element which enables the liner to exhibit a small thermal mass relative to the body. The chamber is also configured with suitable apparatus for generating and/or maintaining supercritical fluid within a processing volume of the chamber.

公开(公告)号：US20140231384A1

公开(公告)日：2014-08-21

申请号：US14177893

申请日：2014-02-11

Applicant: APPLIED MATERIALS, INC.

Inventor： Brian Saxton UNDERWOOD ,  Abhijit Basu MALLICK ,  Nitin INGLE ,  Roman GOUK ,  Steven VERHAVERBEKE

IPC: G11B5/85

CPC classification number: G11B5/85 ,  G11B5/855

Abstract: Method and apparatus for forming a patterned magnetic substrate are provided. A patterned resist is formed on a magnetically active surface of a substrate. An oxide layer is formed over the patterned resist by a flowable CVD process. The oxide layer is etched to expose portions of the patterned resist. The patterned resist is then etched, using the etched oxide layer as a mask, to expose portions of the magnetically active surface. A magnetic property of the exposed portions of the magnetically active surface is then modified by directing energy through the etched resist layer and the etched oxide layer, which are subsequently removed from the substrate.

Abstract translation: 提供了用于形成图案化磁性基底的方法和装置。 在基板的磁性活性表面上形成图案化的抗蚀剂。 通过可流动的CVD工艺在图案化的抗蚀剂上形成氧化物层。 蚀刻氧化物层以暴露图案化抗蚀剂的部分。 然后使用蚀刻的氧化物层作为掩模蚀刻图案化的抗蚀剂，以暴露磁性活性表面的部分。 然后通过将能量引导通过经蚀刻的抗蚀剂层和经蚀刻的氧化物层（随后从衬底去除）来改变磁性活性表面的暴露部分的磁性。

公开(公告)号：US20220020590A1

公开(公告)日：2022-01-20

申请号：US16928252

申请日：2020-07-14

Applicant: Applied Materials, Inc.

Inventor： Wei-Sheng LEI ,  Kurtis LESCHKIES ,  Roman GOUK ,  Steven VERHAVERBEKE ,  Visweswaren SIVARAMAKRISHNAN

IPC: H01L21/268 ,  H01L21/768 ,  H01L21/67 ,  H01L21/68 ,  B23K26/00 ,  B23K26/386

Abstract: In an embodiment is provided a method of forming a blind via in a substrate comprising a mask layer, a conductive layer, and a dielectric layer that includes conveying the substrate to a scanning chamber; determining one or more properties of the blind via, the one or more properties comprising a top diameter, a bottom diameter, a volume, or a taper angle of about 80° or more; focusing a laser beam at the substrate to remove at least a portion of the mask layer; adjusting the laser process parameters based on the one or more properties; and focusing the laser beam, under the adjusted laser process parameters, to remove at least a portion of the dielectric layer within the volume to form the blind via. In some embodiments, the mask layer can be pre-etched. In another embodiment is provided an apparatus for forming a blind via in a substrate.

公开(公告)号：US20180374696A1

公开(公告)日：2018-12-27

申请号：US15844989

申请日：2017-12-18

Applicant: Applied Materials, Inc.

Inventor： Han-Wen CHEN ,  Steven VERHAVERBEKE ,  Roman GOUK ,  Guan Huei SEE ,  Yu GU ,  Arvind SUNDARRAJAN

IPC: H01L21/02 ,  H01L23/538 ,  H01L21/027 ,  H01L21/311 ,  G03F7/00 ,  H01L21/48

Abstract: Embodiments of the present disclosure generally describe methods of forming one or more device terminal redistribution layers using imprint lithography. The methods disclosed herein enable the formation of high aspect ratio interconnect structures at lower costs than conventional photolithography and etch processes. Further, the processes and methods described herein desirably remove, reduce, and/or substantially eliminate voids in the surrounding polymer layer formed during the polymer deposition process or subsequent thereto.

公开(公告)号：US20170148624A1

公开(公告)日：2017-05-25

申请号：US15325419

申请日：2015-07-10

Applicant: Applied Materials, Inc.

Inventor： Steven VERHAVERBEKE ,  Han-Wen CHEN ,  Roman GOUK ,  Kurtis LESCHKIES

IPC: H01L21/02 ,  H01L21/67

CPC classification number: H01L21/0206 ,  H01J37/32357 ,  H01L21/02101 ,  H01L21/02164 ,  H01L21/02203 ,  H01L21/02216 ,  H01L21/02282 ,  H01L21/02334 ,  H01L21/02343 ,  H01L21/02348 ,  H01L21/67034 ,  H01L21/67051 ,  H01L21/67173 ,  H01L21/6719 ,  H01L21/67207

Abstract: The present disclosure generally relates to apparatus and methods for forming a low-k dielectric material on a substrate. The method includes various substrate processing steps utilizing a wet processing chamber, a solvent exchange chamber, and a supercritical fluid chamber. More specifically, a dielectric material in an aqueous solution may be deposited on the substrate and a solvent exchange process may be performed to prepare the substrate for a supercritical drying process. During the supercritical drying process, liquids present in the solution and remaining on the substrate from the solvent exchange process are removed via sublimation during the supercritical drying process. The resulting dielectric material formed on the substrate may be considered a silica aerogel which exhibits a very low k-value.

公开(公告)号：US20150380249A1

公开(公告)日：2015-12-31

申请号：US14758784

申请日：2014-01-06

Applicant: APPLIED MATERIALS, INC.

Inventor： Roman GOUK ,  Steven VERHAVERBEKE

IPC: H01L21/225 ,  H01L29/66 ,  H01L21/02

CPC classification number: H01L21/2254 ,  H01L21/02043 ,  H01L21/02057 ,  H01L21/02101 ,  H01L29/66795 ,  H01L29/66803

Abstract: Methods for forming a conformal dopant monolayer on a substrate are provided. In one embodiment, a method for forming a semi-conductor device on a substrate includes forming a charged layer on a silicon containing surface disposed on a substrate, wherein the charged layer has a first charge, and forming a dopant monolayer on the charged layer, wherein dopants formed in the dopant monolayer include at least one of a group III or group V atoms.

Abstract translation: 提供了在衬底上形成保形掺杂剂单层的方法。 在一个实施例中，在衬底上形成半导体器件的方法包括在设置在衬底上的含硅表面上形成带电层，其中带电层具有第一电荷，并且在带电层上形成掺杂剂单层， 其中在所述掺杂剂单层中形成的掺杂剂包括III族或V族原子中的至少一种。

公开(公告)号：US20150214475A1

公开(公告)日：2015-07-30

申请号：US14677761

申请日：2015-04-02

Applicant: Applied Materials, Inc.

Inventor： Roman GOUK ,  Steven VERHAVERBEKE ,  Alexander KONTOS ,  Adolph Miller ALLEN ,  Kevin MORAES

IPC: H01L43/12 ,  H01F41/34

CPC classification number: H01L43/12 ,  G11B5/746 ,  G11B5/855 ,  G11C11/16 ,  H01F41/34 ,  H01L21/2855 ,  H01L21/3081

Abstract: A method and apparatus for forming a magnetic layer having a pattern of magnetic properties on a substrate is described. The method includes using a metal nitride hardmask layer to pattern the magnetic layer by plasma exposure. The metal nitride layer is patterned using a nanoimprint patterning process with a silicon oxide pattern negative material. The pattern is developed in the metal nitride using a halogen and oxygen containing remote plasma, and is removed after plasma exposure using a caustic wet strip process. All processing is done at low temperatures to avoid thermal damage to magnetic materials.

Abstract translation: 描述了在基板上形成具有磁特性图案的磁性层的方法和装置。 该方法包括使用金属氮化物硬掩模层通过等离子体曝光对磁性层进行图案化。 使用具有氧化硅图案负材料的纳米压印图案化工艺对金属氮化物层进行构图。 在使用含卤素和含氧远距离等离子体的金属氮化物中形成图案，并且在使用苛性湿法剥离法等离子体暴露后除去。 所有加工都是在低温下进行，以避免热损坏磁性材料。

公开(公告)号：US20140147700A1

公开(公告)日：2014-05-29

申请号：US14170009

申请日：2014-01-31

Applicant: Applied Materials, Inc.

Inventor： Christopher Dennis BENCHER ,  Roman GOUK ,  Steven VERHAVERBEKE ,  Li-Qun XIA ,  Yong-Won LEE ,  Matthew D. SCOTNEY-CASTLE ,  Martin A. HILKENE ,  Peter I. PORSHNEV

IPC: G11B5/74 ,  G11B5/85

CPC classification number: G11B5/85 ,  G11B5/743 ,  G11B5/855

Abstract: A method and apparatus for forming magnetic media substrates is provided. A patterned resist layer is formed on a substrate having a magnetically susceptible layer. A conformal protective layer is formed over the patterned resist layer to prevent degradation of the pattern during subsequent processing. The substrate is subjected to an energy treatment wherein energetic species penetrate portions of the patterned resist and conformal protective layer according to the pattern formed in the patterned resist, impacting the magnetically susceptible layer and modifying a magnetic property thereof. The patterned resist and conformal protective layers are then removed, leaving a magnetic substrate having a pattern of magnetic properties with a topography that is substantially unchanged.

Abstract translation: 提供了一种形成磁性介质基板的方法和装置。 在具有磁敏感层的基板上形成图案化的抗蚀剂层。 在图案化的抗蚀剂层上形成保形层，以防止后续处理期间图案的劣化。 对衬底进行能量处理，其中能量物质根据形成在图案化抗蚀剂中的图案穿透图案化抗蚀剂和保形层的部分，撞击磁敏感层并改变其磁性。 然后去除图案化的抗蚀剂和共形保护层，留下具有基本上不变的形貌的磁性质图案的磁性基底。

公开(公告)号：US20210257289A1

公开(公告)日：2021-08-19

申请号：US17227837

申请日：2021-04-12

Applicant: Applied Materials, Inc.

Inventor： Han-Wen CHEN ,  Steven VERHAVERBEKE ,  Giback PARK ,  Kyuil CHO ,  Kurtis LESCHKIES ,  Roman GOUK ,  Chintan BUCH ,  Vincent DICAPRIO ,  Bernhard STONAS ,  Jean DELMAS

IPC: H01L23/498 ,  H01L23/14 ,  H01L21/48

Abstract: The present disclosure relates to semiconductor core assemblies and methods of forming the same. The semiconductor core assemblies described herein may be utilized to form semiconductor package assemblies, PCB assemblies, PCB spacer assemblies, chip carrier assemblies, intermediate carrier assemblies (e.g., for graphics cards), and the like. In one embodiment, a silicon substrate core is structured by direct laser patterning. One or more conductive interconnections are formed in the substrate core and one or more redistribution layers are formed on surfaces thereof. The silicon substrate core may thereafter be utilized as a core structure for a semiconductor package, PCB, PCB spacer, chip carrier, intermediate carrier, or the like.