公开(公告)号：US07198705B2

公开(公告)日：2007-04-03

申请号：US10325773

申请日：2002-12-19

Applicant: Linlin Chen ,  Jiong-Ping Lu ,  Changfeng Xia

Inventor： Linlin Chen ,  Jiong-Ping Lu ,  Changfeng Xia

IPC: C25D5/48 ,  C25D7/12 ,  C25D5/02 ,  C25D5/10

CPC classification number: H01L21/76877 ,  H01L21/2885

Abstract: An improved copper ECD process. After the copper seed layer (116) is formed, a first portion of copper film (118) is plated onto the surface of the seed layer (116). The surface of the first portion of the copper film (118) is then rinsed to equalize the organic adsorption on all sites to prevent preferential copper growth in dense areas. After rinsing, the remaining copper of the copper film (118) is electrochemically deposited.

Abstract translation: 改进的铜ECD工艺。 在形成铜籽晶层（116）之后，将第一部分铜膜（118）镀在种子层（116）的表面上。 然后冲洗铜膜（118）的第一部分的表面以均衡所有位置上的有机吸附，以防止在密集区域中优先铜生长。 冲洗后，电化学沉积铜膜（118）的剩余铜。

公开(公告)号：US07135404B2

公开(公告)日：2006-11-14

申请号：US10470287

申请日：2003-01-10

Applicant: Rajesh Baskaran ,  Bioh Kim ,  Linlin Chen ,  Lyndon W Graham

Inventor： Rajesh Baskaran ,  Bioh Kim ,  Linlin Chen ,  Lyndon W Graham

IPC: H01L21/44 ,  C25D5/34

CPC classification number: H01L21/76843 ,  C23C18/1605 ,  C25D3/38 ,  C25D5/18 ,  C25D5/34 ,  C25D5/38 ,  C25D5/54 ,  C25D7/123 ,  H01L21/2885 ,  H01L21/321 ,  H01L21/32134 ,  H01L21/76846 ,  H01L21/76861 ,  H01L21/76864 ,  H01L21/76873 ,  H01L21/76885 ,  H01L2221/1089

Abstract: The present invention is directed to a process for producing structures containing metallized features for use in microelectric workpieces. The process treats a barrier layer to promote the adhesion between the barrier layer and the metallized feature. Suitable means for promoting adhesion between barrier layers and the metallized features according to the invention include an acid treatment of the barrier layer, an electrolytic treatment of the barrier layer, or deposition of a bonding layer between the barrier layer and metallized feature. The present invention thus modifies an exterior surface of a barrier layer making it more suitable for electrodeposition of metal on a barrier, thus eliminating the need for a PVD or CVD seed layer deposition process.

Abstract translation: 本发明涉及一种用于生产用于微电工件的包含金属化特征的结构的方法。 该方法处理阻挡层以促进阻挡层和金属化特征之间的粘附。 用于促进根据本发明的阻挡层和金属化特征之间的粘附的合适方式包括阻挡层的酸处理，阻挡层的电解处理，或阻挡层和金属化特征之间的结合层的沉积。 因此，本发明改变了阻挡层的外表面，使其更适合于在屏障上电沉积金属，因此不需要PVD或CVD种子层沉积工艺。

公开(公告)号：US07067015B2

公开(公告)日：2006-06-27

申请号：US10284708

申请日：2002-10-31

Applicant: Changfeng Xia ,  Linlin Chen

Inventor： Changfeng Xia ,  Linlin Chen

IPC: C23G1/02

CPC classification number: H01L21/67051 ,  B08B3/08 ,  B08B3/12 ,  C11D7/08 ,  C11D11/0047 ,  C11D11/0064 ,  H01L21/67046 ,  Y10S438/906

Abstract: A cleaning chemistry for lowering defect levels on the backside of a semiconductor wafer after chemical mechanical planarization (CMP). In a preferred embodiment of the present invention, a cleaning chemistry comprising nitric acid, hydrofluoric acid, and phosphoric acid in solution with deionized water is applied to the wafer surface to be cleaned preferably while subjected to megasonic assist cleaning. The wafer is preferably then subjected to brush scrubbing and a deionized water rinse with megasonic assist cleaning.

Abstract translation: 用于在化学机械平面化（CMP）之后降低半导体晶片背面的缺陷水平的清洁化学品。 在本发明的优选实施方案中，优选在进行超声波辅助清洗的同时，将包含硝酸，氢氟酸和磷酸在内的去离子水溶液中的清洗化学品施加到待清洗的晶片表面上。 然后优选将晶片经过刷洗和用超音波辅助清洗的去离子水冲洗。

公开(公告)号：US07332066B2

公开(公告)日：2008-02-19

申请号：US11053050

申请日：2005-02-07

Applicant: Linlin Chen ,  Gregory J. Wilson ,  Paul R. McHugh ,  Robert A. Weaver ,  Thomas L. Ritzdorf

Inventor： Linlin Chen ,  Gregory J. Wilson ,  Paul R. McHugh ,  Robert A. Weaver ,  Thomas L. Ritzdorf

IPC: C25D7/12 ,  C25D17/00 ,  C25D17/12

CPC classification number: H01L21/76868 ,  C25D3/38 ,  C25D5/08 ,  C25D5/10 ,  C25D5/50 ,  C25D7/123 ,  C25D17/02 ,  C25D17/10 ,  C25D17/12 ,  H01L21/288 ,  H01L21/2885 ,  H01L21/76843 ,  H01L21/76873 ,  H01L21/76877 ,  H01L2221/1089 ,  Y10S204/07 ,  Y10T428/12493

Abstract: A process for metallization of a workpiece, such as a semiconductor workpiece. In an embodiment, an alkaline electrolytic copper bath is used to electroplate copper onto a seed layer, electroplate copper directly onto a barrier layer material, or enhance an ultra-thin copper seed layer which has been deposited on the barrier layer using a deposition process such as PVD. The resulting copper layer provides an excellent conformal copper coating that fills trenches, vias, and other microstructures in the workpiece. When used for seed layer enhancement, the resulting copper seed layer provide an excellent conformal copper coating that allows the microstructures to be filled with a copper layer having good uniformity using electrochemical deposition techniques. Further, copper layers that are electroplated in the disclosed manner exhibit low sheet resistance and are readily annealed at low temperatures.

Abstract translation: 用于对诸如半导体工件的工件进行金属化的工艺。 在一个实施方案中，使用碱性电解铜浴将铜电镀到种子层上，将铜直接电镀到阻挡层材料上，或者使用沉积方法增强已经沉积在阻挡层上的超薄铜籽晶层 作为PVD。 所得到的铜层提供了一种优异的保形铜涂层，其填充工件中的沟槽，通孔和其它微结构。 当用于种子层增强时，所得到的铜种子层提供了优异的共形铜涂层，其允许使用电化学沉积技术使微结构填充具有良好均匀性的铜层。 此外，以所公开的方式电镀的铜层表现出低的薄层电阻，并且在低温下容易退火。

公开(公告)号：US20060079085A1

公开(公告)日：2006-04-13

申请号：US11286084

申请日：2005-11-23

Applicant: Rajesh Baskaran ,  Bioh Kim ,  Linlin Chen ,  Lyndon Graham

Inventor： Rajesh Baskaran ,  Bioh Kim ,  Linlin Chen ,  Lyndon Graham

IPC: C25D5/34 ,  H01L21/44

CPC classification number: H01L21/76843 ,  C23C18/1605 ,  C25D3/38 ,  C25D5/18 ,  C25D5/34 ,  C25D5/38 ,  C25D5/54 ,  C25D7/123 ,  H01L21/2885 ,  H01L21/321 ,  H01L21/32134 ,  H01L21/76846 ,  H01L21/76861 ,  H01L21/76864 ,  H01L21/76873 ,  H01L21/76885 ,  H01L2221/1089

Abstract: The present invention is directed to a process for producing structures containing metallized features for use in microelectronic workpieces. The process treats a barrier layer to promote the adhesion between the barrier layer and the metallized feature. Suitable means for promoting adhesion between barrier layers and metallized features according to the invention include an acid treatment of the barrier layer, an electrolytic treatment of the barrier layer, or deposition of a bonding layer between the barrier layer and metallized feature. The present invention thus modifies an exterior surface of a barrier layer making it more suitable for electrodeposition of metal on a barrier, thus eliminating the need for a PVD or CVD seed layer deposition process.

Abstract translation: 本发明涉及一种用于生产用于微电子工件的包含金属化特征的结构的方法。 该方法处理阻挡层以促进阻挡层和金属化特征之间的粘附。 根据本发明的用于促进阻挡层和金属化特征之间的粘合的合适方式包括阻挡层的酸处理，阻挡层的电解处理或者阻挡层和金属化特征之间的结合层的沉积。 因此，本发明改变了阻挡层的外表面，使其更适合于在屏障上电沉积金属，因此不需要PVD或CVD种子层沉积工艺。

公开(公告)号：US20050150770A1

公开(公告)日：2005-07-14

申请号：US11067241

申请日：2005-02-25

Applicant: Linlin Chen

Inventor： Linlin Chen

IPC: C23C28/00 ,  C23C28/02 ,  C25D3/38 ,  C25D5/10 ,  C25D7/12 ,  H01L21/288 ,  H01L21/445 ,  H01L21/768 ,  H05K3/42

CPC classification number: C25D7/123 ,  C23C28/322 ,  C23C28/34 ,  C25D3/38 ,  C25D5/10 ,  H01L21/2885 ,  H01L21/76843 ,  H01L21/76868 ,  H01L21/76873 ,  H01L21/76877 ,  H01L2221/1089 ,  H05K3/423

Abstract: This invention employs a novel approach to the copper metallization of a workpiece, such as a semiconductor workpiece. In accordance with the invention, an alkaline electrolytic copper bath is used to electroplate copper onto a seed layer, electroplate copper directly onto a barrier layer material, or enhance an ultra-thin copper seed layer which has been deposited on the barrier layer using a deposition process such as PVD. The resulting copper layer provides an excellent conformal copper coating that fills trenches, vias, and other microstructures in the workpiece. When used for seed layer enhancement, the resulting copper seed layer provide an excellent conformal copper coating that allows the microstructures to be filled with a copper layer having good uniformity using electrochemical deposition techniques. Further, copper layers that are electroplated in the disclosed manner exhibit low sheet resistance and are readily annealed at low temperatures.

公开(公告)号：US20050139478A1

公开(公告)日：2005-06-30

申请号：US11067278

申请日：2005-02-25

Applicant: Linlin Chen

Inventor： Linlin Chen

IPC: C23C28/00 ,  C23C28/02 ,  C25D3/38 ,  C25D5/10 ,  C25D7/12 ,  H01L21/288 ,  H01L21/445 ,  H01L21/768 ,  H05K3/42 ,  C25D5/18

CPC classification number: C25D7/123 ,  C23C28/322 ,  C23C28/34 ,  C25D3/38 ,  C25D5/10 ,  H01L21/2885 ,  H01L21/76843 ,  H01L21/76868 ,  H01L21/76873 ,  H01L21/76877 ,  H01L2221/1089 ,  H05K3/423

Abstract: This invention employs a novel approach to the copper metallization of a workpiece, such as a semiconductor workpiece. In accordance with the invention, an alkaline electrolytic copper bath is used to electroplate copper onto a seed layer, electroplate copper directly onto a barrier layer material, or enhance an ultra-thin copper seed layer which has been deposited on the barrier layer using a deposition process such as PVD. The resulting copper layer provides an excellent conformal copper coating that fills trenches, vias, and other microstructures in the workpiece. When used for seed layer enhancement, the resulting copper seed layer provide an excellent conformal copper coating that allows the microstructures to be filled with a copper layer having good uniformity using electrochemical deposition techniques. Further, copper layers that are electroplated in the disclosed manner exhibit low sheet resistance and are readily annealed at low temperatures.

公开(公告)号：US06811675B2

公开(公告)日：2004-11-02

申请号：US09885232

申请日：2001-06-20

Applicant: Linlin Chen

Inventor： Linlin Chen

IPC: C25D338

CPC classification number: C25D7/123 ,  C23C28/322 ,  C23C28/34 ,  C25D3/38 ,  C25D5/10 ,  H01L21/2885 ,  H01L21/76843 ,  H01L21/76868 ,  H01L21/76873 ,  H01L21/76877 ,  H01L2221/1089 ,  H05K3/423

Abstract: This invention employs a novel approach to the copper metallization of a workpiece, such as a semiconductor workpiece. In accordance with the invention, an alkaline electrolytic copper bath is used to electroplate copper onto a seed layer, electroplate copper directly onto a barrier layer material, or enhance an ultra-thin copper seed layer which has been deposited on the barrier layer using a deposition process such as PVD. The resulting copper layer provides an excellent conformal copper coating that fills trenches, vias, and other microstructures in the workpiece. When used for seed layer enhancement, the resulting copper seed layer provide an excellent conformal copper coating that allows the microstructures to be filled with a copper layer having good uniformity using electrochemical deposition techniques. Further, copper layers that are electroplated in the disclosed manner exhibit low sheet resistance and are readily annealed at low temperatures.

Abstract translation: 本发明采用了对诸如半导体工件的工件的铜金属化的新颖方法。 根据本发明，使用碱性电解铜浴将铜电镀到种子层上，将铜直接电镀到阻挡层材料上，或者使用沉积物增强已经沉积在阻挡层上的超薄铜籽晶层 工艺如PVD。 所得到的铜层提供了一种优异的保形铜涂层，其填充工件中的沟槽，通孔和其它微结构。 当用于种子层增强时，所得到的铜种子层提供了优异的共形铜涂层，其允许使用电化学沉积技术使微结构填充具有良好均匀性的铜层。 此外，以所公开的方式电镀的铜层表现出低的薄层电阻，并且在低温下容易退火。

公开(公告)号：US06743719B1

公开(公告)日：2004-06-01

申请号：US10348821

申请日：2003-01-22

Applicant: Linlin Chen ,  Jiong-Ping Lu ,  Changfeng Xia

Inventor： Linlin Chen ,  Jiong-Ping Lu ,  Changfeng Xia

IPC: H01L2144

CPC classification number: H01L21/76843 ,  H01L21/76861 ,  H01L21/76874 ,  H01L21/76877 ,  Y10S438/908

Abstract: The present invention provides, in one embodiment, a method of forming a metal layer over a semiconductor wafer. The method includes the chemical reduction of copper oxide (105) over the deposited copper seed layer (110) by exposure to a substantially copper-free reducing agent solution (120), such that the copper oxide (105) is substantially converted to elemental copper, followed by electrochemical deposition of a second copper layer (125) over the copper seed layer (110). Such methods and resulting conductive structures thereof may be advantageously used in methods to make integrated circuits comprising interconnection metal lines.

Abstract translation: 在一个实施例中，本发明提供了一种在半导体晶片上形成金属层的方法。 该方法包括通过暴露于基本上不含铜的还原剂溶液（120）而在沉积的铜籽晶层（110）上化学还原氧化铜（105），使得氧化铜（105）基本上转化为元素铜 ，然后在铜籽晶层（110）上电化学沉积第二铜层（125）。 这样的方法及其导电结构可有利地用于制造包括互连金属线的集成电路的方法中。

公开(公告)号：US20080153393A1

公开(公告)日：2008-06-26

申请号：US11716804

申请日：2007-03-12

Applicant: Linlin Chen ,  Li Chen ,  Satyavolu Srinivas Papa Rao

Inventor： Linlin Chen ,  Li Chen ,  Satyavolu Srinivas Papa Rao

IPC: B24B1/00

CPC classification number: B24B37/042

Abstract: A method for serially polishing a plurality of semiconductor wafers, wherein a CMP apparatus having a first polishing pad and a second polishing pad is provided. A first slurry composition is disposed between the first polishing pad and a first wafer when the first wafer is in a first state, and a first polishing on the first wafer via the first polishing pad and first slurry composition is commenced at a first commencement time. A second slurry composition is disposed between the second polishing pad and a second wafer when the second wafer is in a second state, and a second polishing on the second wafer via the second polishing pad and second slurry is commenced at a second commencement time, wherein the second commencement time differs from the first commencement time by a first intermediate period. One or more of the first wafer and the second wafer is rinsed with a pre-rinse agent for at least a portion of the first intermediate period. The first polishing and second polishing are halted at substantially the same end time, therein placing the first wafer in the second state and the second wafer in a third state.

Abstract translation: 一种串联抛光多个半导体晶片的方法，其中提供了具有第一抛光垫和第二抛光垫的CMP装置。 当第一晶片处于第一状态时，第一浆料组合物设置在第一抛光垫和第一晶片之间，并且经由第一抛光垫和第一浆料组合物在第一晶片上的第一次抛光在第一次启动时开始。 当第二晶片处于第二状态时，第二浆料组合物设置在第二抛光垫和第二晶片之间，并且经由第二抛光垫和第二浆料在第二晶片上的第二抛光在第二次开始时间开始，其中 第二开始时间与第一开始时间不同于第一中间时段。 第一晶片和第二晶片中的一个或多个用预漂洗剂冲洗至少第一中间周期的一部分。 第一抛光和第二抛光在基本相同的结束时间停止，其中将第一晶片置于第二状态，而第二晶片处于第三状态。