公开(公告)号：US07612501B2

公开(公告)日：2009-11-03

申请号：US11276035

申请日：2006-02-10

Applicant: Sung-Tae Kim

Inventor： Sung-Tae Kim

IPC: H01J17/49 ,  H01L31/0312 ,  G09G3/10

CPC classification number: H05K3/361 ,  H01J11/10 ,  H01J11/46 ,  H05K1/117 ,  H05K3/323 ,  H05K2201/09427 ,  H05K2201/098

Abstract: A plasma display apparatus comprising a connector is provided. The plasma display apparatus comprises a plasma display panel comprising an electrode of a predetermined width and a connector comprising an electrode line of a width narrower than the predetermined width of the electrode to supply a driving signal to the electrode. A distance between the electrode line and an adjacent electrode line is longer than a distance between the electrode and an adjacent electrode.

Abstract translation: 提供了包括连接器的等离子体显示装置。 等离子体显示装置包括等离子体显示面板，其包括预定宽度的电极和包括宽度比电极的预定宽度窄的电极线的连接器，以向电极提供驱动信号。 电极线和相邻电极线之间的距离比电极和相邻电极之间的距离长。

公开(公告)号：US20080014711A1

公开(公告)日：2008-01-17

申请号：US11654588

申请日：2007-01-18

Applicant: Jong-Wan Choi ,  Ju-Seon Goo ,  Hong-Gun Kim ,  Yong-Soon Choi ,  Sung-Tae Kim ,  Eun-Kyung Baek

Inventor： Jong-Wan Choi ,  Ju-Seon Goo ,  Hong-Gun Kim ,  Yong-Soon Choi ,  Sung-Tae Kim ,  Eun-Kyung Baek

IPC: H01L21/76

CPC classification number: H01L21/76229 ,  H01L27/105 ,  H01L27/11531

Abstract: Disclosed are methods for fabricating semiconductor devices incorporating a composite trench isolation structure comprising a first oxide pattern, a SOG pattern and a second oxide pattern wherein the oxide patterns enclose the SOG pattern. The methods include the deposition of a first oxide layer and a SOG layer to fill recessed trench regions formed in the substrate. The first oxide layer and the SOG layer are then subjected to a planarization sequence including a CMP process followed by an etchback process to form a composite structure having a substantially flat upper surface that exposes both the oxide and the SOG material. The second oxide layer is then applied and subjected to a similar CMP/etchback sequence to obtain a composite structure having an upper surface that is recessed relative to a plane defined by the surfaces of adjacent active regions.

Abstract translation: 公开了用于制造半导体器件的方法，该半导体器件结合有包括第一氧化物图案，SOG图案和第二氧化物图案的复合沟槽隔离结构，其中氧化物图案包围SOG图案。 所述方法包括沉积第一氧化物层和SOG层以填充形成在衬底中的凹陷沟槽区域。 然后对第一氧化物层和SOG层进行包括CMP工艺的随后的回蚀工艺的平坦化顺序，以形成具有露出氧化物和SOG材料的基本上平坦的上表面的复合结构。 然后施加第二氧化物层并进行类似的CMP /回蚀序列以获得具有相对于由相邻有源区的表面限定的平面凹进的上表面的复合结构。

公开(公告)号：US20070166482A1

公开(公告)日：2007-07-19

申请号：US10587559

申请日：2004-11-19

Applicant: Sung-Tae Kim ,  Keon Kim II

Inventor： Sung-Tae Kim ,  Keon Kim II

IPC: C09K19/00 ,  B32B37/00 ,  G02F1/1335 ,  B32B38/00

CPC classification number: G02F1/133536 ,  G02B5/305 ,  G02F2001/133543 ,  G02F2203/05 ,  Y10T428/10 ,  Y10T428/1036

Abstract: The present invention relates to a method of manufacturing a reflective polarizing film for a liquid crystal display device in which cholesteric liquid crystal layers having different selective light-reflecting wavelengths are laminated in the laminated coating method, thus a forming liquid crystal film that covers a visible light region and ¼λ retardation film are attached to the liquid crystal film. In this case, two or more cholestric liquid crystal layers having different selective light-reflecting wavelengths are laminated in order from the shorter wavelength to the longer wavelength in the laminated coating method. Further, during the lamination, orientation layers are laminated between the liquid crystal layers to maximize the selective reflection characteristic of the cholesteric liquid crystal.

Abstract translation: 本发明涉及一种液晶显示装置的反射型偏振片的制造方法，其中层压涂布法层叠具有不同的选择性光反射波长的胆甾醇型液晶层，从而形成覆盖可见光的液晶膜 光区域和1/4延迟膜附着在液晶膜上。 在这种情况下，在层叠涂布法中，从短波长到较长波长的顺序层叠具有不同选择性光反射波长的两个以上的胆甾型液晶层。 此外，在层压期间，取向层层压在液晶层之间，以使胆甾醇型液晶的选择反射特性最大化。

公开(公告)号：US07135422B2

公开(公告)日：2006-11-14

申请号：US10884507

申请日：2004-07-02

Applicant: Gab-Jin Nam ,  Jong-Wan Kwon ,  Han-Mei Choi ,  Jae-Soon Lim ,  Seung-Hwan Lee ,  Ki-Chul Kim ,  Sung-Tae Kim ,  Young-Sun Kim

Inventor： Gab-Jin Nam ,  Jong-Wan Kwon ,  Han-Mei Choi ,  Jae-Soon Lim ,  Seung-Hwan Lee ,  Ki-Chul Kim ,  Sung-Tae Kim ,  Young-Sun Kim

IPC: H01L21/31

CPC classification number: H01L21/0228 ,  C23C16/403 ,  C23C16/405 ,  C23C16/45529 ,  H01L21/02175 ,  H01L21/022 ,  H01L21/3141 ,  H01L21/31604 ,  H01L21/31616 ,  H01L21/31637 ,  H01L21/31645 ,  H01L28/40 ,  H01L28/90

Abstract: Multi-layered structures formed using atomic-layer deposition processes include multiple metal oxide layers wherein the metal oxide layers are formed without the presence of interlayer oxide layers and may include different metal oxide compositions.

Abstract translation: 使用原子层沉积工艺形成的多层结构包括多个金属氧化物层，其中形成金属氧化物层而不存在层间氧化物层，并且可以包括不同的金属氧化物组合物。

公开(公告)号：US20060234517A1

公开(公告)日：2006-10-19

申请号：US11430856

申请日：2006-05-10

Applicant: Jae-Hyun Yeo ,  Young-Sun Kim ,  Sung-Tae Kim ,  In-Sung Park ,  Gi-Vin Im

Inventor： Jae-Hyun Yeo ,  Young-Sun Kim ,  Sung-Tae Kim ,  In-Sung Park ,  Gi-Vin Im

IPC: H01L21/473

CPC classification number: H01L21/0228 ,  C23C16/405 ,  C23C16/452 ,  C23C16/45553 ,  H01L21/02181 ,  H01L21/02274 ,  H01L21/3141 ,  H01L21/31604 ,  H01L21/31637 ,  H01L21/31641 ,  H01L21/31645 ,  H01L21/31683 ,  H01L21/31691 ,  H01L28/40

Abstract: Disclosed are methods of forming dielectric materials using atomic layer deposition (ALD) and methods of forming dielectric layers from such materials on a semiconductor device. The ALD process utilizes a first reactant containing at least one alkoxide group that is chemisorbed onto a surface of a substrate and then reacted with an activated oxidant that contains no hydroxyl group to form a dielectric material exhibiting excellent step coverage and improved leakage current characteristics.

Abstract translation: 公开了使用原子层沉积（ALD）形成介电材料的方法以及在半导体器件上从这种材料形成电介质层的方法。 ALD方法利用含有至少一个醇化物基团的第一反应物，其被化学吸附在基材的表面上，然后与不含羟基的活化氧化剂反应，形成表现出优异的台阶覆盖率和改善的漏电流特性的电介质材料。

公开(公告)号：US07087482B2

公开(公告)日：2006-08-08

申请号：US10615881

申请日：2003-07-10

Applicant: Jae-Hyun Yeo ,  Young-Sun Kim ,  Sung-Tae Kim ,  In-Sung Park ,  Gi-Vin Im

Inventor： Jae-Hyun Yeo ,  Young-Sun Kim ,  Sung-Tae Kim ,  In-Sung Park ,  Gi-Vin Im

IPC: H01L21/8242

CPC classification number: H01L21/0228 ,  C23C16/405 ,  C23C16/452 ,  C23C16/45553 ,  H01L21/02181 ,  H01L21/02274 ,  H01L21/3141 ,  H01L21/31604 ,  H01L21/31637 ,  H01L21/31641 ,  H01L21/31645 ,  H01L21/31683 ,  H01L21/31691 ,  H01L28/40

Abstract: Disclosed are methods of forming dielectric materials using atomic layer deposition (ALD) and methods of forming dielectric layers from such materials on a semiconductor device. The ALD process utilizes a first reactant containing at least one alkoxide group that is chemisorbed onto a surface of a substrate and then reacted with an activated oxidant that contains no hydroxyl group to form a dielectric material exhibiting excellent step coverage and improved leakage current characteristics.

公开(公告)号：US20060166476A1

公开(公告)日：2006-07-27

申请号：US11339416

申请日：2006-01-25

Applicant: Jong-Cheol Lee ,  Sung-Tae Kim ,  Young-Sun Kim ,  Cha-Young Yoo ,  Gab-Jin Nam ,  Young-Geun Park ,  Jae-Hyoung Choi ,  Jae-Hyun Yeo ,  Ha-Jin Lim ,  Yun-Seok Kim

Inventor： Jong-Cheol Lee ,  Sung-Tae Kim ,  Young-Sun Kim ,  Cha-Young Yoo ,  Gab-Jin Nam ,  Young-Geun Park ,  Jae-Hyoung Choi ,  Jae-Hyun Yeo ,  Ha-Jin Lim ,  Yun-Seok Kim

IPC: H01L21/471

CPC classification number: H01L21/022 ,  C23C14/5826 ,  C23C14/586 ,  C23C16/56 ,  H01L21/02142 ,  H01L21/02252 ,  H01L21/28273 ,  H01L21/3141 ,  H01L21/3143 ,  H01L21/31645 ,  H01L27/10852 ,  H01L27/10873 ,  H01L27/115 ,  H01L27/11521 ,  H01L28/40 ,  H01L29/513 ,  H01L29/517 ,  H01L29/78

Abstract: In a method of manufacturing a dielectric structure, after a first dielectric layer is formed on a substrate by using a metal oxide doped with silicon, the substrate is placed on a susceptor of a chamber. By treating the first dielectric layer with a plasma in controlling a voltage difference between the susceptor and a ground, a second dielectric layer is formed on the first dielectric layer. The second dielectric layer including a metal oxynitride doped with silicon having enough content of nitrogen is formed on the first dielectric layer. Therefore, dielectric properties of the dielectric structure comprising the first and the second dielectric layers can be improved and a leakage current can be greatly decreased. By adapting the dielectric structure to a gate insulation layer and/or to a dielectric layer of a capacitor or of a non-volatile semiconductor memory device, capacitances and electrical properties can be improved.

Abstract translation: 在制造电介质结构的方法中，在通过使用掺杂有硅的金属氧化物在基板上形成第一介电层之后，将基板放置在室的基座上。 通过在控制基座和接地之间的电压差的同时用等离子体处理第一电介质层，在第一电介质层上形成第二电介质层。 在第一电介质层上形成包括掺杂有足够的氮含量的硅的金属氮氧化物的第二电介质层。 因此，可以提高包括第一和第二电介质层的电介质结构的介电性能，并且可以大大降低泄漏电流。 通过使电介质结构适应于栅极绝缘层和/或电容器或非易失性半导体存储器件的电介质层，可以提高电容和电性能。

公开(公告)号：US20060099760A1

公开(公告)日：2006-05-11

申请号：US11266520

申请日：2005-11-03

Applicant: Rak-Hwan Kim ,  Young-Joo Cho ,  Sung-Tae Kim ,  In-Sun Park ,  Hyeon-Deok Lee ,  Hyun-Suk Lee ,  Jung-Hee Chung ,  Hyun-Young Kim ,  Hyun-Seok Lim

Inventor： Rak-Hwan Kim ,  Young-Joo Cho ,  Sung-Tae Kim ,  In-Sun Park ,  Hyeon-Deok Lee ,  Hyun-Suk Lee ,  Jung-Hee Chung ,  Hyun-Young Kim ,  Hyun-Seok Lim

IPC: H01L21/8242

CPC classification number: H01L28/91 ,  H01L27/10817 ,  H01L27/10852 ,  H01L28/75

Abstract: Methods of forming a storage capacitor include forming an interlayer insulation layer having an opening therethrough on a semiconductor substrate, forming a contact plug in the opening, forming a molding oxide layer on the interlayer insulation layer and the contact plug, selectively removing portions of the molding oxide layer to form a recess above the contact plug, forming a titanium layer on a bottom surface and side surfaces of the recess, forming a titanium nitride layer on the titanium layer, and forming a titanium oxide nitride layer on the titanium nitride layer. A storage capacitor includes a semiconductor substrate, an interlayer insulation layer having a contact plug therein on the substrate, and a storage electrode on the contact plug including a titanium silicide layer, a titanium nitride layer on the titanium silicide layer, and a titanium oxide nitride layer on the titanium nitride layer.

Abstract translation: 形成存储电容器的方法包括在半导体衬底上形成具有开口的层间绝缘层，在开口中形成接触插塞，在层间绝缘层和接触插塞上形成模压氧化层，选择性地去除模制件的部分 在接触塞上方形成凹部，在凹部的底面和侧面形成钛层，在钛层上形成氮化钛层，在氮化钛层上形成氮化钛层。 存储电容器包括半导体衬底，在衬底上具有接触插塞的层间绝缘层，以及包括钛硅化物层的接触插塞上的存储电极，硅化钛层上的氮化钛层和氧化钛氮化物 层在氮化钛层上。

公开(公告)号：US20050170566A1

公开(公告)日：2005-08-04

申请号：US11046876

申请日：2005-02-01

Applicant: Seung-Hwan Lee ,  Kyoung-Ryul Yoon ,  Han-Mei Choi ,  Dae-Sik Choi ,  Ki-Yeon Park ,  Sung-Tae Kim ,  Young-Sun Kim ,  Cha-Young Yoo

Inventor： Seung-Hwan Lee ,  Kyoung-Ryul Yoon ,  Han-Mei Choi ,  Dae-Sik Choi ,  Ki-Yeon Park ,  Sung-Tae Kim ,  Young-Sun Kim ,  Cha-Young Yoo

IPC: B05D5/12 ,  C23C16/00 ,  C23C16/30 ,  C23C16/40 ,  C23C16/455 ,  H01L21/00 ,  H01L21/8246 ,  H01L21/84 ,  H01L27/115

CPC classification number: C23C16/45529 ,  C23C16/308 ,  C23C16/405 ,  H01L27/11502 ,  H01L27/11507

Abstract: A thin film structure and a capacitor using the film structure and methods for forming the same. The thin film structure may include a first film formed on a substrate using a first reactant and an oxidant for oxidizing the first reactant. A second film may be formed on the first film to suppress crystallization of the first film. A capacitor may include a dielectric layer, which may further include the first thin film and the second thin film.

Abstract translation: 薄膜结构和使用该薄膜结构的电容器及其形成方法。 薄膜结构可以包括使用第一反应物和用于氧化第一反应物的氧化剂在基底上形成的第一膜。 可以在第一膜上形成第二膜以抑制第一膜的结晶。 电容器可以包括电介质层，其可以进一步包括第一薄膜和第二薄膜。

公开(公告)号：US20050070063A1

公开(公告)日：2005-03-31

申请号：US10793818

申请日：2004-03-08

Applicant: Ki-Vin Im ,  Ki-Yeon Park ,  Jae-Hyun Yeo ,  In-Sung Park ,  Seung-Hwan Lee ,  Young-Sun Kim ,  Sung-Tae Kim

Inventor： Ki-Vin Im ,  Ki-Yeon Park ,  Jae-Hyun Yeo ,  In-Sung Park ,  Seung-Hwan Lee ,  Young-Sun Kim ,  Sung-Tae Kim

IPC: C23C16/40 ,  C23C16/455 ,  H01L21/28 ,  H01L21/314 ,  H01L21/316 ,  H01L21/8242 ,  H01L29/49 ,  H01L29/51

CPC classification number: H01L21/0228 ,  C23C16/405 ,  C23C16/45529 ,  C23C16/45531 ,  H01L21/02181 ,  H01L21/022 ,  H01L21/28088 ,  H01L21/28185 ,  H01L21/28194 ,  H01L21/3141 ,  H01L21/31645 ,  H01L29/4966 ,  H01L29/513 ,  H01L29/517 ,  H01L29/518

Abstract: Disclosed is a method for forming metal oxide dielectric layers, more particularly HfO2 dielectric layers, using an atomic layer deposition (ALD) method in which a series of thin intermediate layers are formed and treated with one or more oxidizers and nitrogents before the next intermediate layer is formed on the substrate. The intermediate oxidation treatments reduce the number of organic contaminants incorporated into the metal oxide layer from the organometallic precursors to produce a dielectric layer having improved current leakage characteristics. The dielectric layers formed in this manner remain susceptible to crystallization if exposed to temperatures much above 550° C., so subsequent semiconductor manufacturing processes should be modified or eliminated to avoid such temperatures or limit the duration at such temperatures to maintain the performance of the dielectric materials.

Abstract translation: 公开了一种使用原子层沉积（ALD）方法形成金属氧化物电介质层，更具体地HfO 2电介质层的方法，其中在下一个中间层之前形成一系列薄的中间层并用一种或多种氧化剂和氮化物进行处理 形成在基板上。 中间氧化处理减少了从有机金属前体引入到金属氧化物层中的有机污染物的数量，以产生具有改善的电流泄漏特性的电介质层。 如果暴露在高于550℃的温度下，以这种方式形成的电介质层仍然易于结晶，因此随后的半导体制造工艺应当被修改或消除以避免这种温度或限制在这样的温度下的持续时间以保持电介质的性能 材料