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    PROCESSING FOR OVERCOMING EXTREME TOPOGRAPHY
    1.
    发明申请
    PROCESSING FOR OVERCOMING EXTREME TOPOGRAPHY 有权
    处理极端地形图

    公开(公告)号：US20140141618A1

    公开(公告)日：2014-05-22

    申请号：US14097956

    申请日：2013-12-05

    Applicant: INTERNATIONAL BUSINESS MACHINES CORPORATION

    Inventor： Guy M. Cohen ,  Steven A. Cordes ,  Sherif A. Goma ,  Joanna Rosner ,  Jeannine M. Trewhella

    IPC: H01L21/3105

    CPC classification number: H01L21/31051 ,  B81C1/00611 ,  B81C2201/0119 ,  H01L21/0272 ,  H01L21/0337 ,  H01L21/31053 ,  H01L21/31058 ,  H01L21/3212 ,  H01L21/76838

    Abstract: A process for overcoming extreme topographies by first planarizing a cavity in a semiconductor substrate in order to create a planar surface for subsequent lithography processing. As a result of the planarizing process for extreme topographies, subsequent lithography processing is enabled including the deposition of features in close proximity to extreme topographic surfaces (e.g., deep cavities or channels) and, including the deposition of features within a cavity. In a first embodiment, the process for planarizing a cavity in a semiconductor substrate includes the application of dry film resists having high chemical resistance. In a second embodiment, the process for planarizing a cavity includes the filling of cavity using materials such as polymers, spin on glasses, and metallurgy.

    Abstract translation: 通过首先平面化半导体衬底中的空腔以便创建用于后续光刻处理的平坦表面来克服极端形貌的过程。 作为极端形貌的平面化处理的结果，可以进行随后的光刻处理，包括紧邻极端地形表面（例如，深空腔或通道）的特征沉积，并且包括在空腔内沉积特征。 在第一实施例中，用于平面化半导体衬底中的腔的方法包括施加具有高耐化学性的干膜抗蚀剂。 在第二实施例中，用于平坦化空腔的方法包括使用诸如聚合物，玻璃旋转和冶金的材料来填充空腔。

    Methods for planarization and encapsulation of micromechanical devices in semiconductor processes
    3.
    发明授权
    Methods for planarization and encapsulation of micromechanical devices in semiconductor processes 失效
    半导体工艺中微机械器件的平面化和封装的方法

    公开(公告)号：US5504026A

    公开(公告)日：1996-04-02

    申请号：US422036

    申请日：1995-04-14

    Applicant: Joseph T. Kung

    Inventor： Joseph T. Kung

    IPC: B81B3/00 ,  B81B7/00 ,  B81C1/00 ,  B81C99/00 ,  G01P1/02 ,  G01P15/08 ,  H01L21/784

    CPC classification number: G01P15/0802 ,  B81C1/00611 ,  G01P1/023 ,  B81C2201/0119 ,  G01P2015/0828

    Abstract: A method for fabricating a micromechanical device and a semiconductor circuit on a substrate includes the steps of forming the micromechanical device on a device area of the substrate, the micromechanical device being embedded in a sacrificial material, selectively depositing a planarization layer on the substrate in a circuit area thereof, forming the semiconductor circuit on the planarization layer in the circuit area and removing the sacrificial material from the embedded micromechanical device. In a preferred embodiment, the planarization layer is an epitaxial silicon layer. A protective cap may be formed over the micromechanical device, so that it is completely encapsulated and is thereby protected against particulate contamination.

    Abstract translation: 在衬底上制造微机械器件和半导体电路的方法包括以下步骤：在衬底的器件区域上形成微机械器件，微机械器件嵌入牺牲材料中，在衬底上选择性地沉积平坦化层 在电路区域的平坦化层上形成半导体电路，并从嵌入式微机械器件中除去牺牲材料。 在优选实施例中，平坦化层是外延硅层。 可以在微机械装置上形成保护帽，使得其完全被包封并由此被保护免受颗粒污染。

    Processing for overcoming extreme topography
    6.
    发明授权
    Processing for overcoming extreme topography 有权
    克服极端地形的处理

    公开(公告)号：US07915064B2

    公开(公告)日：2011-03-29

    申请号：US12538515

    申请日：2009-08-10

    Applicant: Guy A. Cohen ,  Steven A. Cordes ,  Sherif A. Goma ,  Joanna Rosner ,  Jeannine M. Trewhella

    Inventor： Guy A. Cohen ,  Steven A. Cordes ,  Sherif A. Goma ,  Joanna Rosner ,  Jeannine M. Trewhella

    IPC: H01L21/00 ,  H01L21/311

    CPC classification number: H01L21/31051 ,  B81C1/00611 ,  B81C2201/0119 ,  H01L21/0272 ,  H01L21/0337 ,  H01L21/31053 ,  H01L21/31058 ,  H01L21/3212 ,  H01L21/76838

    Abstract: A process for overcoming extreme topographies by first planarizing a cavity in a semiconductor substrate in order to create a planar surface for subsequent lithography processing. As a result of the planarizing process for extreme topographies, subsequent lithography processing is enabled including the deposition of features in close proximity to extreme topographic surfaces (e.g., deep cavities or channels) and, including the deposition of features within a cavity. In a first embodiment, the process for planarizing a cavity in a semiconductor substrate includes the application of dry film resists having high chemical resistance. In a second embodiment, the process for planarizing a cavity includes the filling of cavity using materials such as polymers, spin on glasses, and metallurgy.

    Abstract translation: 通过首先平面化半导体衬底中的空腔以便创建用于后续光刻处理的平坦表面来克服极端形貌的过程。 作为极端形貌的平面化处理的结果，可以进行随后的光刻处理，包括紧邻极端地形表面（例如，深空腔或通道）的特征沉积，并且包括在空腔内沉积特征。 在第一实施例中，用于平面化半导体衬底中的腔的方法包括施加具有高耐化学性的干膜抗蚀剂。 在第二实施例中，用于平坦化空腔的方法包括使用诸如聚合物，玻璃旋转和冶金的材料来填充空腔。

    Contact planarization materials that generate no volatile byproducts or residue during curing
    7.
    发明授权
    Contact planarization materials that generate no volatile byproducts or residue during curing 有权
    接触在固化期间不产生挥发性副产物或残留物的平面化材料

    公开(公告)号：US06716767B2

    公开(公告)日：2004-04-06

    申请号：US10282542

    申请日：2002-10-28

    Applicant: Wu-Sheng Shih ,  James E. Lamb, III ,  Mark Daffron

    Inventor： Wu-Sheng Shih ,  James E. Lamb, III ,  Mark Daffron

    IPC: H01L2131

    CPC classification number: B81C1/0046 ,  B81C1/00611 ,  B81C2201/0119 ,  C08G59/68 ,  C08L63/00 ,  H01L21/02118 ,  H01L21/02282 ,  H01L21/02348 ,  H01L21/31051 ,  H01L21/312

    Abstract: The present invention is directed towards planarization materials that produce little or no volatile byproducts during the hardening process when used in contact planarization processes. The materials can be hardened by photo-irradiation or by heat during the planarization process, and they include one or more types of monomers, oligomers, or mixtures thereof, an optional cross-linker, and an optional organic reactive solvents. The solvent, if used, is chemically reacted with the monomers or oligomers and thus becomes part of the polymer matrix during the curing process. These materials can be used for damascene, dual damascene, bi-layer, and multi-layer applications, microelectromechanical system (MEMS), packaging, optical devices, photonics, optoelectronics, microelectronics, and sensor devices fabrication.

    Abstract translation: 本发明涉及在用于接触平面化处理时在硬化过程中产生很少或不产生挥发性副产物的平面化材料。 这些材料可以在平坦化过程中通过光照射或加热来硬化，并且它们包括一种或多种类型的单体，低聚物或其混合物，任选的交联剂和任选的有机反应性溶剂。 溶剂（如果使用的话）与单体或低聚物发生化学反应，因此在固化过程中成为聚合物基质的一部分。 这些材料可用于镶嵌，双镶嵌，双层和多层应用，微机电系统（MEMS），封装，光学器件，光子学，光电子学，微电子学和传感器器件制造。

    Processing for overcoming extreme topography
    8.
    发明授权
    Processing for overcoming extreme topography 失效
    克服极端地形的处理

    公开(公告)号：US08603846B2

    公开(公告)日：2013-12-10

    申请号：US13024711

    申请日：2011-02-10

    Applicant: Guy A. Cohen ,  Steven A. Cordes ,  Sherif A. Goma ,  Joanna Rosner ,  Jeannine M. Trewhella

    Inventor： Guy A. Cohen ,  Steven A. Cordes ,  Sherif A. Goma ,  Joanna Rosner ,  Jeannine M. Trewhella

    IPC: H01L21/00

    CPC classification number: H01L21/31051 ,  B81C1/00611 ,  B81C2201/0119 ,  H01L21/0272 ,  H01L21/0337 ,  H01L21/31053 ,  H01L21/31058 ,  H01L21/3212 ,  H01L21/76838

    Abstract: A process for overcoming extreme topographies by first planarizing a cavity in a semiconductor substrate in order to create a planar surface for subsequent lithography processing. As a result of the planarizing process for extreme topographies, subsequent lithography processing is enabled including the deposition of features in close proximity to extreme topographic surfaces (e.g., deep cavities or channels) and, including the deposition of features within a cavity. In a first embodiment, the process for planarizing a cavity in a semiconductor substrate includes the application of dry film resists having high chemical resistance. In a second embodiment, the process for planarizing a cavity includes the filling of cavity using materials such as polymers, spin on glasses, and metallurgy.

    Abstract translation: 通过首先平面化半导体衬底中的空腔以便创建用于后续光刻处理的平坦表面来克服极端形貌的过程。 作为极端形貌的平面化处理的结果，可以进行随后的光刻处理，包括紧邻极端地形表面（例如，深空腔或通道）的特征沉积，并且包括在空腔内沉积特征。 在第一实施例中，用于平面化半导体衬底中的腔的方法包括施加具有高耐化学性的干膜抗蚀剂。 在第二实施例中，用于平坦化空腔的方法包括使用诸如聚合物，玻璃旋转和冶金的材料来填充空腔。

    Manufacturing methods of MEMS device
    9.
    发明授权
    Manufacturing methods of MEMS device 失效
    MEMS器件的制造方法

    公开(公告)号：US06946315B2

    公开(公告)日：2005-09-20

    申请号：US10961162

    申请日：2004-10-12

    Applicant: Koichi Ikeda ,  Takashi Kinoshita

    Inventor： Koichi Ikeda ,  Takashi Kinoshita

    IPC: B81C1/00 ,  B81B3/00 ,  H01L21/00

    CPC classification number: B81C1/00611 ,  B81B2201/042 ,  B81B2203/0118 ,  B81C2201/0109 ,  B81C2201/0119 ,  B81C2201/0125

    Abstract: The present invention is directed to manufacturing methods of electrostatic type MEMS devices. The manufacturing method of the present invention includes the steps of forming a substrate side electrode on a substrate, forming a fluid film before or after forming a sacrificial layer, further forming a beam having a driving side electrode on a planarized surface of the fluid film, and finally, removing the sacrificial layer. Furthermore, performing the foregoing method planarizes the surface of a driving side electrode, reduces fluctuations in the shape of a beam, and improves the performance and the uniformity of the MEMS device.

    Abstract translation: 本发明涉及静电型MEMS器件的制造方法。 本发明的制造方法包括在基板上形成基板侧电极，在形成牺牲层之前或之后形成流体膜的步骤，在流体膜的平坦化表面上进一步形成具有驱动侧电极的光束， 最后，去除牺牲层。 此外，执行上述方法使驱动侧电极的表面平坦化，减小了波束形状的波动，提高了MEMS器件的性能和均匀性。

    MEMS element manufacturing method
    10.
    发明授权
    MEMS element manufacturing method 失效
    MEMS元件制造方法

    公开(公告)号：US06838304B2

    公开(公告)日：2005-01-04

    申请号：US10468757

    申请日：2002-12-16

    Applicant: Koichi Ikeda ,  Takashi Kinoshita

    Inventor： Koichi Ikeda ,  Takashi Kinoshita

    IPC: B81C1/00 ,  B81B3/00 ,  H01L21/00

    CPC classification number: B81C1/00611 ,  B81B2201/042 ,  B81B2203/0118 ,  B81C2201/0109 ,  B81C2201/0119 ,  B81C2201/0125

    Abstract: The present invention is directed to manufacturing methods of electrostatic type MEMS devices. The manufacturing method of the present invention includes the steps of forming a substrate side electrode on a substrate, forming a fluid film before or after forming a sacrificial layer, further forming a beam having a driving side electrode on a planarized surface of the fluid film, and finally, removing the sacrificial layer. Furthermore, performing the foregoing method planarizes the surface of a driving side electrode, reduces fluctuations in the shape of a beam, and improves the performance and the uniformity of the MEMS device.

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