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100 条记录 (耗时 0.028 秒)

    Method for eliminating residual oxygen contaminations from crucible-drawn silicon wafers
    91.
    发明授权
    Method for eliminating residual oxygen contaminations from crucible-drawn silicon wafers 失效
    从坩埚拉制的硅片上消除残余氧污染的方法

    公开(公告)号：US06063684A

    公开(公告)日：2000-05-16

    申请号：US146967

    申请日：1998-09-04

    申请人： Helmut Strack

    发明人： Helmut Strack

    IPC分类号： C30B33/00 ,  H01L21/322 ,  H01C21/76

    CPC分类号： C30B29/06 ,  C30B33/00 ,  H01L21/3225

    摘要： In a method for eliminating residual oxygen contaminations from crucible-drawn silicon wafers, a number of trenches are etched into the front side of a crucible-drawn silicon wafer and that the silicon wafer is subsequently tempered at approximately 1100.degree. C. As a result of the extremely large surface area in the front side of the silicon wafer, oxygen contaminants can effectively diffuse out. After the oxygen drive-out has ensued, the trenches are filled bubble-free with epitaxially deposited silicon and the active structures are processed into the front side.

    摘要翻译： 在从坩埚拉制的硅晶片中消除残余氧污染的方法中，将许多沟槽蚀刻到坩埚拉制的硅晶片的前侧，并且随后在大约1100℃下回火硅晶片。结果是 硅晶片正面的极大表面积，氧气污染物可以有效地扩散出去。 在发生氧气驱出之后，通过外延沉积的硅将沟槽充满无气泡，并将活性结构加工成正面。

    Manufacturing method for a low voltage power MISFET utilizing only three masks
    93.
    发明授权
    Manufacturing method for a low voltage power MISFET utilizing only three masks 失效
    仅使用三个掩模的低电压功率MISFET的制造方法

    公开(公告)号：US5302537A

    公开(公告)日：1994-04-12

    申请号：US976189

    申请日：1992-11-13

    申请人： Helmut Strack

    发明人： Helmut Strack

    IPC分类号： H01L29/78 ,  H01L21/336 ,  H01L29/06 ,  H01L29/40 ,  H01L21/265

    CPC分类号： H01L29/405 ,  H01L23/3171 ,  H01L29/66727 ,  H01L29/7811 ,  H01L29/0638 ,  H01L29/402 ,  H01L29/42376 ,  H01L2924/0002 ,  Y10S148/126 ,  Y10S438/958

    摘要： A manufacturing method for a low-voltage power MISFET which utilizes only three masks (photosteps). In the first step, a polysilicon layer (3) is structured and a cell field and edge zones are produced. An oxide layer (2) is then applied, this being opened in the second photostep above the cells and the edge zones and between the edge (4) and the cells. A metal layer is then applied, this being interrupted between the cells and the edge (4) with the third photostep. Field plates and a channel stopper (9) are thus produced. As last step, a weakly conductive layer (20) is applied onto the entire surface.

    摘要翻译： 一种低电压功率MISFET的制造方法，仅使用三个掩模（光步）。 在第一步骤中，构造多晶硅层（3）并产生单元区域和边缘区域。 然后施加氧化物层（2），其在细胞和边缘区域之上以及边缘（4）和细胞之间的第二光步中打开。 然后施加金属层，这在金属层和边缘（4）之间被第三次照相中断。 因此制造了场板和通道挡块（9）。 作为最后一步，将弱导电层（20）施加到整个表面上。

    Thyristor having a plurality of emitter shorts in defined spacial relationship
    94.
    发明授权
    Thyristor having a plurality of emitter shorts in defined spacial relationship 失效
    晶闸管具有多个限定空间关系的发射极短路

    公开(公告)号：US4079406A

    公开(公告)日：1978-03-14

    申请号：US749171

    申请日：1976-12-09

    申请人： Joachim Burtscher ,  Helmut Strack

    发明人： Joachim Burtscher ,  Helmut Strack

    IPC分类号： H01L29/08 ,  H01L29/74

    CPC分类号： H01L29/0839

    摘要： A thyristor device is provided with a shorted emitter structure in which the shorts are circularly formed zones of the base zone which extend through the emitter zone into electrical contact with the emitter electrode. Each of these zones is circular in cross-section and of a diameter which is less than 20.mu.m. These zones have a spacing from each other from center to center which is such that the ratio of this spacing to the diameter of a circular area is greater than 3.

    摘要翻译： 晶闸管器件具有短路发射极结构，其中短路是穿过发射极区延伸穿过发射极电极的基极区的圆形区域。 这些区域中的每个区域的横截面为圆形，直径小于20μm。 这些区域具有从中心到中心彼此间隔的距离，使得该间隔与圆形区域的直径之比大于3。

    Method for eliminating residual oxygen impurities from silicon wafers pulled from a crucible
    98.
    发明授权
    Method for eliminating residual oxygen impurities from silicon wafers pulled from a crucible 有权
    消除从坩埚中拉出的硅晶片残余氧杂质的方法

    公开(公告)号：US06309974B1

    公开(公告)日：2001-10-30

    申请号：US09156732

    申请日：1998-09-17

    申请人： Helmut Strack ,  Jens-Peer Stengl

    发明人： Helmut Strack ,  Jens-Peer Stengl

    IPC分类号： H01L21311

    CPC分类号： C30B29/06 ,  C30B33/00 ,  H01L21/3221 ,  H01L21/3225

    摘要： Residual oxygen impurities are eliminated from silicon wafers pulled from a crucible (Czochralski silicon). A multitude of trenches are etched into the back side of the crucible-pulled silicon wafer and the wafer is subsequently heat-treated at about 1100° C. The very large surface area at the front side of the silicon wafer allows oxygen impurities to diffuse out effectively. After the diffusion has been carried out, the trenches are filled with heavily doped polysilicon without leaving gaps.

    摘要翻译： 残留的氧杂质从从坩埚（Czochralski硅）中拉出的硅晶片中消除。 大量的沟槽被蚀刻到坩埚拉硅晶片的背面，然后在约1100℃下对晶片进行热处理。硅晶片正面的非常大的表面积允许氧杂质扩散出 有效。 在扩散实施之后，沟槽被重掺杂的多晶硅填充而不留下间隙。

    Method for fabricating a field effect-controlled semiconductor component
    99.
    发明授权
    Method for fabricating a field effect-controlled semiconductor component 失效
    用于制造场效应控制半导体部件的方法

    公开(公告)号：US06248620B1

    公开(公告)日：2001-06-19

    申请号：US09491095

    申请日：2000-01-24

    申请人： Helmut Strack ,  Helmut Gassel ,  Joost Larik

    发明人： Helmut Strack ,  Helmut Gassel ,  Joost Larik

    IPC分类号： H01L218238

    CPC分类号： H01L29/7802 ,  H01L29/1095 ,  H01L29/41766 ,  H01L29/42376

    摘要： A method for fabricating field effect-controlled semiconductor components, such as e.g. but not exclusively MIS power transistors. The field effect-controllable semiconductor component has a semiconductor substrate of a first conductivity type and a gate insulator layer on the surface of the semiconductor substrate. A well of a second conductivity type is produced in the semiconductor substrate by implanting first impurity atoms. A semiconductor layer having a first predetermined thickness is produced on the gate insulator layer prior to the production of the well. The semiconductor layer is reduced in a predtdermined region to obtain a residual layer having a second predetermined thickness, such that the semiconductor layer acts as an implantation barrier outside the predetermined region when the well is produced.

    摘要翻译： 一种用于制造场效应控制半导体部件的方法，例如， 但不是唯一的MIS功率晶体管。 场效应可控半导体元件在半导体衬底的表面上具有第一导电类型的半导体衬底和栅极绝缘体层。 通过注入第一杂质原子在半导体衬底中产生第二导电类型的阱。 在生产井之前，在栅极绝缘体层上产生具有第一预定厚度的半导体层。 半导体层在预制区域中被还原以获得具有第二预定厚度的残余层，使得当制造阱时，半导体层用作预定区域外的注入势垒。

    Thyristor having controllable emitter-base shorts
    100.
    发明授权
    Thyristor having controllable emitter-base shorts 失效
    晶闸管具有可控制的发射极 - 基极短路

    公开(公告)号：US4760432A

    公开(公告)日：1988-07-26

    申请号：US923867

    申请日：1986-10-28

    申请人： Michael Stoisiek ,  Horst Schmid ,  Helmut Strack

    发明人： Michael Stoisiek ,  Horst Schmid ,  Helmut Strack

    IPC分类号： H01L29/74 ,  H01L29/745 ,  H01L29/749

    CPC分类号： H01L29/7408 ,  H01L29/7455

    摘要： A thyristor having a pnpn semiconductor body comprising MISFET structures 9 and 12 through 16 which serve as controllable emitter base shorts formed at the edge side relative to one of the emitter layers and each of the structures is composed of a semiconductor region 9 inserted into the emitter layer which is contacted by an electrode 6 for the emitter layer 1 and also includes a subregion 12 of the adjacent base layer 2 and of an intervening channel region 13 which is formed of an edge zone of the emitter layer 1 and is also composed of a gate covering the channel region in an insulated manner. The gate also convers the subregion 12 of the base layer 2 and forms a MIS capacitor C1. A voltage generator 23 drives the gate 15 with a voltage which alternates between first and second values. At the change from the first voltage value which lies below the threshold value of the channel region 13 to the second voltage level which is close to the threshold voltage of the subregion 12 of the base layer, the thyristor ignites due to the shift in current of the MIS capacitor C1 which serves as the ignition current and, thus, when the change from the second to the first voltage occurs, the thyristor is quenched.

    摘要翻译： 具有pnpn半导体本体的晶闸管包括MISFET结构9和12至16，其用作可控发射极基极短路，其形成在相对于一个发射极层的边缘侧，并且每个结构由插入发射极的半导体区域9 层，其由发射极层1的电极6接触，并且还包括相邻基极层2的子区域12和由发射极层1的边缘区域形成的中间沟道区域13，并且还由 栅极以绝缘方式覆盖沟道区域。 门也对基层2的子区域12进行通信，形成MIS电容器C1。 电压发生器23以在第一和第二值之间交替的电压驱动门15。 在从低于通道区域13的阈值的第一电压值变化到接近于基极层子区域12的阈值电压的第二电压电平的情况下，晶闸管由于电流的偏移而点燃 用作点火电流的MIS电容器C1，因此当从第二电压到第一电压的变化发生时，晶闸管被淬火。