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    Circuit Structure with Low Dielectric Constant Regions and Method of Forming Same
    94.
    发明申请
    Circuit Structure with Low Dielectric Constant Regions and Method of Forming Same 有权
    具有低介电常数区域的电路结构及其形成方法

    公开(公告)号：US20080171432A1

    公开(公告)日：2008-07-17

    申请号：US11623478

    申请日：2007-01-16

    申请人： Lawrence A. Clevenger ,  Matthew E. Colburn ,  Louis C. Hsu ,  Wai-Kin Li

    发明人： Lawrence A. Clevenger ,  Matthew E. Colburn ,  Louis C. Hsu ,  Wai-Kin Li

    IPC分类号： H01L21/4763

    CPC分类号： H01L21/76808 ,  H01L21/7682

    摘要： A method for manufacturing a circuit includes the step of providing a first wiring level comprising first wiring level conductors separated by a first wiring level dielectric material. A first dielectric layer with a plurality of inter connect openings and a plurality of gap openings is formed above the first wiring level. The interconnect openings and the gap openings are pinched off with a pinching dielectric material to form relatively low dielectric constant (low-k) volumes in the gap openings. Metallic conductors comprising second wiring level conductors and interconnects to the first wiring level conductors are formed at the interconnect openings while maintaining the relatively low-k volumes in the gap openings. The gap openings with the relatively low-k volumes reduce parasitic capacitance between adjacent conductor structures formed by the conductors and interconnects.

    摘要翻译： 一种制造电路的方法包括提供包括由第一布线层介电材料分隔开的第一布线层导体的第一布线层的步骤。 具有多个互连开口和多个间隙开口的第一电介质层形成在第一布线层的上方。 互连开口和间隙开口用夹持电介质材料夹紧，以在间隙开口中形成相对较低的介电常数（低k）体积。 包括第二布线层导体的金属导体和与第一布线层导体的互连形成在互连开口处，同时保持间隙开口中相对低的k体积。 具有相对低k体积的间隙开口减小由导体和互连件形成的相邻导体结构之间的寄生电容。

    Semiconductor device including dual damascene interconnections
    95.
    发明授权
    Semiconductor device including dual damascene interconnections 有权
    半导体器件包括双镶嵌互连

    公开(公告)号：US07187085B2

    公开(公告)日：2007-03-06

    申请号：US10853492

    申请日：2004-05-26

    申请人： Lawrence A. Clevenger ,  Larry A. Nesbit

    发明人： Lawrence A. Clevenger ,  Larry A. Nesbit

    IPC分类号： H01L23/48

    CPC分类号： H01L21/76843 ,  H01L21/76877 ,  H01L23/53228 ,  H01L2924/0002 ,  H01L2924/00

    摘要： A method (and structure) of forming an interconnect on a semiconductor substrate, includes forming a relatively narrow first structure in a dielectric formed on a semiconductor substrate, forming a relatively wider second structure in the dielectric formed on the semiconductor substrate, forming a liner in the first and second structures such that the first structure is substantially filled and the second structure is substantially unfilled, and forming a metallization over the liner to completely fill the second structure.

    摘要翻译： 在半导体衬底上形成互连的方法（和结构）包括在形成在半导体衬底上的电介质中形成相对窄的第一结构，在形成在半导体衬底上的电介质中形成相对较宽的第二结构， 所述第一和第二结构使得所述第一结构基本上被填充并且所述第二结构基本上未被填充，并且在所述衬套上形成金属化以完全填充所述第二结构。

    Method of forming a film for a multilayer Semiconductor device for improving thermal stability of cobalt silicide using platinum or nitrogen
    100.
    发明授权
    Method of forming a film for a multilayer Semiconductor device for improving thermal stability of cobalt silicide using platinum or nitrogen 失效
    用于提高使用铂或氮的硅化钴的热稳定性的多层半导体器件的膜的形成方法

    公开(公告)号：US5624869A

    公开(公告)日：1997-04-29

    申请号：US226923

    申请日：1994-04-13

    申请人： Paul D. Agnello ,  Cyril Cabral, Jr. ,  Lawrence A. Clevenger ,  Matthew W. Copel ,  Francois M. d'Heurle ,  Qi-Zhong Hong

    发明人： Paul D. Agnello ,  Cyril Cabral, Jr. ,  Lawrence A. Clevenger ,  Matthew W. Copel ,  Francois M. d'Heurle ,  Qi-Zhong Hong

    IPC分类号： H01L21/28 ,  H01L21/265 ,  H01L21/285 ,  H01L21/336 ,  H01L29/78

    CPC分类号： H01L21/28518 ,  Y10S438/934

    摘要： A method and a device directed to the same, for stabilizing cobalt di-silicide/single crystal silicon, amorphous silicon, polycrystalline silicon, germanide/crystalline germanium, polycrystalline germanium structures or other semiconductor material structures so that high temperature processing steps (above 750.degree. C.) do not degrade the structural quality of the cobalt di-silicide/silicon structure. The steps of the method include forming a di-silicide or germanide by either reacting cobalt with the substrate material and/or the codeposition of the di-silicide or germanide on a substrate, adding a selective element, either platinum or nitrogen, into the cobalt and forming the di-silicide or germanide by a standard annealing treatment. Alternatively, the cobalt di-silicide or cobalt germanide can be formed after the formation of the di-silicide or germanide respectively. As a result, the upper limit of the annealing temperature at which the di-silicide or germanide will structurally degrade is increased.

    摘要翻译： 涉及其的方法和装置，用于稳定二硅化硅/单晶硅，非晶硅，多晶硅，锗化锗/结晶锗，多晶锗结构或其他半导体材料结构，使得高温处理步骤（高于750° C.）不会降低二硅化钴/硅结构的结构质量。 该方法的步骤包括通过使钴与基底材料反应和/或二硅化物或锗化物在基底上共沉积形成二硅化物或锗化物，向铂中添加铂或氮的选择性元素 并通过标准退火处理形成二硅化物或锗化物。 另外也可以分别在二硅化物或锗化物形成之后形成二硅化钴或锗化钴。 结果，二硅化物或锗化锗在结构上降解的退火温度的上限增加。