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137 条记录 (耗时 0.046 秒)

    METHOD OF MANUFACTURING SELF-ORDERED NANOCHANNEL-ARRAY AND METHOD OF MANUFACTURING NANODOT USING THE NANOCHANNEL-ARRAY
    94.
    发明申请
    METHOD OF MANUFACTURING SELF-ORDERED NANOCHANNEL-ARRAY AND METHOD OF MANUFACTURING NANODOT USING THE NANOCHANNEL-ARRAY 有权
    自制纳米管阵列的制造方法及使用纳米通道阵列制造纳米光的方法

    公开(公告)号：US20070207619A1

    公开(公告)日：2007-09-06

    申请号：US10819143

    申请日：2004-04-07

    申请人： In-kyeong Yoo ,  Soo-hwan Jeong ,  Sun-ae Seo ,  In-sook Kim

    发明人： In-kyeong Yoo ,  Soo-hwan Jeong ,  Sun-ae Seo ,  In-sook Kim

    IPC分类号： H01L21/302 ,  H01L21/461

    CPC分类号： B82B3/00 ,  B29C59/022 ,  B29C59/026 ,  B29C2059/023 ,  B82Y10/00 ,  B82Y30/00 ,  B82Y40/00 ,  H01L21/32139

    摘要： A method of manufacturing a nanochannel-array and a method of fabricating a nanodot using the nanochannel-array are provided. The nanochannel-array manufacturing method includes: performing first anodizing to form a first alumina layer having a channel array formed by a plurality of cavities on an aluminum substrate; etching the first alumina layer to a predetermined depth and forming a plurality of concave portions on the aluminum substrate, wherein each concave portion corresponds to the bottom of each channel of the first alumina layer; and performing second anodizing to form a second alumina layer having an array of a plurality of channels corresponding to the plurality of concave portions on the aluminum substrate. The array manufacturing method makes it possible to obtain finely ordered cavities and form nanoscale dots using the cavities.

    摘要翻译： 提供一种制造纳米通道阵列的方法和使用纳米通道阵列制造纳米点的方法。 纳米通道阵列制造方法包括：执行第一阳极氧化以形成具有由铝基板上的多个空腔形成的沟道阵列的第一氧化铝层; 将第一氧化铝层蚀刻到预定深度并在铝基板上形成多个凹部，其中每个凹部对应于第一氧化铝层的每个通道的底部; 以及进行第二阳极氧化以形成具有与所述铝基板上的所述多个凹部对应的多个通道的阵列的第二氧化铝层。 阵列制造方法使得可以使用空腔获得精细排列的空腔并形成纳米级点。

    Multi-bit non-volatile memory device, method of operating the same, and method of manufacturing the multi-bit non-volatile memory device
    97.
    发明申请
    Multi-bit non-volatile memory device, method of operating the same, and method of manufacturing the multi-bit non-volatile memory device 失效
    多位非易失性存储器件，其操作方法以及制造多位非易失性存储器件的方法

    公开(公告)号：US20060097308A1

    公开(公告)日：2006-05-11

    申请号：US11181724

    申请日：2005-07-15

    申请人： Yoon-dong Park ,  Sun-ae Seo ,  Choong-rae Cho ,  Won-joo Kim ,  Sang-min Shin

    发明人： Yoon-dong Park ,  Sun-ae Seo ,  Choong-rae Cho ,  Won-joo Kim ,  Sang-min Shin

    IPC分类号： H01L29/788 ,  H01L21/336

    CPC分类号： H01L29/7926 ,  H01L29/42332 ,  H01L29/7887 ,  H01L29/7923

    摘要： Disclosed are a muli-bit non-volatile memory device, a method of operating the same, and a method of manufacturing the multi-bit non-volatile memory device. A unit cell of the muli-bit non-volatile memory device may be formed on a semiconductor substrate may include: a plurality of channels disposed perpendicularly to the upper surface of the semiconductor substrate; a plurality of storage nodes disposed on opposite sides of the channels perpendicularly the upper surface of the semiconductor substrate; a control gate surrounding upper portions of the channels and the storage nodes, and side surfaces of the storage nodes; and an insulating film formed between the channels and the storage nodes, between the channels and the control gate, and between the storage nodes and the control gate.

    摘要翻译： 公开了多位非易失性存储器件，其操作方法以及制造多位非易失性存储器件的方法。 多晶硅非易失性存储器件的单元可以形成在半导体衬底上，可以包括：垂直于半导体衬底的上表面设置的多个沟道; 多个存储节点，其设置在所述通道的相对侧，垂直于所述半导体衬底的上表面; 围绕通道和存储节点的上部以及存储节点的侧表面的控制门; 以及形成在通道和存储节点之间，通道和控制栅极之间以及存储节点和控制门之间的绝缘膜。

    Memory device having a transistor and one resistant element as a storing means and method for driving the memory device
    100.
    发明申请
    Memory device having a transistor and one resistant element as a storing means and method for driving the memory device 有权
    具有晶体管和一个电阻元件作为存储装置的存储装置和用于驱动存储装置的方法

    公开(公告)号：US20050095775A1

    公开(公告)日：2005-05-05

    申请号：US10995116

    申请日：2004-11-24

    申请人： In-Kyeong Yoo ,  Sun-ae Seo ,  Hyun-jo Kim

    发明人： In-Kyeong Yoo ,  Sun-ae Seo ,  Hyun-jo Kim

    IPC分类号： H01L27/10 ,  G11C11/401 ,  G11C11/404 ,  G11C16/04 ,  H01L21/00 ,  H01L21/822 ,  H01L21/8246 ,  H01L27/112 ,  H01L29/792 ,  H01L31/0328 ,  H01L31/0336 ,  H01L31/072 ,  H01L31/109 ,  H01L49/02

    CPC分类号： H01L27/11206 ,  G11C16/0475 ,  H01L27/112

    摘要： A memory device having one transistor and one resistant element as a storing means and a method for driving the memory device, includes an NPN-type transistor formed on a semiconductor substrate, an interlayer insulating film formed on the semiconductor substrate to cover the transistor in which a contact hole exposing a source region of the transistor is formed, a resistant material in which a bit data “0” or “1” is written connected to the source region of the transistor by a conductive plug or an insulating film, and a conductive plate contacting the resistant material. The memory device exhibits improved degree of integration, reduced current consumption by lengthening a refresh period thereof, and enjoys simplified manufacturing process due to a simple memory cell structure.

    摘要翻译： 具有一个晶体管和一个电阻元件作为存储装置的存储器件和用于驱动存储器件的方法包括形成在半导体衬底上的NPN型晶体管，形成在半导体衬底上以覆盖晶体管的层间绝缘膜， 形成暴露晶体管的源极区域的接触孔，通过导电插塞或绝缘膜将位数据“0”或“1”写入的电阻材料连接到晶体管的源极区域，并且导电 板接触抵抗材料。 存储器件通过延长其刷新周期而呈现出提高的集成度，降低的电流消耗，并且由于简单的存储单元结构而享有简化的制造工艺。