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公开(公告)号：US12125787B2
公开(公告)日：2024-10-22
申请号：US17037569
申请日：2020-09-29
发明人： Jae-Boong Lee , Jung-Ho Do , Tae-Joong Song , Seung-Young Lee , Jong-Hoon Jung , Ji-Su Yu
IPC分类号： H01L23/528 , G06F30/327 , G06F30/392 , G06F30/394 , H01L21/8234 , H01L23/522 , H01L27/02 , H01L27/088 , H01L27/092 , H01L27/118 , G06F115/02
CPC分类号： H01L23/5286 , G06F30/327 , G06F30/392 , G06F30/394 , H01L21/823475 , H01L23/5226 , H01L23/5283 , H01L27/0207 , H01L27/11807 , G06F2115/02 , H01L27/088 , H01L27/092 , H01L2027/11881
摘要： An integrated circuit including: a power rail including first and second conductive lines spaced apart from each other in a vertical direction, wherein the first and second conductive lines extend in parallel to each other in a first horizontal direction, and are electrically connected to each other, to supply power to a first standard cell, wherein the first and second conductive lines are disposed at a boundary of the first standard cell; and a third conductive line between the first and second conductive lines and extending in a second horizontal direction orthogonal to the first horizontal direction, to transfer an input signal or an output signal of the first standard cell.
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92.发明授权公开(公告)号：US12125785B2
公开(公告)日：2024-10-22
申请号：US17530206
申请日：2021-11-18
发明人： Junghoo Shin , Jongmin Baek , Sanghoon Ahn , Woojin Lee , Junhyuk Lim
IPC分类号： H01L23/528 , H01L21/768 , H01L23/522 , H01L23/532
CPC分类号： H01L23/5283 , H01L21/76885 , H01L21/76897 , H01L23/5226 , H01L23/53295 , H01L21/76831 , H01L21/76843 , H01L23/53214 , H01L23/53238 , H01L23/53257
摘要： A semiconductor integrated circuit device includes a substrate; a transistor on the substrate; an interlayer insulating film on the transistor; an insulating liner on the interlayer insulating film; a first insulating film on the insulating liner; and a first wiring layer on the interlayer insulating film and surrounded by the insulating liner. A height of a top surface of the first insulating film in a vertical direction from a main surface of the interlayer insulating film is different than a height of a top surface of the first wiring layer in the vertical direction. A step exists between the top surfaces of the first wiring layer and the first insulating film. A height of the first insulating film is greater than a height of the first wiring layer. A width of the first wiring layer gradually narrows as the first wiring layer extends upwards along the vertical direction.
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公开(公告)号：US12125553B2
公开(公告)日：2024-10-22
申请号：US17968052
申请日：2022-10-18
发明人： Donghun Lee , Kiho Kim , Kihan Kim
IPC分类号： G11C7/10
CPC分类号： G11C7/1048 , G11C7/1084 , G11C2207/2254
摘要： Disclosed are a memory device that performs offset calibration and a method of operating the memory device. The memory device includes an input/output pad configured to receive data from a device external, an on-die termination (ODT) circuit connected to the input/output pad, a plurality of receivers connected to the ODT circuit and configured to receive the data from the input/output pad, an offset calibration circuit configured to perform an offset calibration operation on data output from the plurality of receivers and output an offset correction, a first switch configured to provide a first voltage to the plurality of receivers, and a second switch configured to provide a second voltage to the plurality of receivers. During the offset calibration operation, the plurality of receivers receive a third voltage in response to the ODT circuit being enabled and the first voltage through the first switch.
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公开(公告)号：US12125538B2
公开(公告)日：2024-10-22
申请号：US17834024
申请日：2022-06-07
发明人： Won-bo Shim , Ji-ho Cho , Yong-seok Kim , Byoung-taek Kim , Sun-gyung Hwang
IPC分类号： G11C16/10 , G11C11/56 , G11C16/04 , G11C16/08 , G11C16/34 , H01L29/788 , G06F3/06 , H10B41/35 , H10B43/27 , H10B43/35
CPC分类号： G11C16/10 , G11C11/5628 , G11C16/0483 , G11C16/08 , G11C16/3427 , G11C16/3459 , H01L29/7885 , G06F3/0679 , H10B41/35 , H10B43/27 , H10B43/35
摘要： A program method of a nonvolatile memory device that performs a plurality of program loops is provided. At least one of the plurality of program loops includes dividing a channel of a selected cell string into a first side channel and a second side channel during a first interval and a second interval, turning off a string selection transistor of the selected cell string by applying a string select line voltage of a first level during the first interval, and boosting a first voltage of the first side channel and a second voltage of the second side channel, and turning on the string selection transistor by applying the string select line voltage of a second level different from the first level during the second interval, and performing a hot carrier injection (HCI) program operation on a selected memory cell corresponding to the first side channel or the second side channel.
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公开(公告)号：US12125249B2
公开(公告)日：2024-10-22
申请号：US17532859
申请日：2021-11-22
CPC分类号： G06T9/001 , G06T17/205
摘要： An encoding device, a decoding device, and a method for mesh decoding are disclosed. The method for mesh decoding includes receiving a bitstream. The method also includes decoding a frame that includes pixels from the bitstream. A portion of the pixels of the frame represent geometric locations of vertices of a 3D mesh that are organized into overlapped patches. The method further includes decoding connectivity information from the bitstream. Additionally, the method includes identifying triangles associated with the overlapped patches. The triangles represented in an overlapped patch of the overlapped patches are allocated to a projection direction based on a normal vector associated with each of the triangles of the overlapped patch. The method also includes reconstructing the 3D mesh based on the connectivity information and the overlapped patches.
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96.发明授权公开(公告)号：US12125019B2
公开(公告)日：2024-10-22
申请号：US17671050
申请日：2022-02-14
发明人： Yongwan Lee , Inho Kim , Yongseok Park , Seongmin Je
CPC分类号： G06Q20/3224 , G06Q20/3267 , G06Q20/40
摘要： An electronic device is provided. The electronic device includes a communication module, at least one processor, and a memory configured to be operatively coupled to the at least one processor, wherein the memory stores instructions configured to, when executed, cause the at least one processor to identify information on a first country in which the electronic device is located through the communication module, perform payment based on a first authentication method corresponding to the identified information on the first country in response to a first payment application execution request, and change the first authentication method to a second authentication method corresponding to information on a second country in response to detection of a change from the first country to the second country through the communication module.
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公开(公告)号：US12124957B2
公开(公告)日：2024-10-22
申请号：US16524341
申请日：2019-07-29
发明人： Youngmin Oh
CPC分类号： G06N3/082
摘要： Provided are an apparatus and method of compressing an artificial neural network. According to the method and the apparatus, an optimal compression rate and an optimal operation accuracy are determined by compressing an artificial neural network, determining a task accuracy of a compressed artificial neural network, and automatically calculating a compression rate and a compression ratio based on the determined task accuracy. The method includes obtaining an initial value of a task accuracy for a task processed by the artificial neural network, compressing the artificial neural network by adjusting weights of connections among layers of the artificial neural network included in information regarding the connections, determining a compression rate for the compressed artificial neural network based on the initial value of the task accuracy and a task accuracy of the compressed artificial neural network, and re-compressing the compressed artificial neural network according to the compression rate.
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公开(公告)号：US12124710B2
公开(公告)日：2024-10-22
申请号：US18217736
申请日：2023-07-03
发明人： Hyunsook Hong , Jisoo Kim , Yongsuk Lee , Younsung Chu , Hyungsup Kim
CPC分类号： G06F3/0622 , G06F3/0637 , G06F3/0659 , G06F3/0673 , G06F21/78 , G06F7/588
摘要： A method of writing data to a protected region in response to a request from a host includes receiving a first write request including a first host message authentication code and a first random number from the host, verifying the first write request based on a write count, the first random number, and the first host message authentication code, updating the write count based on a result of verifying the first write request, generating a first device message authentication code based on the updated write count and the first random number, and providing the host with a first response including the first device message authentication code and a result of the verifying of the first write request.
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公开(公告)号：US12124702B2
公开(公告)日：2024-10-22
申请号：US17941092
申请日：2022-09-09
发明人： Hyunkook Park , Sara Choi
IPC分类号： G06F3/06
CPC分类号： G06F3/0611 , G06F3/0629 , G06F3/0679
摘要： A semiconductor memory device including: first and second memory cells storing multi-bit data; a first word line coupled to the first memory cell; and a second word line connected to the second memory cell and adjacent to the first word line; wherein a period in which a first word line voltage for reading data stored in the first memory cell is applied includes: a first period in which a first voltage level is applied to read first bit data from the multi-bit data stored in the first memory cell; a second period having a second voltage level lower than the first voltage level; and a third period in which a third voltage level higher than the second voltage level is applied to read second bit data from the multi-bit data stored in the first memory cell, wherein in the second period, the second word line is in a floating state.
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公开(公告)号：US12124664B2
公开(公告)日：2024-10-22
申请号：US18485708
申请日：2023-10-12
发明人： Jinchul Lee , Yoonkyung Choi , Bumsoo Kim , Sanho Byun
CPC分类号： G06F3/0446 , G06F3/0412
摘要： A touch sensor of multi-driving scheme includes a touch panel including input lines and output lines, the touch panel causes a change in mutual capacitance in response to touch. Processing circuitry generates transmission signals to the input lines as a result of an encoding operation on a first matrix having an inverse matrix, each of the transmission signals has a first polarity or a second polarity opposite in phase to the first polarity; outputs the transmission signals in an unbalanced period when the sum of phases of the transmission signals is greater than 0; receives receiving signals through the output lines; and decodes the receiving signals based on the first matrix, the receiving signals generated by the change in the mutual capacitance in response to the touch.
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