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127 条记录 (耗时 0.097 秒)

    Method of producing vinyl-based polymer
    102.
    发明授权
    Method of producing vinyl-based polymer 失效
    乙烯基类聚合物的制造方法

    公开(公告)号：US06677409B2

    公开(公告)日：2004-01-13

    申请号：US10122304

    申请日：2002-04-16

    申请人： Ryuichi Saito ,  Tadashi Amano

    发明人： Ryuichi Saito ,  Tadashi Amano

    IPC分类号： C08F240

    CPC分类号： C08F2/40

    摘要： A method of producing a vinyl-based polymer is provided in which the blocking of piping resulting from solidification of a reaction inhibitor does not occur even if the operation of supplying the reaction inhibitor is conducted at a low temperature. This method involves the polymerization of a vinyl monomer via a radical reaction, wherein a reaction inhibitor formed from a compound represented by a general formula (1), shown below, is added to the polymerization system in the form of an aqueous dispersion, either prior to commencement of the polymerization, during the polymerization, or following completion of the polymerization, depending on the effect desired. R represents an alkyl group of 3 to 6 carbon atoms.

    摘要翻译： 提供了一种制备乙烯基类聚合物的方法，其中即使在低温下进行反应抑制剂的操作，也不会发生阻止由反应抑制剂固化产生的管道。 该方法包括通过自由基反应聚合乙烯基单体，其中将由下述通式（1）表示的化合物形成的反应抑制剂以水分散体的形式加入到聚合体系中，先前 根据所需的效果，聚合反应开始，聚合期间或聚合结束后，R表示3〜6个碳原子的烷基。

    Production process for vinyl-based polymer
    103.
    发明授权
    Production process for vinyl-based polymer 失效
    乙烯基聚合物的生产工艺

    公开(公告)号：US06639027B2

    公开(公告)日：2003-10-28

    申请号：US10319550

    申请日：2002-12-16

    申请人： Ryuichi Saito ,  Tadashi Amano ,  Toshihiko Kawakubo

    发明人： Ryuichi Saito ,  Tadashi Amano ,  Toshihiko Kawakubo

    IPC分类号： C08F242

    CPC分类号： C08F2/40 ,  C08F14/06 ,  Y10S526/91 ,  Y10S526/911 ,  C08F2/16

    摘要： A production process for a vinyl-based polymer is provided. The production process comprises a step for polymerizing a vinyl-based monomer by a radical reaction within an aqueous medium in a polymerization vessel, and a step for supplying a reaction inhibitor with a melting point of no more than 40° C. from a reaction inhibitor supply tank to the polymerization vessel via a reaction inhibitor supply pipe. The reaction inhibitor supply tank and the reaction inhibitor supply pipe are heated, and the reaction inhibitor is added to the polymerization vessel in a liquid state with a viscosity of no more than 200 mPa·s. The reaction inhibitor can be added to the polymerization mixture without the use of an organic solvent even at low temperatures, and problems such as the solidification of the reaction inhibitor inside the supply tank or piping, and subsequent blocking of the piping do not occur.

    摘要翻译： 提供了一种乙烯基类聚合物的制造方法。 制造方法包括在聚合容器内的水性介质中通过自由基反应聚合乙烯基类单体的步骤，以及从反应抑制剂供给不超过40℃的熔点的反应抑制剂的步骤 通过反应抑制剂供应管向聚合容器供应罐。 反应抑制剂供给槽和反应抑制剂供给管被加热，反应抑制剂以粘度不超过200mPa.s的液态加入到聚合容器中。 反应抑制剂即使在低温下也可以不使用有机溶剂而添加到聚合混合物中，并且不会发生诸如供给罐或管道内的反应抑制剂的固化以及随后的管道堵塞等问题。

    Process for producing vinylidene fluoride resin
    106.
    发明授权
    Process for producing vinylidene fluoride resin 失效
    偏二氟乙烯树脂的制造方法

    公开(公告)号：US5925721A

    公开(公告)日：1999-07-20

    申请号：US25237

    申请日：1998-02-18

    申请人： Ryuichi Saito ,  Tadashi Amano

    发明人： Ryuichi Saito ,  Tadashi Amano

    IPC分类号： C08F2/44 ,  C08F2/00 ,  C08F14/22 ,  C08F214/22

    CPC分类号： C08F214/22 ,  C08F14/22

    摘要： In a process for producing a vinylidene fluoride resin by polymerizing vinylidene fluoride or a mixture of vinylidene fluoride and a vinyl monomer copolymerizable with vinylidene fluoride, a portion of an iodide compound represented by the formula: X-R.sub.f -X wherein R.sub.f is a divalent organic group containing at least two divalent fluoroalkyl ether groups: and X's are independently an iodine atom or a fluorine atom, provided that at least one of the X's is an iodine atom; is added to start the polymerization, and the remainder of the iodide compound is further added dividedly at least twice in the course of the polymerization. This process enables to obtain a vinylidene fluoride resin having a viscosity-average molecular weight of 150,000 or more and also having a superior water repellency. This resin has good mechanical strength and release properties and also can be well processed into films.

    摘要翻译： 在通过聚合偏二氟乙烯或偏二氟乙烯与可与偏二氟乙烯共聚的乙烯基单体的混合物制备偏二氟乙烯树脂的方法中，一部分由下式表示的碘化合物：X-Rf-X其中Rf是二价有机 含有至少两个二价氟烷基醚基团的基团：X独立地为碘原子或氟原子，条件是X中的至少一个为碘原子; 加入以开始聚合，剩余的碘化合物在聚合过程中进一步加入至少两次。 该方法能够得到粘均分子量为15万以上且具有优异的拒水性的偏二氟乙烯树脂。 该树脂具有良好的机械强度和剥离性能，并且可以很好地加工成膜。

    Silacyclohexane compound, a method of preparing it and a liquid crystal composition containing it
    108.
    发明授权
    Silacyclohexane compound, a method of preparing it and a liquid crystal composition containing it 失效
    硅环己烷化合物，其制备方法和含有它的液晶组合物

    公开(公告)号：US5498737A

    公开(公告)日：1996-03-12

    申请号：US377961

    申请日：1995-01-25

    申请人： Tsutomu Ogihara ,  Takaaki Shimizu ,  Takeshi Kinsho ,  Tatsushi Kaneko ,  Ryuichi Saito ,  Hideshi Kurihara

    发明人： Tsutomu Ogihara ,  Takaaki Shimizu ,  Takeshi Kinsho ,  Tatsushi Kaneko ,  Ryuichi Saito ,  Hideshi Kurihara

    IPC分类号： C07F7/08 ,  C07F7/12 ,  C09K19/40

    CPC分类号： C07F7/0818 ,  C07F7/0896 ,  C07F7/12 ,  C09K19/406

    摘要： A silacyclohexane compound represented by the following general formula (1): ##STR1## wherein R denotes a linear-chain alkyl group with a carbon number of 1-10, a mono- or di-fluoroalkyl group with a carbon number of 1-10, a branched-chain alkyl group with a carbon number of 3-8, an alkoxyalkyl group with a carbon number of 2-7, or an alkenyl group with a carbon number of 2-8, and at least one of ##STR2## denotes a trans-1-sila-1,4-cyclohexylene or a trans-4-sila-1,4-cyclohexylene group whose silicon at position 1 or position 4 has a substitutional group(s) of H, F, Cl or CH.sub.3 and the other is a trans-1,4-cyclohexylene group, X denotes a CN, F, F, Cl, CF.sub.3, OCF.sub.3, OCHF.sub.2, OCHFCl, CF.sub.2 Cl, OCF.sub.2 Cl, R or OR group, Z.sub.1 denotes H, F or Cl, and Z.sub.2 denotes H or F.

    摘要翻译： 由以下通式（1）表示的硅环己烷化合物：其中R表示碳原子数为1〜10的直链烷基，碳数为1的单或二氟烷基 1-10，碳数为3-8的支链烷基，碳数为2-7的烷氧基烷基或碳数为2-8的烯基，以及至少一个 “IMAGE”和“IMAGE”表示反式-1-硅烷-1,4-亚环己基或反式-4-硅烷-1,4-亚环己基，其位置1或位置4的硅的取代基为H ，F，Cl或CH 3，另一个是反式-1,4-亚环己基，X表示CN，F，F，Cl，CF 3，OCF 3，OCHF 2，OCHFCl，CF 2 Cl，OCF 2 Cl，R或OR基， H，F或Cl，Z2表示H或F.

    Stacked MOS transistor flip-flop memory cell
    109.
    发明授权
    Stacked MOS transistor flip-flop memory cell 失效
    堆叠MOS晶体管触发器存储单元

    公开(公告)号：US4894801A

    公开(公告)日：1990-01-16

    申请号：US77176

    申请日：1987-07-24

    申请人： Ryuichi Saito ,  Naohiro Momma

    发明人： Ryuichi Saito ,  Naohiro Momma

    IPC分类号： G11C11/41 ,  H01L21/8244 ,  H01L27/11

    CPC分类号： H01L27/11

    摘要： A semiconductor memory including two cross-coupled driver MOS transistors respectively having source and drain regions within a semiconductor substrate and each of the drain regions being in ohmic contact with the gate electrode of the other driver MOS transistor. The gate electrodes of the driver MOS transistors are formed in a first-level polycrystalline silicon (polysilicon) layer and the two transfer MOS transistors respectively have their source and drain regions formed in portions of a second-level polysilicon layer. The driver regions are formed so as to be independently brought into ohmic contact with the respective drain regions of the driver MOS transistors, and each of the transfer MOS transistors have a gate electrode effected in a third-level polysilicon layer which also defines a word line. Two load resistors are respectively formed in those regions of the second-level polysilicon layer which extend from the drain regions of the transfer MOS transistors to a power supply potential line, and wherein the corresponding regions of the load resistors are connected to the power supply potential line in the second-level polysilicon layer. Two metallic data lines are respectively brought into ohmic contact with the source regions of the two transfer MOS transistors and wherein the ground wirings of the memory cell are respectively defined by extending portions of the source regions of the two driver MOS transistors.

    摘要翻译： 一种半导体存储器，包括分别在半导体衬底内具有源极和漏极区域的两个交叉耦合的驱动器MOS晶体管，并且每个漏极区域与另一个驱动器MOS晶体管的栅电极欧姆接触。 驱动器MOS晶体管的栅电极形成在第一级多晶硅（多晶硅）层中，并且两个转移MOS晶体管分别具有形成在二级多晶硅层的一部分中的源极和漏极区域。 形成驱动器区域以独立地与驱动器MOS晶体管的漏极区域欧姆接触，并且每个传输MOS晶体管都具有在第三级多晶硅层中实现的栅电极，该第三级多晶硅层还限定字线 。 分别在从传输MOS晶体管的漏极区域延伸到电源电位线的第二级多晶硅层的那些区域中分别形成两个负载电阻器，并且其中负载电阻器的相应区域连接到电源电位 线在二级多晶硅层。 两个金属数据线分别与两个传输MOS晶体管的源极区域欧姆接触，并且其中存储单元的接地布线分别通过延伸两个驱动器MOS晶体管的源极区域的部分来限定。

    Protection circuit for power management semiconductor devices and power converter having the protection circuit
    110.
    发明授权
    Protection circuit for power management semiconductor devices and power converter having the protection circuit 有权
    具有保护电路的电源管理半导体器件和电力转换器保护电路

    公开(公告)号：US07295412B2

    公开(公告)日：2007-11-13

    申请号：US10773283

    申请日：2004-02-09

    申请人： Masataka Sasaki ,  Katsumi Ishikawa ,  Ryuichi Saito ,  Koichi Suda ,  Katsuaki Takahashi

    发明人： Masataka Sasaki ,  Katsumi Ishikawa ,  Ryuichi Saito ,  Koichi Suda ,  Katsuaki Takahashi

    IPC分类号： H02H3/20 ,  H02H3/08 ,  H02H9/02

    CPC分类号： B60W20/00 ,  B60K6/485 ,  B60L3/003 ,  B60W10/08 ,  H02H7/20 ,  H02M1/32 ,  H03K17/0828 ,  H03K17/168 ,  Y02T10/6226

    摘要： A collector voltage of a power management semiconductor device is detected by a first comparator, and when the detected collector voltage exceeds a first reference voltage, the first comparator outputs a first detection signal. Furthermore, a gate voltage of the power management semiconductor device is detected by a second comparator, and when the detected gate voltage exceeds a second reference voltage, the second comparator outputs a second detection signal. The second reference voltage is a minimum gate voltage for feeding a rated power to the power management semiconductor device or over, and less than a line power voltage of a drive circuit of the power management semiconductor device. When both the first detection signal and second detection signal are being outputted, the gate voltage is reduced by a gate voltage reduction means so as to protect the power management semiconductor device from overcurrent and overvoltage.

    摘要翻译： 功率管理半导体器件的集电极电压由第一比较器检测，并且当检测到的集电极电压超过第一参考电压时，第一比较器输出第一检测信号。 此外，由第二比较器检测功率管理半导体器件的栅极电压，并且当检测到的栅极电压超过第二参考电压时，第二比较器输出第二检测信号。 第二参考电压是用于向功率管理半导体器件提供额定功率或超过功率管理半导体器件的驱动电路的线电源电压的最小栅极电压。 当输出第一检测信号和第二检测信号两者时，通过栅极电压降低装置降低栅极电压，以保护功率管理半导体器件免于过电流和过电压。