公开(公告)号：US07972969B2

公开(公告)日：2011-07-05

申请号：US12043714

申请日：2008-03-06

申请人： Ku-Feng Yang ,  Wen-Chih Chiou ,  Weng-Jin Wu ,  Kewei Zuo

发明人： Ku-Feng Yang ,  Wen-Chih Chiou ,  Weng-Jin Wu ,  Kewei Zuo

IPC分类号： H01L21/302 ,  H01L21/461

CPC分类号： H01L21/67253 ,  H01L21/30604 ,  H01L21/6708 ,  H01L22/12 ,  H01L22/26 ,  H01L2924/0002 ,  H01L2924/00

摘要： A method is provided for controlling substrate thickness. At least one etchant is dispensed from at least one dispenser to a plurality of different locations on a surface of a spinning substrate to perform etching. A thickness of the spinning substrate is monitored at the plurality of locations, so that the thickness of the substrate is monitored at each individual location while dispensing the etchant at that location. A respective amount of etching performed at each individual location is controlled, based on the respective monitored thickness at that location.

摘要翻译： 提供了一种控制基板厚度的方法。 至少一种蚀刻剂从纺丝衬底的表面从至少一个分配器分配到多个不同位置以进行蚀刻。 在多个位置监测纺丝衬底的厚度，从而在每个单独位置监测衬底的厚度，同时在该位置分配蚀刻剂。 基于在该位置处的相应监视的厚度来控制在每个单独位置执行的相应的蚀刻量。

公开(公告)号：US20100164109A1

公开(公告)日：2010-07-01

申请号：US12345239

申请日：2008-12-29

申请人： Wen-Chih Chiou ,  Weng-Jin Wu

发明人： Wen-Chih Chiou ,  Weng-Jin Wu

IPC分类号： H01L23/538

CPC分类号： H01L24/05 ,  H01L21/6835 ,  H01L23/481 ,  H01L24/03 ,  H01L24/11 ,  H01L24/13 ,  H01L24/16 ,  H01L24/81 ,  H01L25/0657 ,  H01L2221/6834 ,  H01L2224/0231 ,  H01L2224/0401 ,  H01L2224/05568 ,  H01L2224/0557 ,  H01L2224/05599 ,  H01L2224/13025 ,  H01L2224/1308 ,  H01L2224/13082 ,  H01L2224/131 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/1357 ,  H01L2224/13644 ,  H01L2224/81001 ,  H01L2224/81801 ,  H01L2225/06513 ,  H01L2225/06541 ,  H01L2924/00013 ,  H01L2924/00014 ,  H01L2924/0002 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01022 ,  H01L2924/01023 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01327 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/19041 ,  H01L2924/19043 ,  H01L2224/13099 ,  H01L2224/05552

摘要： An integrated circuit structure includes a semiconductor substrate having a front side and a backside. A through-silicon via (TSV) penetrates the semiconductor substrate. The TSV has a back end extending to the backside of the semiconductor substrate. A redistribution line (RDL) is over the backside of the semiconductor substrate and connected to the back end of the TSV. A silicide layer is over and contacting the RDL.

摘要翻译： 集成电路结构包括具有正面和背面的半导体衬底。 穿透硅通孔（TSV）穿透半导体衬底。 TSV具有延伸到半导体衬底背面的后端。 再分配线（RDL）位于半导体衬底的背面，并连接到TSV的后端。 硅化物层已经结束并与RDL接触。

公开(公告)号：US20100140767A1

公开(公告)日：2010-06-10

申请号：US12329322

申请日：2008-12-05

申请人： Weng-Jin Wu ,  Hung-Jung Tu ,  Ku-Feng Yang ,  Jung-Chih Hu ,  Wen-Chih Chiou

发明人： Weng-Jin Wu ,  Hung-Jung Tu ,  Ku-Feng Yang ,  Jung-Chih Hu ,  Wen-Chih Chiou

IPC分类号： H01L23/00 ,  H01L21/46

CPC分类号： H01L23/3157 ,  H01L25/0657 ,  H01L25/50 ,  H01L2224/0554 ,  H01L2224/0557 ,  H01L2224/05571 ,  H01L2224/05573 ,  H01L2224/16 ,  H01L2225/06513 ,  H01L2924/00014 ,  H01L2224/05599 ,  H01L2224/0555 ,  H01L2224/0556

摘要： A method of forming integrated circuits includes laminating a patterned film including an opening onto a wafer, wherein a bottom die in the wafer is exposed through the opening. A top die is placed into the opening. The top die fits into the opening with substantially no gap between the patterned film and the top die. The top die is then bonded onto the bottom die, followed by curing the patterned film.

摘要翻译： 一种形成集成电路的方法包括将包括开口的图案化膜层压到晶片上，其中晶片中的底模裸露通过开口。 将顶模放入开口。 顶部模具装配到开口中，在图案化膜和顶模之间基本上没有间隙。 然后将顶模结合到底模上，随后固化图案化膜。

公开(公告)号：US08647925B2

公开(公告)日：2014-02-11

申请号：US12792975

申请日：2010-06-03

申请人： Wen-Chih Chiou ,  Shau-Lin Shue ,  Weng-Jin Wu ,  Ju-Pin Hung

发明人： Wen-Chih Chiou ,  Shau-Lin Shue ,  Weng-Jin Wu ,  Ju-Pin Hung

IPC分类号： H01L21/00

CPC分类号： H01L21/76898 ,  H01L21/6836 ,  H01L24/13 ,  H01L24/14 ,  H01L24/16 ,  H01L24/81 ,  H01L24/94 ,  H01L2221/6834 ,  H01L2224/0401 ,  H01L2224/05568 ,  H01L2224/13025 ,  H01L2224/131 ,  H01L2224/13144 ,  H01L2224/14181 ,  H01L2224/81001 ,  H01L2224/81005 ,  H01L2224/81191 ,  H01L2224/81193 ,  H01L2224/81801 ,  H01L2224/94 ,  H01L2224/97 ,  H01L2924/0002 ,  H01L2924/01005 ,  H01L2924/01013 ,  H01L2924/01019 ,  H01L2924/01023 ,  H01L2924/01024 ,  H01L2924/01029 ,  H01L2924/01032 ,  H01L2924/01033 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/01049 ,  H01L2924/01073 ,  H01L2924/01074 ,  H01L2924/01075 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01327 ,  H01L2924/014 ,  H01L2924/04941 ,  H01L2924/14 ,  H01L2924/19041 ,  H01L2224/11 ,  H01L2224/81 ,  H01L2924/00014 ,  H01L2224/05552 ,  H01L2924/00

摘要： A wafer is provided with a through via extending a portion of a substrate, an interconnect structure electrically connecting the through via, and a polyimide layer formed on the interconnect structure. Surface modification of the polyimide layer is the formation of a thin dielectric film on the polyimide layer by coating, plasma treatment, chemical treatment, or deposition methods. The thin dielectric film is adhered strongly to the polyimide layer, which can reduce the adhesion between the wafer surface and an adhesive layer formed in subsequent carrier attaching process.

摘要翻译： 晶片设置有延伸基板的一部分的通孔，连接通孔的互连结构和形成在互连结构上的聚酰亚胺层。 聚酰亚胺层的表面改性是通过涂覆，等离子体处理，化学处理或沉积方法在聚酰亚胺层上形成薄的电介质膜。 薄的电介质膜牢固地粘附到聚酰亚胺层，这可以降低晶片表面和随后的载体附接过程中形成的粘合剂层之间的粘合性。

公开(公告)号：US08264077B2

公开(公告)日：2012-09-11

申请号：US12345239

申请日：2008-12-29

申请人： Wen-Chih Chiou ,  Weng-Jin Wu

发明人： Wen-Chih Chiou ,  Weng-Jin Wu

IPC分类号： H01L23/04

CPC分类号： H01L24/05 ,  H01L21/6835 ,  H01L23/481 ,  H01L24/03 ,  H01L24/11 ,  H01L24/13 ,  H01L24/16 ,  H01L24/81 ,  H01L25/0657 ,  H01L2221/6834 ,  H01L2224/0231 ,  H01L2224/0401 ,  H01L2224/05568 ,  H01L2224/0557 ,  H01L2224/05599 ,  H01L2224/13025 ,  H01L2224/1308 ,  H01L2224/13082 ,  H01L2224/131 ,  H01L2224/13147 ,  H01L2224/13155 ,  H01L2224/1357 ,  H01L2224/13644 ,  H01L2224/81001 ,  H01L2224/81801 ,  H01L2225/06513 ,  H01L2225/06541 ,  H01L2924/00013 ,  H01L2924/00014 ,  H01L2924/0002 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01014 ,  H01L2924/01022 ,  H01L2924/01023 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01046 ,  H01L2924/01047 ,  H01L2924/01078 ,  H01L2924/01079 ,  H01L2924/01082 ,  H01L2924/01327 ,  H01L2924/014 ,  H01L2924/14 ,  H01L2924/19041 ,  H01L2924/19043 ,  H01L2224/13099 ,  H01L2224/05552

摘要： An integrated circuit structure includes a semiconductor substrate having a front side and a backside. A through-silicon via (TSV) penetrates the semiconductor substrate. The TSV has a back end extending to the backside of the semiconductor substrate. A redistribution line (RDL) is over the backside of the semiconductor substrate and connected to the back end of the TSV. A silicide layer is over and contacting the RDL.

摘要翻译： 集成电路结构包括具有正面和背面的半导体衬底。 穿透硅通孔（TSV）穿透半导体衬底。 TSV具有延伸到半导体衬底背面的后端。 再分配线（RDL）位于半导体衬底的背面，并连接到TSV的后端。 硅化物层已经结束并与RDL接触。

公开(公告)号：US20120145204A1

公开(公告)日：2012-06-14

申请号：US12964097

申请日：2010-12-09

申请人： Yu-Liang Lin ,  Weng-Jin Wu ,  Jing-Cheng Lin ,  Wen-Chih Chiou

发明人： Yu-Liang Lin ,  Weng-Jin Wu ,  Jing-Cheng Lin ,  Wen-Chih Chiou

IPC分类号： B08B3/08 ,  B08B3/02

CPC分类号： H01L21/67051 ,  H01L21/68728

摘要： A device and system for thin wafer cleaning is disclosed. A preferred embodiment comprises a spin chuck having at least three holding clamps. A thin wafer with a wafer frame is mounted on the spin chuck through a tape layer. When the holding clamps are unlocked, there is no interference with the removal and placement of the wafer frame. On the other hand, when the holding clamps are locked, the holding clamps are brought into contact with the outer edge of the wafer frame so as to prevent the wafer frame from moving laterally. Furthermore, the shape of the holding clamps in a locked position is capable of preventing the wafer frame from moving vertically.

摘要翻译： 公开了用于薄晶片清洁的装置和系统。 优选实施例包括具有至少三个保持夹具的旋转卡盘。 具有晶片框架的薄晶片通过带层安装在旋转卡盘上。 当保持夹具解锁时，不会干扰晶片框架的移除和放置。 另一方面，当保持夹具被锁定时，保持夹具与晶片框架的外边缘接触，以防止晶片框架横向移动。 此外，保持夹具处于锁定位置的形状能够防止晶片框架垂直移动。

公开(公告)号：US20100267217A1

公开(公告)日：2010-10-21

申请号：US12685523

申请日：2010-01-11

申请人： Ku-Feng Yang ,  Weng-Jin Wu ,  Wen-Chih Chiou ,  Jung-Chih Hu

发明人： Ku-Feng Yang ,  Weng-Jin Wu ,  Wen-Chih Chiou ,  Jung-Chih Hu

IPC分类号： H01L21/50 ,  H01L21/306

CPC分类号： H01L21/30625 ,  H01L21/30608 ,  H01L21/3212 ,  H01L21/76898 ,  H01L24/13 ,  H01L24/16 ,  H01L24/81 ,  H01L2224/13109 ,  H01L2224/13116 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/13184 ,  H01L2224/16145 ,  H01L2224/81193 ,  H01L2224/9202 ,  H01L2225/06541 ,  H01L2924/01029 ,  H01L2924/14 ,  H01L2924/00014 ,  H01L2924/0105 ,  H01L2924/01079

摘要： A method of forming a semiconductor device is presented. A conductor is embedded within a substrate, wherein the substrate contains a non-conducting material. The backside of the substrate is ground to a thickness wherein at least 1 μm of the non-conducting material remains on the backside covering the conductor embedded within the substrate. Chemical mechanical polishing (CMP) is employed with an undiscerning slurry to the backside of the substrate, thereby planarizing the substrate and exposing the conductive material. A spin wet-etch, with a protective formulation, is employed to remove a thickness y of the non-conducting material from the backside of the substrate, thereby causing the conductive material to uniformly protrude from the backside of the substrate.

摘要翻译： 提出了一种形成半导体器件的方法。 导体嵌入衬底内，其中衬底含有非导电材料。 将衬底的背面研磨成厚度，其中至少1μm的非导电材料保留在覆盖衬底内的导体的背面上。 采用化学机械抛光（CMP），其具有不透明的浆料到衬底的背面，由此平坦化衬底并暴露导电材料。 使用具有保护性配方的旋转湿蚀刻从衬底的背面除去非导电材料的厚度y，从而使导电材料从衬底的背面均匀地突出。

公开(公告)号：US20090227047A1

公开(公告)日：2009-09-10

申请号：US12043714

申请日：2008-03-06

申请人： Ku-Feng Yang ,  Wen-Chih Chiou ,  Weng-Jin Wu ,  Kewei Zuo

发明人： Ku-Feng Yang ,  Wen-Chih Chiou ,  Weng-Jin Wu ,  Kewei Zuo

IPC分类号： H01L21/00 ,  H01L21/306

CPC分类号： H01L21/67253 ,  H01L21/30604 ,  H01L21/6708 ,  H01L22/12 ,  H01L22/26 ,  H01L2924/0002 ,  H01L2924/00

摘要： A method is provided for controlling substrate thickness. At least one etchant is dispensed from at least one dispenser to a plurality of different locations on a surface of a spinning substrate to perform etching. A thickness of the spinning substrate is monitored at the plurality of locations, so that the thickness of the substrate is monitored at each individual location while dispensing the etchant at that location. A respective amount of etching performed at each individual location is controlled, based on the respective monitored thickness at that location.

摘要翻译： 提供了一种控制基板厚度的方法。 至少一种蚀刻剂从纺丝衬底的表面从至少一个分配器分配到多个不同位置以进行蚀刻。 在多个位置监测纺丝衬底的厚度，从而在每个单独位置监测衬底的厚度，同时在该位置分配蚀刻剂。 基于在该位置处的相应监视的厚度来控制在每个单独位置执行的相应的蚀刻量。

公开(公告)号：US09117828B2

公开(公告)日：2015-08-25

申请号：US12717573

申请日：2010-03-04

申请人： Weng-Jin Wu ,  Ku-Feng Yang ,  Wen-Chih Chiou

发明人： Weng-Jin Wu ,  Ku-Feng Yang ,  Wen-Chih Chiou

IPC分类号： H01L21/50 ,  H01L21/56 ,  H01L21/71 ,  H01L21/60 ,  H01L21/683 ,  H01L21/768 ,  H01L23/31 ,  H01L23/00 ,  H01L25/00 ,  H01L29/06

CPC分类号： H01L21/561 ,  H01L21/6835 ,  H01L21/76898 ,  H01L23/3121 ,  H01L24/11 ,  H01L24/13 ,  H01L24/16 ,  H01L24/81 ,  H01L24/94 ,  H01L24/95 ,  H01L25/50 ,  H01L29/0657 ,  H01L2221/68318 ,  H01L2221/68345 ,  H01L2224/13009 ,  H01L2224/13099 ,  H01L2224/131 ,  H01L2224/13147 ,  H01L2224/81001 ,  H01L2224/81801 ,  H01L2224/81894 ,  H01L2224/83894 ,  H01L2225/06513 ,  H01L2225/06541 ,  H01L2924/0001 ,  H01L2924/00011 ,  H01L2924/00014 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01074 ,  H01L2924/014 ,  H01L2924/09701 ,  H01L2924/14 ,  H01L2924/181 ,  H01L2924/19041 ,  H01L2924/19043 ,  H01L2924/00 ,  H01L2224/0401

摘要： A method of handling a thin wafer includes forming a support structure at the edge of a thinned wafer that is encapsulated by a protection layer. The support structure can be an adhesive layer enclosing the protection layer, a dielectric-filled trench embedded in the thinned wafer and surrounding the protection layer, or a housing affixing the edge of the thinned wafer.

摘要翻译： 处理薄晶片的方法包括在由保护层封装的薄化晶片的边缘处形成支撑结构。 支撑结构可以是包围保护层的粘合剂层，嵌入在薄化晶片中并围绕保护层的介电填充沟槽或者固定薄化晶片的边缘的壳体。

公开(公告)号：US08691664B2

公开(公告)日：2014-04-08

申请号：US12685523

申请日：2010-01-11

申请人： Ku-Feng Yang ,  Weng-Jin Wu ,  Wen-Chih Chiou ,  Jung-Chih Hu

发明人： Ku-Feng Yang ,  Weng-Jin Wu ,  Wen-Chih Chiou ,  Jung-Chih Hu

IPC分类号： H01L21/00

CPC分类号： H01L21/30625 ,  H01L21/30608 ,  H01L21/3212 ,  H01L21/76898 ,  H01L24/13 ,  H01L24/16 ,  H01L24/81 ,  H01L2224/13109 ,  H01L2224/13116 ,  H01L2224/13144 ,  H01L2224/13147 ,  H01L2224/13184 ,  H01L2224/16145 ,  H01L2224/81193 ,  H01L2224/9202 ,  H01L2225/06541 ,  H01L2924/01029 ,  H01L2924/14 ,  H01L2924/00014 ,  H01L2924/0105 ,  H01L2924/01079

摘要： A method of forming a semiconductor device is presented. A conductor is embedded within a substrate, wherein the substrate contains a non-conducting material. The backside of the substrate is ground to a thickness wherein at least 1 μm of the non-conducting material remains on the backside covering the conductor embedded within the substrate. Chemical mechanical polishing (CMP) is employed with an undiscerning slurry to the backside of the substrate, thereby planarizing the substrate and exposing the conductive material. A spin wet-etch, with a protective formulation, is employed to remove a thickness y of the non-conducting material from the backside of the substrate, thereby causing the conductive material to uniformly protrude from the backside of the substrate.

摘要翻译： 提出了一种形成半导体器件的方法。 导体嵌入衬底内，其中衬底含有非导电材料。 将衬底的背面研磨成厚度，其中至少1μm的非导电材料保留在覆盖衬底内的导体的背面上。 采用化学机械抛光（CMP），其具有不透明的浆料到衬底的背面，由此平坦化衬底并暴露导电材料。 使用具有保护性配方的旋转湿蚀刻从衬底的背面除去非导电材料的厚度y，从而使导电材料从衬底的背面均匀地突出。