公开(公告)号：US5381025A

公开(公告)日：1995-01-10

申请号：US961041

申请日：1992-10-14

申请人： Nathan Zommer

发明人： Nathan Zommer

IPC分类号： H01L21/331 ,  H01L21/332 ,  H01L29/745 ,  H01L29/74 ,  H01L29/00 ,  H01L29/72

CPC分类号： H01L29/66333 ,  H01L29/66378 ,  H01L29/7455

摘要： An insulated gate thyristor (IGTH) (40,80) that is built on IGBT technology rather than SCR or thyristor technology. The device provides the low on-resistance of a thyristor with the gate turn-on and turn-off capability of an IGBT. The device may be fabricated in a somewhat modified IGBT process, in a cellular (40) or stripe (80) configuration. First the process is modified (by reduced doping) in order to promote (rather than inhibit) latch-up. Second, certain regions (52) are formed without source diffusions to create a lateral MOSFET (T.sub.5) that can turn off the latched IGBT.

摘要翻译： 一种绝缘栅晶闸管（IGTH）（40,80），其基于IGBT技术而不是SCR或晶闸管技术。 该器件提供了具有IGBT的栅极导通和关断能力的晶闸管的低导通电阻。 器件可以以稍微改进的IGBT工艺制造，在蜂窝（40）或条带（80）配置中。 首先，通过减少掺杂来改进（而不是抑制）闩锁的过程。 第二，形成没有源扩散的某些区域（52），以产生可以关断锁存IGBT的横向MOSFET（T5）。

公开(公告)号：US5194394A

公开(公告)日：1993-03-16

申请号：US828204

申请日：1992-01-30

申请人： Tomohide Terashima

发明人： Tomohide Terashima

IPC分类号： H01L21/332 ,  H01L29/745

CPC分类号： H01L29/66378 ,  H01L29/7455 ,  Y10S148/126

摘要： A thyristor of the present invention turns on by applying a specified voltage to a first control electrode and turns off by applying a specified voltage to a second control electrode. These first and second control electrodes are independent of each other, so that the turning-on and turning-off conditions can be determined independently. When a transistor having the second control electrode is turned on by applying the specified voltage to the second control electrode until just before the turning-on, a first main electrode and a first semiconductor region can be electrically connected, so that the back gate potential of the transistor having the first control electrode can be fixed at the potential of the first main electrode.

摘要翻译： 本发明的晶闸管通过对第一控制电极施加规定的电压来接通，并且通过向第二控制电极施加规定的电压而断开。 这些第一和第二控制电极彼此独立，从而独立地确定导通和关断条件。 当具有第二控制电极的晶体管通过向第二控制电极施加规定的电压而导通时，直到接通前，第一主电极和第一半导体区域可以电连接，使得栅极电位 具有第一控制电极的晶体管可以固定在第一主电极的电位。

公开(公告)号：US5164335A

公开(公告)日：1992-11-17

申请号：US713084

申请日：1991-06-11

申请人： Mitsuo Sato ,  Hazime Shaura ,  Megumi Tateishi

发明人： Mitsuo Sato ,  Hazime Shaura ,  Megumi Tateishi

IPC分类号： H01L29/74 ,  H01L21/00 ,  H01L21/312 ,  H01L21/329 ,  H01L21/332 ,  H01L21/68 ,  H01L29/06 ,  H01L29/861

CPC分类号： H01L21/67011 ,  H01L21/68 ,  Y10T29/41

摘要： The present invention discloses a semiconductor manufacturing apparatus comprising a wafer supply unit including a tray on which a plurality of wafers are placed, a positioning unit for detecting specific points on the wafers prior to molding of a resin and compensating for the position of the wafers, a molding unit for molding the resin on the peripheries of the wafers which have been compensated for position, an injecting unit for supplying the resin to the molding unit, a storage unit for storing resin-molded wafers, a wafer carrying unit for carrying wafers between the supply unit and the positioning unit, between the positioning unit and the molding unit and between the molding unit and the storage unit, and a control unit for controlling the operation of the supply unit, the positioning unit, the molding unit, the injecting unit, the storage unit and the carrying unit.

公开(公告)号：US5081050A

公开(公告)日：1992-01-14

申请号：US610698

申请日：1990-11-08

申请人： Peter Roggwiller ,  Jan Voboril ,  Thomas Vlasak

发明人： Peter Roggwiller ,  Jan Voboril ,  Thomas Vlasak

IPC分类号： H01L29/74 ,  H01L21/225 ,  H01L21/332 ,  H01L29/06 ,  H01L29/10 ,  H01L29/744

CPC分类号： H01L29/744 ,  H01L21/2252 ,  H01L29/0657 ,  H01L29/0661 ,  H01L29/102

摘要： In a high-reverse-voltage GTO thyristor, a negative beveling (6) with comparatively high beveling angle (.alpha.) is possible as edge contouring as a result of separating the p-type base layer into a central p-type base layer (4) of small depth and high edge concentration and a p-type base edge layer (5) of greater depth and lower edge concentration.The production of the two p-type base layers (4, 5) is preferably carried out by simultaneous diffusion of two acceptors with different diffusion constants.

公开(公告)号：US5023696A

公开(公告)日：1991-06-11

申请号：US305652

申请日：1989-02-03

申请人： Masanobu Ogino

发明人： Masanobu Ogino

IPC分类号： H01L29/68 ,  H01L21/18 ,  H01L21/322 ,  H01L21/331 ,  H01L21/332 ,  H01L29/32 ,  H01L29/739 ,  H01L29/74 ,  H01L29/749 ,  H01L29/78

CPC分类号： H01L29/66333 ,  H01L21/187 ,  H01L21/3221 ,  H01L29/32 ,  H01L29/66363 ,  H01L29/7395

摘要： A semiconductor element is formed in a composite substrate constructed by fixing two semiconductor substrates in close contact with each other, and crystal defects are formed in that portion of at least one of the two semiconductor substrates which lies near the junction plane of the two semiconductor substrates. The crystal defects act as the center of the recombination of excess minority carriers accumulated in an active region of the semiconductor element.

公开(公告)号：US5003368A

公开(公告)日：1991-03-26

申请号：US229556

申请日：1988-08-08

申请人： Peter Roggwiller ,  Jan Voboril ,  Thomas Vlasak

发明人： Peter Roggwiller ,  Jan Voboril ,  Thomas Vlasak

IPC分类号： H01L29/74 ,  H01L21/225 ,  H01L21/332 ,  H01L29/06 ,  H01L29/10 ,  H01L29/744

CPC分类号： H01L29/744 ,  H01L21/2252 ,  H01L29/0657 ,  H01L29/0661 ,  H01L29/102

摘要： In a high-reverse-voltage GTO thyristor, a negative beveling (6) with comparatively high beveling angle (.alpha.) is possible as edge contouring as a result of separating the p-type base layer into a central p-type base layer (4) of small depth and high edge concentration and a p-type base edge layer (5) of greater depth and lower edge concentration.The production of the two p-type base layers (4, 5) is preferably carried out by simultaneous diffusion of two acceptors with different diffusion constants.

摘要翻译： 在高反向电压GTO晶闸管中，由于将p型基极层分离为中心p型基极层（4），因此具有较高斜角（α）的负斜面（6）可作为边缘轮廓加工 ）和较高深度和较高边缘浓度的p型基底边缘层（5）。 两个p型基底层（4,5）的制备优选通过具有不同扩散常数的两个受体的同时扩散来进行。

公开(公告)号：US4985740A

公开(公告)日：1991-01-15

申请号：US359811

申请日：1989-06-01

申请人： Krishna Shenai ,  Bantval J. Baliga ,  Patricia A. Piacente ,  Charles S. Korman

发明人： Krishna Shenai ,  Bantval J. Baliga ,  Patricia A. Piacente ,  Charles S. Korman

IPC分类号： H01L21/28 ,  H01L21/331 ,  H01L21/332 ,  H01L21/336 ,  H01L23/532 ,  H01L29/417 ,  H01L29/45 ,  H01L29/49 ,  H01L29/78

CPC分类号： H01L29/66333 ,  H01L21/28061 ,  H01L23/53271 ,  H01L29/41741 ,  H01L29/66378 ,  H01L29/66712 ,  H01L29/7802 ,  H01L29/456 ,  H01L29/4933 ,  H01L2924/0002

摘要： A multi-cellular power field effect semiconductor device includes a tungsten silicide/polysilicon/oxide gate electrode stack with low sheet resistance. Preferably, a layer of tungsten is also disposed in intimate contact with the source region of the device. This tunsten layer is self-aligned with respect to the aperture in the gate electrode through which the source region is diffused. The presence of this tungsten layer greatly reduces the resulting ohmic contact resistance to the region. If desired, a tunsten layer can also be disposed in contact with the drain region of the device, again, to lower ohmic contact resistance. The device has substantially improved operating characteristics. Novel processes for producing the device are also described.

公开(公告)号：US4982259A

公开(公告)日：1991-01-01

申请号：US257673

申请日：1988-10-14

申请人： Shigenori Yakushiji ,  Kouji Jitsukata

发明人： Shigenori Yakushiji ,  Kouji Jitsukata

IPC分类号： H01L21/332 ,  H01L27/144 ,  H01L29/74 ,  H01L29/749 ,  H01L31/111

CPC分类号： H01L29/66371 ,  H01L27/1443 ,  H01L29/7408 ,  H01L29/742 ,  H01L31/1113

摘要： A MOSFET is provided between a main thyristor and an auxiliary thyristor for controlling the main thyristor. The source and drain regions of the MOSFET are also used as a first N-type emitter region of the main thyristor and a second N-type emitter region of the auxiliary thyristor. The MOSFET and the auxiliary thyristor are controlled by an output of a gate energization circuit. When the MOSFET is turned on by an output of the gate energization circuit, the main thyristor is connected to the auxiliary thyristor. At this time, the auxiliary thyristor is turned on by the output of the gate energization circuit, and the main thyristor is also turned on due to the turn-on operation of the auxiliary thyristor. When the MOSFET is in the OFF state, the main thyristor is electrically isolated from the auxiliary thyristor.

公开(公告)号：US4963971A

公开(公告)日：1990-10-16

申请号：US447354

申请日：1989-12-07

申请人： Pierre Rosetti ,  Yvette Ribault

发明人： Pierre Rosetti ,  Yvette Ribault

IPC分类号： H01L29/74 ,  H01L21/332 ,  H01L29/08

CPC分类号： H01L29/66363 ,  H01L29/0821 ,  H01L29/0834

摘要： The invention relates to a symmetrical power semiconductor device having peripheral connection slabs and to a method of fabricating such a device. An essentially polycrystalline P/N epitaxial layer (23) lies flush with a main face (S1) of the device by virture of grooves (21) obtained by etching and overlaid with a peripheral P/N zone (25). A P/N layer (22) is diffused between the epitaxial layer (23) and a monocrystalline N/P layer (20) in order to establish a junction (J2) which the grooves (21) and the peripheral zone (25) serve to bring out on the main face (S1). The invention is applicable to symmetrical bipolar devices, and in particular to gate-triggered thyristors.

摘要翻译： 本发明涉及具有外围连接板的对称功率半导体器件及其制造方法。 基本上多晶的P / N外延层（23）通过蚀刻获得的凹槽（21）与外围P / N区（25）重叠而与器件的主面（S1）齐平。 AP / N层（22）在外延层（23）和单晶N / P层（20）之间扩散，以便建立沟槽（21）和周边区域（25）所用的结（J2） 在主面上出来（S1）。 本发明可应用于对称双极器件，特别适用于栅极触发晶闸管。

公开(公告)号：US4883767A

公开(公告)日：1989-11-28

申请号：US220353

申请日：1988-07-14

申请人： Peter V. Gray ,  Bantval J. Baliga ,  Mike F. S. Chang ,  George C. Pifer

发明人： Peter V. Gray ,  Bantval J. Baliga ,  Mike F. S. Chang ,  George C. Pifer

IPC分类号： H01L21/033 ,  H01L21/331 ,  H01L21/332 ,  H01L21/336

CPC分类号： H01L29/66712 ,  H01L21/033 ,  H01L29/66333 ,  H01L29/66378

摘要： A self aligned method of fabricating a self aligned semiconductor device employs an initial step in which a first window having an inner perimeter and outer perimeter is opened through a first protective layer situated atop a semiconductor substrate, to divide the substrate into three separate zones. The window exposes a first surface portion of the semiconductor substrate and circumferentially defines or encompasses a second central portion of the protective layer as well as a second unexposed surface portion of the substrate. A third surface portion of the substrate lies beyond the outer perimeter of the first window. Precisely aligned substrate regions of the same or different conductivity type can be established by using differentially etchable materials to mask designated surface portions of the substrate.

摘要翻译： 制造自对准半导体器件的自对准方法采用初始步骤，其中通过位于半导体衬底顶部的第一保护层打开具有内周边和外周边的第一窗口，以将衬底分成三个独立的区域。 窗口露出半导体衬底的第一表面部分并周向地限定或包围保护层的第二中心部分以及衬底的第二未曝光表面部分。 基板的第三表面部分位于第一窗口的外周边之外。 可以通过使用差分可蚀刻材料掩蔽衬底的指定表面部分来建立相同或不同导电类型的精确对准的衬底区域。