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    Patterned Substrate for Hetero-epitaxial Growth of Group-III Nitride Film
    111.
    发明申请
    Patterned Substrate for Hetero-epitaxial Growth of Group-III Nitride Film 有权
    用于III族氮化物膜的异质外延生长的图案化基板

    公开(公告)号：US20100001375A1

    公开(公告)日：2010-01-07

    申请号：US12166034

    申请日：2008-07-01

    申请人： Chen-Hua Yu ,  Ding-Yuan Chen

    发明人： Chen-Hua Yu ,  Ding-Yuan Chen

    IPC分类号： H01L29/04

    CPC分类号： H01L27/156 ,  H01L31/0304 ,  H01L31/1035 ,  H01L33/007 ,  H01L33/20

    摘要： A circuit structure includes a substrate and a film over the substrate and including a plurality of portions allocated as a plurality of rows. Each of the plurality of rows of the plurality of portions includes a plurality of convex portions and a plurality of concave portions. In each of the plurality of rows, the plurality of convex portions and the plurality of concave portions are allocated in an alternating pattern.

    摘要翻译： 电路结构包括衬底和衬底上的膜，并且包括分配为多行的多个部分。 多个部分的多行中的每一个包括多个凸部和多个凹部。 在多行中的每一行中，以交替图案分配多个凸部和多个凹部。

    FinFETs having dielectric punch-through stoppers
    113.
    发明申请
    FinFETs having dielectric punch-through stoppers 有权
    FinFET具有绝缘穿孔塞

    公开(公告)号：US20090278196A1

    公开(公告)日：2009-11-12

    申请号：US12116074

    申请日：2008-05-06

    申请人： Cheng-Hung Chang ,  Chen-Hua Yu ,  Chen-Nan Yeh

    发明人： Cheng-Hung Chang ,  Chen-Hua Yu ,  Chen-Nan Yeh

    IPC分类号： H01L29/00 ,  H01L21/76

    CPC分类号： H01L29/1083 ,  H01L21/823412 ,  H01L21/823431 ,  H01L21/823481 ,  H01L27/088 ,  H01L27/1203 ,  H01L27/1207 ,  H01L29/0653 ,  H01L29/7843 ,  H01L29/7851

    摘要： A semiconductor structure includes a semiconductor substrate; a planar transistor on a first portion of the semiconductor substrate, wherein the first portion of the semiconductor substrate has a first top surface; and a multiple-gate transistor on a second portion of the semiconductor substrate. The second portion of the semiconductor substrate is recessed from the first top surface to form a fin of the multiple-gate transistor. The fin is electrically isolated from the semiconductor substrate by an insulator.

    摘要翻译： 半导体结构包括半导体衬底; 在所述半导体衬底的第一部分上的平面晶体管，其中所述半导体衬底的所述第一部分具有第一顶表面; 以及在半导体衬底的第二部分上的多栅极晶体管。 半导体衬底的第二部分从第一顶表面凹入以形成多栅晶体管的鳍。 翅片通过绝缘体与半导体衬底电隔离。

    Integrating CMOS and Optical Devices on a Same Chip
    115.
    发明申请
    Integrating CMOS and Optical Devices on a Same Chip 审中-公开
    将CMOS和光器件集成在同一芯片上

    公开(公告)号：US20090261346A1

    公开(公告)日：2009-10-22

    申请号：US12127569

    申请日：2008-05-27

    申请人： Ding-Yuan Chen ,  Chen-Hua Yu

    发明人： Ding-Yuan Chen ,  Chen-Hua Yu

    IPC分类号： H01L27/15 ,  H01L33/00

    CPC分类号： H01L21/8258 ,  H01L21/76283 ,  H01L27/15 ,  H01L29/045 ,  H01L29/267 ,  H01L29/7787

    摘要： An integrated circuit structure includes a semiconductor substrate having a first surface region and a second surface region, wherein the first surface region and the second surface region have different surface orientations; a semiconductor device formed at a surface of the first surface region; and a group-III nitride layer over the second surface region, wherein the group-III nitride layer does not extend over the first surface region.

    摘要翻译： 集成电路结构包括具有第一表面区域和第二表面区域的半导体衬底，其中第一表面区域和第二表面区域具有不同的表面取向; 形成在所述第一表面区域的表面的半导体器件; 以及在所述第二表面区域上的III族氮化物层，其中所述III族氮化物层不在所述第一表面区域上延伸。

    Semiconductor Device Having Multiple Fin Heights
    116.
    发明申请
    Semiconductor Device Having Multiple Fin Heights 有权
    具有多个翅片高度的半导体器件

    公开(公告)号：US20090253266A1

    公开(公告)日：2009-10-08

    申请号：US12484911

    申请日：2009-06-15

    申请人： Chen-Hua Yu ,  Chen-Nan Yeh ,  Yu-Rung Hsu

    发明人： Chen-Hua Yu ,  Chen-Nan Yeh ,  Yu-Rung Hsu

    IPC分类号： H01L21/302

    CPC分类号： H01L29/7851 ,  H01L29/66795

    摘要： A semiconductor device having multiple fin heights is provided. Multiple fin heights are provided by using multiple masks to recess a dielectric layer within a trench formed in a substrate. In another embodiment, an implant mold or e-beam lithography are utilized to form a pattern of trenches in a photoresist material. Subsequent etching steps form corresponding trenches in the underlying substrate. In yet another embodiment, multiple masking layers are used to etch trenches of different heights separately. A dielectric region may be formed along the bottom of the trenches to isolate the fins by performing an ion implant and a subsequent anneal.

    摘要翻译： 提供具有多个翅片高度的半导体器件。 通过使用多个掩模来在形成在衬底中的沟槽内凹入电介质层来提供多个翅片高度。 在另一个实施例中，使用植入模具或电子束光刻来形成光致抗蚀剂材料中的沟槽图案。 随后的蚀刻步骤在下面的衬底中形成对应的沟槽。 在另一个实施例中，使用多个掩模层来分别蚀刻不同高度的沟槽。 可以沿着沟槽的底部形成电介质区域，以通过执行离子注入和随后的退火来隔离散热片。

    Semiconductor Device Having Multiple Fin Heights
    117.
    发明申请
    Semiconductor Device Having Multiple Fin Heights 有权

    公开(公告)号：US20090250769A1

    公开(公告)日：2009-10-08

    申请号：US12484900

    申请日：2009-06-15

    申请人： Chen-Hua Yu ,  Chen-Nan Yeh ,  Yu-Rung Hsu

    发明人： Chen-Hua Yu ,  Chen-Nan Yeh ,  Yu-Rung Hsu

    IPC分类号： H01L29/78 ,  H01L27/088

    CPC分类号： H01L29/7851 ,  H01L29/66795

    摘要： A semiconductor device having multiple fin heights is provided. Multiple fin heights are provided by using multiple masks to recess a dielectric layer within a trench formed in a substrate. In another embodiment, an implant mold or e-beam lithography are utilized to form a pattern of trenches in a photoresist material. Subsequent etching steps form corresponding trenches in the underlying substrate. In yet another embodiment, multiple masking layers are used to etch trenches of different heights separately. A dielectric region may be formed along the bottom of the trenches to isolate the fins by performing an ion implant and a subsequent anneal.