摘要:
A mechanically robust semiconductor structure with improved adhesion strength between a low-k dielectric layer and a dielectric-containing substrate is provided. In particular, the present invention provides a structure that includes a dielectric-containing substrate having an upper region including a treated surface layer which is chemically and physically different from the substrate; and a low-k dielectric material located on a the treated surface layer of the substrate. The treated surface layer and the low-k dielectric material form an interface that has an adhesion strength that is greater than 60% of the cohesive strength of the weaker material on either side of the interface. The treated surface is formed by treating the surface of the substrate with at least one of actinic radiation, a plasma and e-beam radiation prior to forming of the substrate the low-k dielectric material.
摘要:
Compositions, a method, and a photopatternable blend. The compositions include a blend of a first and a second polymer. The first polymer is a substituted silsesquioxane copolymer. The second polymer is a substituted silsesquioxane polymer. The second polymer is configured to undergo chemical crosslinking with the first polymer, the second polymer, or a combination thereof, upon exposure to light, thermal energy, or a combination thereof. The compositions include a photosensitive acid generator. The method includes forming a film. The film is patternwise imaged, and at least one region is exposed to radiation. After the imaging, the film is baked, wherein at least one exposed region is rendered substantially soluble. After the baking, the film is developed, wherein a relief pattern remains. The relief pattern is exposed to radiation. The relief pattern is baked. The relief pattern is cured. A chemically amplified positive-tone photopatternable blend is also described.
摘要:
Fabricating an integrated circuit using a cap layer that includes one or more gaps or voids. The gaps or voids are provided prior to performing deposition and cure for an inter-layer dielectric (ILD) layer adjoining the cap layer. The gaps or voids reduce and prevent tensile stress buildup by allowing for stress relaxation, hence preventing catastrophic failure of the integrated circuit.
摘要:
The present invention relates to ultra-large scale integrated (ULSI) interconnect structures, and more particularly to patternable low dielectric constant (low-k) materials suitable for use in ULSI interconnect structures. The patternable low-k dielectrics disclosed herein are functionalized polymers that having one or more acid-sensitive imageable functional groups.
摘要:
A negative resist composition, comprising: (a) silicon-containing polymer with pendant fused moieties selected from the group consisting of fused aliphatic moieties, homocyclic fused aromatic moieties, and heterocyclic fused aromatic and sites for reaction with a crosslinking agent, (b) an acid-sensitive crosslinking agent, and (c) a radiation-sensitive acid generator is provided. The resist composition is used to form a patterned material layer in a substrate.
摘要:
Interconnect structures are provided including at least one patterned dielectric layer located on a substrate, wherein said at least one patterned dielectric layer includes differently sized conductive features embedded therein. The differently sized conductive features are laterally adjacent to each other and are located at a same interconnect level.
摘要:
Methods for producing air gap-containing metal-insulator interconnect structures for VLSI and ULSI devices using a photo-patternable low k material as well as the air gap-containing interconnect structure that is formed are disclosed. More particularly, the methods described herein provide interconnect structures built in a photo-patternable low k material in which air gaps of different depths are defined by photolithography in the photo-patternable low k material. In the methods of the present invention, no etch step is required to form the air gaps. Since no etch step is required in forming the air gaps within the photo-patternable low k material, the methods disclosed in this invention provide highly reliable interconnect structures.
摘要:
The present disclosure relates to a structure comprising 1. an electrically conductive substrate having carbon nanotubes grown thereon; 2. a cured polymeric fill matrix comprising at least one latent photoacid generator embedded around the carbon nanotubes but allowing tips of the carbon nanotubes to be exposed; 3. a layer of patterned and cured photosensitive dielectric material on the cured polymeric fill matrix, wherein tips of the carbon nanotubes are exposed within the patterns; and 4. an electrically conductive material filled into the interconnect pattern and in contact with the exposed tips of the carbon nanotubes; and to methods of making the structure and using the structure to measure the electrical characteristics of carbon nanotubes.
摘要:
Graphene or carbon nanotube-based transistor devices and techniques for the fabrication thereof are provided. In one aspect, a transistor is provided. The transistor includes a substrate; a carbon-based material on the substrate, wherein a portion of the carbon-based material serves as a channel region of the transistor and other portions of the carbon-based material serve as source and drain regions of the transistor; a patterned organic buffer layer over the portion of the carbon-based material that serves as the channel region of the transistor; a conformal high-k gate dielectric layer disposed selectively on the patterned organic buffer layer; metal source and drain contacts formed on the portions of the carbon-based material that serve as the source and drain regions of the transistor; and a metal top-gate contact formed on the high-k gate dielectric layer.
摘要:
An interconnect structure and methods for making the same include sidewall portions of an interlevel dielectric layer. The sidewall portions have a width less than a minimum feature size for a given lithographic technology and the width is formed by a thickness of the interlevel dielectric layer when conformally formed on vertical surfaces of a mandrel. The sidewall portions form spaced-apart openings. Conductive structures fill the spaced-apart openings and are separated by the sidewall portions to form single damascene structures.