公开(公告)号：US20170317106A1

公开(公告)日：2017-11-02

申请号：US15361937

申请日：2016-11-28

Applicant: STMicroelectronics (Rousset) SAS ,  STMicroelectronics (Crolles 2) SAS

Inventor： Philippe Boivin ,  Franck Arnaud ,  Gregory Bidal ,  Dominique Golanski ,  Emmanuel Richard

IPC: H01L27/12 ,  H01L29/06 ,  H01L29/08 ,  H01L29/49

CPC classification number: H01L27/1207 ,  H01L29/0653 ,  H01L29/0847 ,  H01L29/4916

Abstract: An integrated circuit is formed using a substrate of a silicon-on-insulator type that includes a carrier substrate and a stack of a buried insulating layer and a semiconductor film on the carrier substrate. A first region without the stack separates a second region that includes the stack from a third region that also includes the stack. An MOS transistor has a gate dielectric region formed by a portion of the buried insulating layer in the second region and a gate region formed by a portion of the semiconductor film in the second region. The carrier substrate incorporates doped regions under the first region which form at least a part of a source region and drain region of the MOS transistor.

公开(公告)号：US20170299651A1

公开(公告)日：2017-10-19

申请号：US15378663

申请日：2016-12-14

Applicant: STMicroelectronics (Crolles 2) SAS

Inventor： Sylvain Clerc

IPC: G01R31/28

CPC classification number: G01R31/2882 ,  G01R31/3016 ,  G01R31/31725 ,  H03K5/133 ,  H03K19/00369

Abstract: A device for monitoring a critical path of an integrated circuit includes a replica of the critical path formed by sequential elements mutually separated by delay circuits that are programmable though a corresponding main multiplexer. A control circuit controls delay selections made by each main multiplexer. A sequencing module operates to sequence each sequential element using a main clock signal by delivering, in response to a main clock signal, respectively to the sequential elements, secondary clock signals that are mutually time shifted in such a manner as to take into account the propagation time inherent to the main multiplexer.

公开(公告)号：US09793321B2

公开(公告)日：2017-10-17

申请号：US14970347

申请日：2015-12-15

Applicant: STMicroelectronics (Crolles 2) SAS ,  STMicroelectronics (Rousset) SAS

Inventor： Philippe Boivin ,  Simon Jeannot

IPC: H01L45/00 ,  H01L27/24 ,  G11C13/00

CPC classification number: H01L27/2436 ,  G11C13/0004 ,  G11C2213/79 ,  G11C2213/82 ,  H01L27/2463 ,  H01L45/04 ,  H01L45/085 ,  H01L45/1226 ,  H01L45/146 ,  H01L45/147 ,  H01L45/1666

Abstract: The disclosure relates to a memory cell formed in a wafer comprising a semiconductor substrate covered with a first insulating layer, the insulating layer being covered with an active layer made of a semiconductor, the memory cell comprising a selection transistor having a control gate and a first conduction terminal connected to a variable-resistance element, the gate being formed on the active layer and having a lateral flank covered with a second insulating layer, the variable-resistance element being formed by a layer of variable-resistance material, deposited on a lateral flank of the active layer in a first trench formed through the active layer along the lateral flank of the gate, a trench conductor being formed in the first trench against a lateral flank of the layer of variable-resistance material.

公开(公告)号：US09791346B1

公开(公告)日：2017-10-17

申请号：US15133614

申请日：2016-04-20

Applicant: STMICROELECTRONICS SA ,  STMICROELECTRONICS (CROLLES 2) SAS

Inventor： Jean-Francois Carpentier ,  Patrick Lemaitre ,  Jean-Robert Manouvrier ,  Charles Baudot ,  Bertrand Borot

IPC: G01B9/00 ,  G01M11/02 ,  G02B6/28 ,  G02B6/34 ,  G02B6/12

CPC classification number: G01M11/02 ,  G01R31/2656 ,  G01R31/27 ,  G01R31/2884 ,  G01R31/303 ,  G01R31/311 ,  G01R31/31728 ,  G01R35/00 ,  G02B6/00 ,  G02B6/12004 ,  G02B6/2808 ,  G02B6/34

Abstract: A semiconductor device may include a semiconductor wafer, and a reference circuit carried by the semiconductor wafer. The reference circuit may include optical DUTs, a first set of photodetectors coupled to outputs of the optical DUTs, an optical splitter coupled to inputs of the optical DUTs, and a second set of photodetectors coupled to the optical splitter. The optical splitter is to be coupled to an optical source and configured to transmit a reference optical signal to the first set of photodetectors via the optical DUTs and the second set of photodetectors.

公开(公告)号：US09759546B2

公开(公告)日：2017-09-12

申请号：US14442081

申请日：2013-09-19

Applicant: SOITEC ,  STMICROELECTRONICS (CROLLES 2) SAS

Inventor： Oleg Kononchuk ,  Didier Dutartre

IPC: G01B11/28 ,  G01B11/06 ,  G01B11/30 ,  H01L21/66 ,  G02B21/36

CPC classification number: G01B11/06 ,  G01B11/0633 ,  G01B11/30 ,  G02B21/361 ,  H01L22/12

Abstract: The invention relates to a method for measuring thickness variations in a layer of a multilayer semiconductor structure, characterized in that it comprises: acquiring, via an image acquisition system, at least one image of the surface of the structure, the image being obtained by reflecting an almost monochromatic light flux from the surface of the structure; and processing the at least one acquired image in order to determine, from variations in the intensity of the light reflected from the surface, variations in the thickness of the layer to be measured, and in that the wavelength of the almost monochromatic light flux is chosen to correspond to a minimum of the sensitivity of the reflectivity of a layer of the structure other than the layer the thickness variations of which must be measured, the sensitivity of the reflectivity of a layer being equal to the ratio of: the difference between the reflectivities of two multilayer structures for which the layer in question has a given thickness difference; to the given thickness difference, the thicknesses of the other layers being for their part identical in the two multilayer structures. The invention also relates to a measuring system implementing the method.

公开(公告)号：US09711550B2

公开(公告)日：2017-07-18

申请号：US14840680

申请日：2015-08-31

Applicant: STMicroelectronics SA ,  STMicroelectronics (Crolles 2) SAS

Inventor： Laurent Favennec ,  Didier Dutartre ,  Francois Roy

IPC: H01L27/146 ,  H01L31/11 ,  H01L31/18

CPC classification number: H01L27/1462 ,  H01L27/1461 ,  H01L27/14612 ,  H01L27/1463 ,  H01L27/14685 ,  H01L27/14689 ,  H01L31/11 ,  H01L31/1804 ,  Y02E10/547 ,  Y02P70/521

Abstract: A method of manufacturing a pinned photodiode, including: forming a region of photon conversion into electric charges of a first conductivity type on a substrate of the second conductivity type; coating said region with a layer of a heavily-doped insulator of the second conductivity type; and annealing to ensure a dopant diffusion from the heavily-doped insulator layer.

公开(公告)号：US09698707B2

公开(公告)日：2017-07-04

申请号：US14455110

申请日：2014-08-08

Applicant: STMicroelectronics (Crolles 2) SAS ,  Commissariat A L'Energie Atomique et aux Energies Alternatives

Inventor： Stephane Monfray ,  Arthur Arnaud ,  Thomas Skotnicki ,  Onoriu Puscasu ,  Sebastien Boisseau

IPC: H02K11/00 ,  H02N10/00 ,  F03G7/06 ,  H02N1/08 ,  H02N2/18

CPC classification number: H02N10/00 ,  F03G7/06 ,  H02N1/08 ,  H02N2/18 ,  Y10T29/4913

Abstract: A device for converting thermal power into electric power includes many conversion cells arranged inside and on top of a substrate. Each conversion cell includes a curved bimetal strip and first and second diodes coupled to the bimetal strip. The diodes are arranged in a semiconductor region of the substrate.

公开(公告)号：US09691871B1

公开(公告)日：2017-06-27

申请号：US14973825

申请日：2015-12-18

Applicant: STMicroelectronics (Crolles 2) SAS ,  STMicroelectronics SA

Inventor： Pierre Caubet ,  Florian Domengie ,  Carlos Augusto Suarez Segovia ,  Aurelie Bajolet ,  Onintza Ros Bengoechea

IPC: H01L21/76 ,  H01L29/49 ,  H01L29/40

CPC classification number: H01L21/28088 ,  H01L29/4966

Abstract: Local variability of the grain size of work function metal, as well as its crystal orientation, induces a variable work function and local variability of transistor threshold voltage. If the metal nitride for the work function metal of the transistor gate is deposited using a radio frequency physical vapor deposition, equiaxed grains are produced. The substantially equiaxed structure for the metal nitride work function metal layer (such as with TiN) reduces local variability in threshold voltage.

公开(公告)号：US20170179035A1

公开(公告)日：2017-06-22

申请号：US15447410

申请日：2017-03-02

Applicant: STMicroelectronics (Crolles 2) SAS ,  Commissarial A L'Energie Atomique et Aux Energies Alternatives

Inventor： Maurice Rivoire ,  Viorel Balan

IPC: H01L23/532 ,  H01L25/065 ,  H01L23/522 ,  H01L21/768 ,  H01L21/306

CPC classification number: H01L23/53238 ,  H01L21/30625 ,  H01L21/3212 ,  H01L21/7684 ,  H01L21/76843 ,  H01L21/76849 ,  H01L21/76877 ,  H01L23/5226 ,  H01L24/00 ,  H01L24/03 ,  H01L24/05 ,  H01L24/06 ,  H01L24/08 ,  H01L24/80 ,  H01L25/0657 ,  H01L25/50 ,  H01L2224/03845 ,  H01L2224/05026 ,  H01L2224/05147 ,  H01L2224/05571 ,  H01L2224/05573 ,  H01L2224/05666 ,  H01L2224/0568 ,  H01L2224/05681 ,  H01L2224/05686 ,  H01L2224/08121 ,  H01L2224/08146 ,  H01L2224/80895 ,  H01L2225/06513 ,  H01L2225/06541 ,  H01L2225/06544 ,  H01L2924/00012 ,  H01L2924/00014

Abstract: A structure includes a substrate having an upper surface provided with recesses and coated with a continuous barrier layer topped with a continuous copper layer filling at least the recesses. The structure is planarized by a chemical-mechanical polishing of the copper, such a polishing being selective with respect to the barrier layer so that copper remains in the recesses and is coplanar with the upper surface of the substrate. Two such structures are then direct bonded to each other (copper to copper) with opposite areas having a same topology.

公开(公告)号：US20170169696A1

公开(公告)日：2017-06-15

申请号：US15139500

申请日：2016-04-27

Applicant: STMicroelectronics (Crolles 2) SAS

Inventor： Stephane Monfray ,  Christophe Maitre ,  Thomas Skotnicki

IPC: G08B21/18 ,  G01K1/02 ,  H01L41/113

CPC classification number: G08B21/182 ,  G01D21/00 ,  G01K1/024 ,  G01K5/72 ,  G01P15/02 ,  H01L41/113 ,  H02N2/18

Abstract: A detector of an event includes an electrical energy generator formed by a flexible piezoelectric element with a weight fastened to the flexible piezoelectric element that is biased with the weight in a position with the piezoelectric element flexed. In response to detection of the event, a trigger releases the weight so as to cause a vibration of the piezoelectric element. This vibration is converted by the flexible piezoelectric element into electrical energy. An electronic system is power by the electrical energy and is operable to generate an electrical signal indicative of the detected event.