公开(公告)号：US20100012954A1

公开(公告)日：2010-01-21

申请号：US12191033

申请日：2008-08-13

申请人： Chen-Hua Yu ,  Chia-Lin Yu ,  Wen-Chih Chiou ,  Ding-Yuan Chen ,  Hung-Ta Lin

发明人： Chen-Hua Yu ,  Chia-Lin Yu ,  Wen-Chih Chiou ,  Ding-Yuan Chen ,  Hung-Ta Lin

IPC分类号： H01L33/00 ,  H01L21/00

CPC分类号： H01L33/382 ,  H01L33/007 ,  H01L33/0079 ,  H01L33/14 ,  H01L33/38 ,  H01L2933/0016

摘要： A light emitting diode (LED) device is presented. The LED device includes a substrate, a layered LED structure, and an embedded bottom electrode. The layered LED structure includes a buffer/nucleation layer disposed on the substrate, an active layer, and a top-side contact. A first-contact III-nitride layer is interposed between the buffer/nucleation layer and the active layer. A second-contact III-nitride layer is interposed between the active well layer and the top-side contact. A bottom electrode extends through the substrate, through the buffer/nucleation layer and terminates within the first-contact III-nitride layer.

摘要翻译： 提出了一种发光二极管（LED）装置。 LED器件包括衬底，层状LED结构和嵌入式底部电极。 分层LED结构包括设置在基板上的缓冲/成核层，有源层和顶侧接触。 第一接触III族氮化物层介于缓冲层/成核层与有源层之间。 第二接触III族氮化物层介于活性阱层和顶侧接触之间。 底部电极延伸通过衬底，通过缓冲/成核层并终止于第一接触III族氮化物层内。

公开(公告)号：US20100001375A1

公开(公告)日：2010-01-07

申请号：US12166034

申请日：2008-07-01

申请人： Chen-Hua Yu ,  Ding-Yuan Chen

发明人： Chen-Hua Yu ,  Ding-Yuan Chen

IPC分类号： H01L29/04

CPC分类号： H01L27/156 ,  H01L31/0304 ,  H01L31/1035 ,  H01L33/007 ,  H01L33/20

摘要： A circuit structure includes a substrate and a film over the substrate and including a plurality of portions allocated as a plurality of rows. Each of the plurality of rows of the plurality of portions includes a plurality of convex portions and a plurality of concave portions. In each of the plurality of rows, the plurality of convex portions and the plurality of concave portions are allocated in an alternating pattern.

摘要翻译： 电路结构包括衬底和衬底上的膜，并且包括分配为多行的多个部分。 多个部分的多行中的每一个包括多个凸部和多个凹部。 在多行中的每一行中，以交替图案分配多个凸部和多个凹部。

公开(公告)号：US20090289097A1

公开(公告)日：2009-11-26

申请号：US12124844

申请日：2008-05-21

申请人： Weng-Jin Wu ,  Wen-Chih Chiou ,  Chen-Hua Yu

发明人： Weng-Jin Wu ,  Wen-Chih Chiou ,  Chen-Hua Yu

IPC分类号： B23K1/00

CPC分类号： H01L21/67092 ,  H01L24/75 ,  H01L24/83 ,  H01L24/95 ,  H01L2224/75 ,  H01L2224/75315 ,  H01L2224/7598 ,  H01L2224/81001 ,  H01L2224/81005 ,  H01L2224/81894 ,  H01L2224/83801 ,  H01L2224/83894 ,  H01L2924/01006 ,  H01L2924/01013 ,  H01L2924/01029 ,  H01L2924/01033 ,  H01L2924/01076 ,  H01L2924/14 ,  H01L2924/181 ,  H01L2924/00

摘要： A leveling-bonding method and an apparatus for performing the same are provided. The method includes providing a bond support for supporting a wafer; providing a bond head over the bond support; dispatching a foil over the wafer; placing the wafer on the bond support; and using the bond support and the bond head to apply a force on the foil and the wafer.

摘要翻译： 提供了一种调平方法及其执行装置。 该方法包括提供用于支撑晶片的接合支撑件; 在债券支持上提供债券头; 在晶片上调度箔片; 将晶片放置在粘合支撑件上; 并且使用粘合支撑件和结合头在箔和晶片上施加力。

公开(公告)号：US20090278196A1

公开(公告)日：2009-11-12

申请号：US12116074

申请日：2008-05-06

申请人： Cheng-Hung Chang ,  Chen-Hua Yu ,  Chen-Nan Yeh

发明人： Cheng-Hung Chang ,  Chen-Hua Yu ,  Chen-Nan Yeh

IPC分类号： H01L29/00 ,  H01L21/76

CPC分类号： H01L29/1083 ,  H01L21/823412 ,  H01L21/823431 ,  H01L21/823481 ,  H01L27/088 ,  H01L27/1203 ,  H01L27/1207 ,  H01L29/0653 ,  H01L29/7843 ,  H01L29/7851

摘要： A semiconductor structure includes a semiconductor substrate; a planar transistor on a first portion of the semiconductor substrate, wherein the first portion of the semiconductor substrate has a first top surface; and a multiple-gate transistor on a second portion of the semiconductor substrate. The second portion of the semiconductor substrate is recessed from the first top surface to form a fin of the multiple-gate transistor. The fin is electrically isolated from the semiconductor substrate by an insulator.

摘要翻译： 半导体结构包括半导体衬底; 在所述半导体衬底的第一部分上的平面晶体管，其中所述半导体衬底的所述第一部分具有第一顶表面; 以及在半导体衬底的第二部分上的多栅极晶体管。 半导体衬底的第二部分从第一顶表面凹入以形成多栅晶体管的鳍。 翅片通过绝缘体与半导体衬底电隔离。

公开(公告)号：US20090261363A1

公开(公告)日：2009-10-22

申请号：US12127607

申请日：2008-05-27

申请人： Ding-Yuan Chen ,  Chen-Hua Yu

发明人： Ding-Yuan Chen ,  Chen-Hua Yu

IPC分类号： H01L33/00

CPC分类号： H01L33/007 ,  H01L21/02381 ,  H01L21/0243 ,  H01L21/02433 ,  H01L21/0254 ,  H01L21/02639 ,  H01L33/12

摘要： A semiconductor device includes a silicon substrate; silicon faceted structures formed on a top surface of the silicon substrate; and a group-III nitride layer over the silicon faceted structures. The silicon faceted structures are separated from each other, and have a repeated pattern.

摘要翻译： 半导体器件包括硅衬底; 形成在硅衬底的顶表面上的硅刻面结构; 以及在硅刻面结构上的III族氮化物层。 硅分面结构彼此分离，并且具有重复的图案。

公开(公告)号：US20090261346A1

公开(公告)日：2009-10-22

申请号：US12127569

申请日：2008-05-27

申请人： Ding-Yuan Chen ,  Chen-Hua Yu

发明人： Ding-Yuan Chen ,  Chen-Hua Yu

IPC分类号： H01L27/15 ,  H01L33/00

CPC分类号： H01L21/8258 ,  H01L21/76283 ,  H01L27/15 ,  H01L29/045 ,  H01L29/267 ,  H01L29/7787

摘要： An integrated circuit structure includes a semiconductor substrate having a first surface region and a second surface region, wherein the first surface region and the second surface region have different surface orientations; a semiconductor device formed at a surface of the first surface region; and a group-III nitride layer over the second surface region, wherein the group-III nitride layer does not extend over the first surface region.

摘要翻译： 集成电路结构包括具有第一表面区域和第二表面区域的半导体衬底，其中第一表面区域和第二表面区域具有不同的表面取向; 形成在所述第一表面区域的表面的半导体器件; 以及在所述第二表面区域上的III族氮化物层，其中所述III族氮化物层不在所述第一表面区域上延伸。

公开(公告)号：US20090253266A1

公开(公告)日：2009-10-08

申请号：US12484911

申请日：2009-06-15

申请人： Chen-Hua Yu ,  Chen-Nan Yeh ,  Yu-Rung Hsu

发明人： Chen-Hua Yu ,  Chen-Nan Yeh ,  Yu-Rung Hsu

IPC分类号： H01L21/302

CPC分类号： H01L29/7851 ,  H01L29/66795

摘要： A semiconductor device having multiple fin heights is provided. Multiple fin heights are provided by using multiple masks to recess a dielectric layer within a trench formed in a substrate. In another embodiment, an implant mold or e-beam lithography are utilized to form a pattern of trenches in a photoresist material. Subsequent etching steps form corresponding trenches in the underlying substrate. In yet another embodiment, multiple masking layers are used to etch trenches of different heights separately. A dielectric region may be formed along the bottom of the trenches to isolate the fins by performing an ion implant and a subsequent anneal.

摘要翻译： 提供具有多个翅片高度的半导体器件。 通过使用多个掩模来在形成在衬底中的沟槽内凹入电介质层来提供多个翅片高度。 在另一个实施例中，使用植入模具或电子束光刻来形成光致抗蚀剂材料中的沟槽图案。 随后的蚀刻步骤在下面的衬底中形成对应的沟槽。 在另一个实施例中，使用多个掩模层来分别蚀刻不同高度的沟槽。 可以沿着沟槽的底部形成电介质区域，以通过执行离子注入和随后的退火来隔离散热片。

公开(公告)号：US20090250769A1

公开(公告)日：2009-10-08

申请号：US12484900

申请日：2009-06-15

申请人： Chen-Hua Yu ,  Chen-Nan Yeh ,  Yu-Rung Hsu

发明人： Chen-Hua Yu ,  Chen-Nan Yeh ,  Yu-Rung Hsu

IPC分类号： H01L29/78 ,  H01L27/088

CPC分类号： H01L29/7851 ,  H01L29/66795

摘要： A semiconductor device having multiple fin heights is provided. Multiple fin heights are provided by using multiple masks to recess a dielectric layer within a trench formed in a substrate. In another embodiment, an implant mold or e-beam lithography are utilized to form a pattern of trenches in a photoresist material. Subsequent etching steps form corresponding trenches in the underlying substrate. In yet another embodiment, multiple masking layers are used to etch trenches of different heights separately. A dielectric region may be formed along the bottom of the trenches to isolate the fins by performing an ion implant and a subsequent anneal.

公开(公告)号：US07588995B2

公开(公告)日：2009-09-15

申请号：US11273701

申请日：2005-11-14

申请人： Chen-Hua Yu ,  Ching-Ya Wang

发明人： Chen-Hua Yu ,  Ching-Ya Wang

IPC分类号： H01L21/76 ,  H01L21/31

CPC分类号： H01L21/3105 ,  H01L21/02126 ,  H01L21/02203 ,  H01L21/02271 ,  H01L21/02282 ,  H01L21/02348 ,  H01L21/02351 ,  H01L21/31695 ,  H01L21/76802 ,  H01L21/76826 ,  Y10S438/96

摘要： Low dielectric constant dielectric films having a high degree of porosity suffer from poor mechanical strength and can be damaged during processing steps. Damage can be substantially eliminated or minimized by stuffing the pores of the dielectric film with a material that substantially fills the pores. The stuffing material should have low surface tension and viscosity to provide good wetting. Alternatively, the stuffing material can be dissolved in a wetting carrier fluid, such as supercritical carbon dioxide and the like.

摘要翻译： 具有高孔隙率的低介电常数电介质膜具有差的机械强度并且在加工步骤期间可能被损坏。 通过用基本上填充孔的材料填充电介质膜的孔隙可以基本消除或最小化损伤。 填料应具有较低的表面张力和粘度，以提供良好的润湿性。 或者，填充材料可以溶解在润​​湿载体流体中，例如超临界二氧化碳等。

公开(公告)号：US20090224405A1

公开(公告)日：2009-09-10

申请号：US12044008

申请日：2008-03-07

申请人： Wen-Chih Chiou ,  Chen-Hua Yu ,  Weng-Jin Wu ,  Jung-Chih Hu

发明人： Wen-Chih Chiou ,  Chen-Hua Yu ,  Weng-Jin Wu ,  Jung-Chih Hu

IPC分类号： H01L23/48 ,  H01L21/44

CPC分类号： H01L23/481 ,  H01L21/76898 ,  H01L25/50 ,  H01L2225/06513 ,  H01L2225/06541 ,  H01L2924/0002 ,  H01L2924/3011 ,  H01L2924/00

摘要： A through via process is performed on a semiconductor substrate with a contact plug formed in an interlayer dielectric (ILD), and then a via plug is formed in the ILD layer to extend through a portion of the semiconductor substrate, followed forming an interconnection structure electrically connected with the contact plug and the via plug.

摘要翻译： 在具有形成在层间电介质（ILD）中的接触插塞的半导体衬底上进行通孔工艺，然后在ILD层中形成通孔以延伸穿过半导体衬底的一部分，然后电连接形成互连结构 与接触插头和通孔插头连接。