PRINTED CIRCUIT BOARD
    151.
    发明申请
    PRINTED CIRCUIT BOARD 有权
    印刷电路板

    公开(公告)号:US20120111623A1

    公开(公告)日:2012-05-10

    申请号:US13351108

    申请日:2012-01-16

    Abstract: A printed circuit board is disclosed. The printed circuit board comprises a substrate having a top surface and a bottom surface. A ground plane is on the bottom surface. A signal trace is on the top surface along a first direction. At least two isolated power planes are on the top surface adjacent to opposite sides of the signal trace, respectively. A conductive connection along a second direction couples to the two power planes, across the signal trace without electrically connecting to the signal trace, wherein the signal trace doesn't pass over any split of the ground plane.

    Abstract translation: 公开了印刷电路板。 印刷电路板包括具有顶表面和底表面的基底。 地平面位于底面。 信号迹线沿着第一方向在顶表面上。 至少两个隔离的电源平面分别位于与信号迹线的相对侧相邻的顶表面上。 沿着第二方向的导电连接在信号迹线上耦合到两个电源层,而不与电信号迹线电连接,其中信号迹线不经过接地层的任何分裂。

    Dielectric structure, transistor and manufacturing method thereof
    153.
    发明申请
    Dielectric structure, transistor and manufacturing method thereof 审中-公开
    介电结构,晶体管及其制造方法

    公开(公告)号:US20120080760A1

    公开(公告)日:2012-04-05

    申请号:US12928547

    申请日:2010-12-13

    Abstract: The present invention discloses a dielectric structure, a transistor and a manufacturing method thereof with praseodymium oxide. The transistor with praseodymium oxide comprises at least a III-V substrate, a gate dielectric layer and a gate. The gate dielectric layer is disposed on the III-V substrate, and the gate is disposed on the gate dielectric layer, and the gate dielectric layer is praseodymium oxide (PrxOy), which has a high dielectric constant and a high band gap. By using the praseodymium oxide (Pr6O11) as the material of the gate dielectric layer in the present invention, the leakage current could be inhibited, and the equivalent oxide thickness (EOT) of the device with the III-V substrate could be further lowered.

    Abstract translation: 本发明公开了一种具有氧化镨的介电结构,晶体管及其制造方法。 具有氧化镨的晶体管至少包括III-V衬底,栅极电介质层和栅极。 栅极电介质层设置在III-V衬底上,并且栅极设置在栅极介电层上,并且栅极电介质层是具有高介电常数和高带隙的氧化镨(PrxOy)。 通过在本发明中使用氧化镨(Pr 6 O 11)作为栅极介质层的材料,可以抑制漏电流,并且可以进一步降低与III-V衬底的器件的等效氧化物厚度(EOT)。

    III-V METAL-OXIDE-SEMICONDUCTOR DEVICE
    154.
    发明申请
    III-V METAL-OXIDE-SEMICONDUCTOR DEVICE 审中-公开
    III-V金属氧化物半导体器件

    公开(公告)号:US20120032279A1

    公开(公告)日:2012-02-09

    申请号:US12849025

    申请日:2010-08-03

    CPC classification number: H01L29/94 H01L29/201 H01L29/517

    Abstract: A barrier layer, hafnium oxide layer, between a III-V semiconductor layer and an lanthanum oxide layer is used to prevent interaction between the III-V semiconductor layer and the lanthanum oxide layer. Meanwhile, the high dielectric constant of the lanthanum oxide can be used to increase the capacitance of the semiconductor device.

    Abstract translation: 使用III-V族半导体层和氧化镧层之间的阻挡层,氧化铪层,以防止III-V族半导体层与氧化镧层之间的相互作用。 同时,可以使用氧化镧的高介电常数来增加半导体器件的电容。

    APPARATUS AND METHOD FOR SURFACE PROCESSING
    155.
    发明申请
    APPARATUS AND METHOD FOR SURFACE PROCESSING 审中-公开
    用于表面处理的装置和方法

    公开(公告)号:US20110305846A1

    公开(公告)日:2011-12-15

    申请号:US12885018

    申请日:2010-09-17

    Abstract: The present disclosure provides a surface processing apparatus, comprising a reaction chamber provided to form a deposition layer on a substrate, a carrying chamber connected to the reaction chamber and comprising a slot, and a plasma generator installed in the slot and providing plasma to process the substrate surface. Whereby the disclosure further provides a surface processing method, which flatten surface of a deposition layer on the substrate when the substrate is carried form the reaction chamber to the carrying chamber after the deposition process in the reaction chamber.

    Abstract translation: 本公开提供了一种表面处理装置,其包括设置成在基板上形成沉积层的反应室,连接到反应室并包括槽的承载室和安装在槽中的等离子体发生器,并提供等离子体以处理 基材表面。 因此,本公开进一步提供了一种表面处理方法,当在反应室中沉积工艺之后,当衬底被承载形成反应室至承载室时,使衬底上的沉积层的表面变平。

    CHARGING APPARATUS FOR LAPTOP COMPUTER WITH MULTI-BATTERIES AND METHOD FOR THE SAME
    156.
    发明申请
    CHARGING APPARATUS FOR LAPTOP COMPUTER WITH MULTI-BATTERIES AND METHOD FOR THE SAME 有权
    用于具有多个电池的膝上型计算机的充电装置及其相关方法

    公开(公告)号:US20110241620A1

    公开(公告)日:2011-10-06

    申请号:US12750824

    申请日:2010-03-31

    CPC classification number: H02J7/0018 H02J7/0022 Y10T307/50 Y10T307/625

    Abstract: A charging apparatus for laptop computer with multiple-batteries is used in a first battery unit and a second battery unit. The charging apparatus comprises a micro controller unit; a first charging switch unit electrically connected to the micro controller unit; a second charging switch unit electrically connected to the micro controller unit; and a charging unit electrically connected to the first charging switch unit and the second charging switch unit. The micro controller unit controls the charging unit charging the first battery unit and the second battery unit via controlling the first charging switch unit and the second charging switch unit. The charging apparatus charges multi-batteries simultaneously.

    Abstract translation: 在第一电池单元和第二电池单元中使用具有多个电池的膝上型计算机的充电装置。 充电装置包括微控制器单元; 电连接到微控制器单元的第一充电开关单元; 电连接到微控制器单元的第二充电开关单元; 以及与第一充电开关单元和第二充电开关单元电连接的充电单元。 微型控制器单元通过控制第一充电开关单元和第二充电开关单元来控制充电单元对第一电池单元和第二电池单元充电。 充电装置同时对多个电池充电。

    METHOD OF MAKING A FINFET, AND FINFET FORMED BY THE METHOD
    157.
    发明申请
    METHOD OF MAKING A FINFET, AND FINFET FORMED BY THE METHOD 有权
    制造FINFET的方法和由该方法形成的FINFET

    公开(公告)号:US20110227162A1

    公开(公告)日:2011-09-22

    申请号:US12725554

    申请日:2010-03-17

    Abstract: A method includes forming first and second fins of a finFET extending above a semiconductor substrate, with a shallow trench isolation (STI) region in between, and a distance between a top surface of the STI region and top surfaces of the first and second fins. First and second fin extensions are provided on top and side surfaces of the first and second fins above the top surface of the STI region. Material is removed from the STI region, to increase the distance between the top surface of the STI region and top surfaces of the first and second fins. A conformal stressor dielectric material is deposited over the fins and STI region. The conformal dielectric stressor material is reflowed, to flow into a space between the first and second fins above a top surface of the STI region, to apply stress to a channel of the finFET.

    Abstract translation: 一种方法包括形成在半导体衬底之上延伸的finFET的第一和第二鳍片,其间具有浅沟槽隔离(STI)区域,以及STI区域的顶表面与第一鳍片和第二鳍片的顶表面之间的距离。 第一和第二鳍片延伸部分设置在STI区域顶表面上方的第一和第二鳍片的顶表面和侧表面上。 从STI区域去除材料,以增加STI区域的顶表面与第一和第二鳍片的顶表面之间的距离。 保形应力源电介质材料沉积在鳍片和STI区域上。 共形介电应力材料被回流,以流入STI区域的顶表面之上的第一和第二鳍片之间的空间,以向finFET的沟道施加应力。

    Electrical connector
    159.
    发明授权
    Electrical connector 失效
    电连接器

    公开(公告)号:US07997920B1

    公开(公告)日:2011-08-16

    申请号:US12833813

    申请日:2010-07-09

    CPC classification number: H01R13/6275

    Abstract: An electrical connector includes a plug connector, a receptacle connector and a locking element. The plug connector includes an insulating housing, a plurality of terminals mounted into the insulating housing, a shell wrapping the insulating housing. The locking element fixed on the plug connector has a top plate, two opposite sides of the top plate are extended downwards to form a pair of locking plates. A front side of the locking element is extended perpendicularly and outwardly to form at least one connecting arm. A top side of the connecting arm is extended frontward to form a locking arm. The locking arm has a front end extended perpendicularly to form a locking end. When the plug connector is inserted into the receptacle connector, the locking element hooks locking potions provided by the receptacle connector to ensure the connection stability between the plug connector and the receptacle connector.

    Abstract translation: 电连接器包括插头连接器,插座连接器和锁定元件。 插头连接器包括绝缘壳体,安装在绝缘壳体中的多个端子,壳体包覆绝缘壳体。 固定在插头连接器上的锁定元件具有顶板,顶板的两个相对侧向下延伸以形成一对锁定板。 锁定元件的前侧垂直向外延伸以形成至少一个连接臂。 连接臂的顶部向前延伸以形成锁定臂。 锁定臂具有垂直延伸的前端,以形成锁定端。 当插头连接器插入插座连接器时,锁定元件钩住由插座连接器提供的锁定部分,以确保插头连接器和插座连接器之间的连接稳定性。

    COMMUNICATION DEVICE AND METHOD FOR PROMPTING INCOMING EVENTS OF THE COMMUNICATION DEVICE
    160.
    发明申请
    COMMUNICATION DEVICE AND METHOD FOR PROMPTING INCOMING EVENTS OF THE COMMUNICATION DEVICE 审中-公开
    通信装置和通信装置的接收事件的方法

    公开(公告)号:US20110151894A1

    公开(公告)日:2011-06-23

    申请号:US12712383

    申请日:2010-02-25

    Applicant: CHIN-LIN YANG

    Inventor: CHIN-LIN YANG

    CPC classification number: H04M19/04 H04M1/72566 H04M1/72569 H04M2250/12

    Abstract: A communication device and method for prompting incoming events of the communication device are provided. The method monitors environment situation around the communication device when the communication device receives an incoming event, and determines an environment mode of the communication device according to the environment situation. The method further searches a storage system of the communication device for a prompt mode matching the environment mode, and prompts a user using the prompt mode so as to avoid urgent or important events.

    Abstract translation: 提供了一种用于提示通信设备的进入事件的通信设备和方法。 当通信装置接收到进入事件时,该方法监视通信装置周围的环境情况,并根据环境情况确定通信装置的环境模式。 该方法进一步搜索通信设备的存储系统以获得与环境模式匹配的提示模式,并且提示用户使用提示模式以避免紧急或重要的事件。

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