公开(公告)号：US08659934B2

公开(公告)日：2014-02-25

申请号：US13647543

申请日：2012-10-09

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Shunpei Yamazaki ,  Jun Koyama ,  Kiyoshi Kato

IPC: G11C11/24

CPC classification number: G11C7/12 ,  G11C11/24 ,  G11C11/405 ,  G11C2211/4016 ,  H01L27/0688 ,  H01L27/105 ,  H01L27/1108 ,  H01L27/11551 ,  H01L27/1156 ,  H01L27/1225

Abstract: An object is to provide a semiconductor device having a novel structure. A first wiring; a second wiring; a third wiring, a fourth wiring; a first transistor including a first gate electrode, a first source electrode, and a first drain electrode; a second transistor including a second gate electrode, a second source electrode, and a second drain electrode are included. The first transistor is provided over a substrate including a semiconductor material and a second transistor includes an oxide semiconductor layer.

公开(公告)号：US20140016407A1

公开(公告)日：2014-01-16

申请号：US14024769

申请日：2013-09-12

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Yusuke Sekine ,  Kiyoshi Kato

IPC: G11C11/40

CPC classification number: G11C11/40 ,  G11C5/063 ,  G11C5/147 ,  G11C7/00 ,  G11C11/405 ,  G11C11/4074 ,  G11C11/4076 ,  G11C11/5685 ,  G11C13/0007 ,  G11C13/003 ,  G11C13/0033 ,  G11C13/0064 ,  G11C13/0069 ,  G11C2211/4016 ,  G11C2213/79

Abstract: A semiconductor device with a novel structure is provided, in which the operation voltage is reduced or the storage capacity is increased by reducing variation in the threshold voltages of memory cells after writing. The semiconductor device includes a plurality of memory cells each including a transistor including an oxide semiconductor and a transistor including a material other than an oxide semiconductor, a driver circuit that drives the plurality of memory cells, and a potential generating circuit that generates a plurality of potentials supplied to the driver circuit. The driver circuit includes a data buffer, a writing circuit that writes one potential of the plurality of potentials into each of the plurality of memory cells as data, a reading circuit that reads the data written into the memory cells, and a verifying circuit that verifies whether the read data agrees with data held in the data buffer or not.

Abstract translation: 提供了一种具有新颖结构的半导体器件，其中通过减少写入之后存储器单元的阈值电压的变化来降低操作电压或者增加存储容量。 半导体器件包括多个存储单元，每个存储单元包括包括氧化物半导体的晶体管和包括除氧化物半导体之外的材料的晶体管，驱动多个存储单元的驱动电路，以及产生多个存储单元的电位产生电路 提供给驱动电路的电位。 驱动器电路包括数据缓冲器，将多个电位中的一个电位写入作为数据的多个存储单元中的每一个的写入电路，读取写入存储单元的数据的读取电路，以及验证电路 读数据是否与数据缓冲器中保存的数据一致。

公开(公告)号：US08587999B2

公开(公告)日：2013-11-19

申请号：US13672973

申请日：2012-11-09

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Shunpei Yamazaki ,  Jun Koyama ,  Kiyoshi Kato

IPC: G11C16/04 ,  G11C11/24

CPC classification number: H01L27/10805 ,  G11C5/063 ,  G11C11/403 ,  G11C11/405 ,  G11C16/02 ,  H01L27/11521 ,  H01L27/1156 ,  H01L27/1207 ,  H01L27/1225 ,  H01L28/60

Abstract: An object is to provide a semiconductor device with a novel structure in which stored data can be retained even when power is not supplied, and does not have a limitation on the number of times of writing operations. A semiconductor device includes a source-bit line, a first signal line, a second signal line, a word line, and a memory cell connected between the source-bit lines. The memory cell includes a first transistor, a second transistor, and a capacitor. The second transistor is formed including an oxide semiconductor material. A gate electrode of the first transistor, one of a source and drain electrodes, and one of electrodes of the capacitor are electrically connected to one another. The source-bit line and a source electrode of the first transistor are electrically connected to each other. Another source-bit line adjacent to the above source-bit line and a drain electrode of the first transistor are electrically connected to each other.

Abstract translation: 目的是提供一种具有新颖结构的半导体器件，其中即使在未提供电力的情况下也可以保留存储的数据，并且对写入操作的次数没有限制。 半导体器件包括源极线，第一信号线，第二信号线，字线和连接在源极线之间的存储单元。 存储单元包括第一晶体管，第二晶体管和电容器。 形成包括氧化物半导体材料的第二晶体管。 第一晶体管的栅极，源极和漏极之一以及电容器的电极中的一个彼此电连接。 第一晶体管的源极线和源电极彼此电连接。 与上述源极线相邻的另一个源极线和第一晶体管的漏极彼此电连接。

公开(公告)号：US08581631B2

公开(公告)日：2013-11-12

申请号：US13677351

申请日：2012-11-15

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Yutaka Shionoiri ,  Kiyoshi Kato ,  Munehiro Azami

IPC: G01R19/00

CPC classification number: H03F3/45179 ,  G01R19/00 ,  G11C7/062 ,  G11C11/4091 ,  G11C11/413 ,  G11C2207/063 ,  H03F3/45183 ,  H03F3/45188 ,  H03F2203/45396 ,  H03F2203/45506 ,  H03F2203/45546 ,  H03F2203/45551 ,  H03F2203/45702 ,  H03F2203/45726

Abstract: A sense amplifier according to the present invention for detecting a potential difference of signals input to a first input terminal and a second input terminal, includes a first means for applying voltages corresponding to threshold voltages of first and second transistors to gate-source voltages of the first and second transistors, and a second means for transferring signals input to the first and second input terminals to gates of the first and second transistors. In this case, a threshold variation of the first and second transistors is corrected.

公开(公告)号：US20130288619A1

公开(公告)日：2013-10-31

申请号：US13916666

申请日：2013-06-13

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Kiyoshi Kato ,  Jun Koyama

IPC: H04B1/40

CPC classification number: H01L29/78696 ,  G06K19/07749 ,  G06K19/07773 ,  H01L23/66 ,  H01L27/0688 ,  H01L27/1225 ,  H01L29/1033 ,  H01L29/7869 ,  H01L2223/6677 ,  H04B1/40 ,  Y02D70/00

Abstract: An object is to achieve low power consumption and a long lifetime of a semiconductor device having a wireless communication function. The object can be achieved in such a manner that a battery serving as a power supply source and a specific circuit are electrically connected to each other through a transistor in which a channel formation region is formed using an oxide semiconductor. The hydrogen concentration of the oxide semiconductor is lower than or equal to 5×1019 (atoms/cm3). Therefore, leakage current of the transistor can be reduced. As a result, power consumption of the semiconductor device in a standby state can be reduced. Further, the semiconductor device can have a long lifetime.

Abstract translation: 目的是实现具有无线通信功能的半导体器件的低功耗和长寿命。 可以通过使用氧化物半导体形成沟道形成区域的晶体管将用作电源和特定电路的电池彼此电连接的方式实现目的。 氧化物半导体的氢浓度低于或等于5×1019（原子/ cm3）。 因此，可以减小晶体管的漏电流。 结果，可以降低处于待机状态的半导体器件的功耗。 此外，半导体器件可以具有长的寿命。

公开(公告)号：US08542004B2

公开(公告)日：2013-09-24

申请号：US13683863

申请日：2012-11-21

Applicant: Semiconductor Energy Laboratory Co. Ltd.

Inventor： Hiroki Inoue ,  Kiyoshi Kato ,  Takanori Matsuzaki ,  Shuhei Nagatsuka

IPC: G01R19/00

CPC classification number: G11C11/24 ,  G11C11/403 ,  G11C11/405 ,  H01L27/1052 ,  H01L27/11521 ,  H01L27/1225

Abstract: An object is to provide a semiconductor device with a novel structure in which stored data can be held even when power is not supplied, and the number of times of writing is not limited. The semiconductor device is formed using a wide gap semiconductor and includes a potential change circuit which selectively applies a potential either equal to or different from a potential of a bit line to a source line. Thus, power consumption of the semiconductor device can be sufficiently reduced.

Abstract translation: 目的在于提供具有新颖结构的半导体器件，其中即使在不提供电力的情况下也可以保持存储的数据，并且写入的次数不受限制。 半导体器件使用宽间隙半导体形成，并且包括电位改变电路，其选择性地将与位线的电位等于或不同的电位施加到源极线。 因此，可以充分降低半导体器件的功耗。

公开(公告)号：US20130222033A1

公开(公告)日：2013-08-29

申请号：US13854176

申请日：2013-04-01

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Kiyoshi Kato ,  Jun Koyama

IPC: H03K3/286

CPC classification number: H03K3/356104 ,  G11C7/04 ,  G11C14/0063 ,  G11C16/045 ,  G11C2211/4016 ,  H01L21/02554 ,  H01L21/02565 ,  H01L21/02631 ,  H01L21/28202 ,  H01L21/28211 ,  H01L27/105 ,  H01L27/1203 ,  H01L27/1225 ,  H01L29/6659 ,  H03K3/0375 ,  H03K3/286 ,  H03K3/356 ,  H03K3/356121 ,  H03K3/356173

Abstract: To provide a novel nonvolatile latch circuit and a semiconductor device using the nonvolatile latch circuit, a nonvolatile latch circuit includes a latch portion having a loop structure where an output of a first element is electrically connected to an input of a second element, and an output of the second element is electrically connected to an input of the first element; and a data holding portion for holding data of the latch portion. In the data holding portion, a transistor using an oxide semiconductor as a semiconductor material for forming a channel formation region is used as a switching element. In addition, an inverter electrically connected to a source electrode or a drain electrode of the transistor is included. With the transistor, data held in the latch portion can be written into a gate capacitor of the inverter or a capacitor which is separately provided.

Abstract translation: 为了提供使用非易失性锁存电路的新型非易失性锁存电路和半导体器件，非易失性锁存电路包括具有环形结构的锁存部分，其中第一元件的输出电连接到第二元件的输入端，输出端 的第二元件电连接到第一元件的输入端; 以及用于保持锁存部分的数据的数据保持部分。 在数据保持部分中，使用使用氧化物半导体作为形成沟道形成区域的半导体材料的晶体管作为开关元件。 此外，还包括与晶体管的源电极或漏电极电连接的反相器。 利用晶体管，保持在锁存部分中的数据可以写入逆变器的栅极电容器或单独提供的电容器。

公开(公告)号：US20130107645A1

公开(公告)日：2013-05-02

申请号：US13687013

申请日：2012-11-28

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Kiyoshi Kato

IPC: G11C7/24

CPC classification number: H01L27/1266 ,  G11C7/24 ,  G11C8/08 ,  G11C17/14 ,  G11C17/165 ,  G11C17/18 ,  G11C29/787 ,  G11C29/816 ,  G11C29/848 ,  H01L27/1214

Abstract: A write-once memory can be written only once to each memory cell; therefore, a defective bit cannot be detected by an actual inspection of writing. Accordingly, as described above, the measures, in which a redundant circuit is provided and the defective bit is modified before shipping, cannot be taken; thus, it is difficult to provide a memory with few defects. It is an object of the present invention to provide a write-once memory where the probability of a defect is reduced considerably. A nonvolatile memory that can be written only once includes a redundant memory cell, a first circuit which allocates an address to the redundant memory cell, a second circuit which outputs a determination signal that expresses whether writing is performed normally or not, and a third circuit, to which the determination signal is inputted, which controls the first circuit and the second circuit.

Abstract translation: 一次写入存储器只能写入每个存储单元一次; 因此，实际的写入检查不能检测到有缺陷的位。 因此，如上所述，不能采取在运输之前提供冗余电路和有缺陷的位被修改的措施; 因此难以提供缺少缺陷的记忆体。 本发明的一个目的是提供一种一次写入的存储器，其中缺陷的概率显着降低。 只能写入一次的非易失性存储器包括冗余存储单元，向冗余存储单元分配地址的第一电路，输出表示是否正常执行写入的确定信号的第二电路，以及第三电路 ，其中输入了确定信号，其控制第一电路和第二电路。

公开(公告)号：US12300752B2

公开(公告)日：2025-05-13

申请号：US16975309

申请日：2019-02-21

Applicant: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.

Inventor： Shunpei Yamazaki ,  Kiyoshi Kato ,  Tomoaki Atsumi ,  Shuhei Nagatsuka ,  Hitoshi Kunitake ,  Yoko Tsukamoto

IPC: H01L29/786 ,  H01L29/24 ,  H01L29/66

Abstract: A semiconductor device in which an electrification phenomenon that leads to characteristic fluctuations, element deterioration, abnormality in shape, or dielectric breakdown is inhibited is provided.
The semiconductor device includes a first region and a second region over the same plane. The first region includes a transistor. The second region includes a dummy transistor. The transistor includes a first wiring layer, a semiconductor layer including an oxide and provided above the first wiring layer, a second wiring layer provided above the semiconductor layer, and a third wiring layer provided above the second wiring layer. The dummy transistor has the same area as one or more selected from the first wiring layer, the second wiring layer, the semiconductor layer, and the third wiring layer.

公开(公告)号：US12283954B2

公开(公告)日：2025-04-22

申请号：US18240389

申请日：2023-08-31

Applicant: Semiconductor Energy Laboratory Co., Ltd.

Inventor： Masashi Fujita ,  Yutaka Shionoiri ,  Kiyoshi Kato ,  Hidetomo Kobayashi

IPC: H03K19/173 ,  H03K19/17728 ,  H03K19/17758 ,  H03K19/17772

Abstract: An object is to provide a semiconductor device that can maintain the connection relation between logic circuit units or the circuit configuration of each of the logic circuit units even after supply of power supply voltage is stopped. Another object is to provide a semiconductor device in which the connection relation between logic circuit units or the circuit configuration of each of the logic circuit units can be changed at high speed. In a reconfigurable circuit, an oxide semiconductor is used for a semiconductor element that stores data on the circuit configuration, connection relation, or the like. Specifically, the oxide semiconductor is used for a channel formation region of the semiconductor element.