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公开(公告)号:US20240171520A1
公开(公告)日:2024-05-23
申请号:US17990768
申请日:2022-11-21
发明人: Yamin Friedman , Idan Burstein , Ariel Shahar , Roee Moyal , Gil Kremer
IPC分类号: H04L47/62 , H04L47/6275 , H04L49/90
CPC分类号: H04L47/624 , H04L47/6275 , H04L49/9036
摘要: An apparatus includes a memory and control circuitry. The control circuitry is configured to receive packets, which are en-route to undergo transport-layer processing in a network device in accordance with a transport protocol that requires arrival of the packets in a sequential order, to detect that one or more of the packets deviate from the sequential order, to buffer the one or more deviating packets in the memory, and, using the memory, to reorder the packets and provide the packets in the sequential order to the network device.
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182.
公开(公告)号:US20240171507A1
公开(公告)日:2024-05-23
申请号:US18429840
申请日:2024-02-01
IPC分类号: H04L45/28 , G06F9/50 , G06F9/54 , G06F12/0862 , G06F12/1036 , G06F12/1045 , G06F13/14 , G06F13/16 , G06F13/28 , G06F13/38 , G06F13/40 , G06F13/42 , G06F15/173 , H04L1/00 , H04L43/0876 , H04L43/10 , H04L45/00 , H04L45/02 , H04L45/021 , H04L45/028 , H04L45/12 , H04L45/122 , H04L45/125 , H04L45/16 , H04L45/24 , H04L45/42 , H04L45/745 , H04L45/7453 , H04L47/10 , H04L47/11 , H04L47/12 , H04L47/122 , H04L47/20 , H04L47/22 , H04L47/24 , H04L47/2441 , H04L47/2466 , H04L47/2483 , H04L47/30 , H04L47/32 , H04L47/34 , H04L47/52 , H04L47/62 , H04L47/625 , H04L47/6275 , H04L47/629 , H04L47/76 , H04L47/762 , H04L47/78 , H04L47/80 , H04L49/00 , H04L49/101 , H04L49/15 , H04L49/90 , H04L49/9005 , H04L49/9047 , H04L67/1097 , H04L69/22 , H04L69/28 , H04L69/40
CPC分类号: H04L45/28 , G06F9/505 , G06F9/546 , G06F12/0862 , G06F12/1036 , G06F12/1063 , G06F13/14 , G06F13/16 , G06F13/1642 , G06F13/1673 , G06F13/1689 , G06F13/28 , G06F13/385 , G06F13/4022 , G06F13/4068 , G06F13/4221 , G06F15/17331 , H04L1/0083 , H04L43/0876 , H04L43/10 , H04L45/02 , H04L45/021 , H04L45/028 , H04L45/122 , H04L45/123 , H04L45/125 , H04L45/16 , H04L45/20 , H04L45/22 , H04L45/24 , H04L45/38 , H04L45/42 , H04L45/46 , H04L45/566 , H04L45/70 , H04L45/745 , H04L45/7453 , H04L47/11 , H04L47/12 , H04L47/122 , H04L47/18 , H04L47/20 , H04L47/22 , H04L47/24 , H04L47/2441 , H04L47/2466 , H04L47/2483 , H04L47/30 , H04L47/32 , H04L47/323 , H04L47/34 , H04L47/39 , H04L47/52 , H04L47/621 , H04L47/6235 , H04L47/626 , H04L47/6275 , H04L47/629 , H04L47/76 , H04L47/762 , H04L47/781 , H04L47/80 , H04L49/101 , H04L49/15 , H04L49/30 , H04L49/3009 , H04L49/3018 , H04L49/3027 , H04L49/90 , H04L49/9005 , H04L49/9021 , H04L49/9036 , H04L49/9047 , H04L67/1097 , H04L69/22 , H04L69/40 , G06F2212/50 , G06F2213/0026 , G06F2213/3808 , H04L69/28
摘要: A network interface controller (NIC) capable of efficiently utilizing an output buffer is provided. The NIC can be equipped with an output buffer, a host interface, an injector logic block, and an allocation logic block. The output buffer can include a plurality of cells, each of which can be a unit of storage in the output buffer. If the host interface receives a command from a host device, the injector logic block can generate a packet based on the command. The allocation logic block can then determine whether the packet is a multi-cell packet. If the packet is a multi-cell packet, the allocation logic block can determine a virtual index for the packet. The allocation logic block can then store, in an entry in a data structure, the virtual index, and a set of physical indices of cells storing the packet.
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公开(公告)号:US11991092B2
公开(公告)日:2024-05-21
申请号:US17855826
申请日:2022-07-01
申请人: Tsinghua University
发明人: Fengyuan Ren , Yingchen Fan , Kun Qian , Qingkai Meng , Yiran Zhang
IPC分类号: H04L47/80 , H04L47/62 , H04L47/762 , H04L47/78
CPC分类号: H04L47/808 , H04L47/6215 , H04L47/762 , H04L47/781 , H04L47/801
摘要: A cloud data center tenant-level outbound rate limiting method includes: starting a timer, receiving and generating statistics of outbound packets of tenants in a current period, obtaining local traffic rate information of the tenants based on all the outbound packets of the tenants in the current period, and generating local bandwidth demand frames of the tenants based on the local traffic rate information of the tenants; when a timing of the timer reaches the end of the current period, sending the local bandwidth demand frames of the tenants to a switch; receiving a global bandwidth demand frame sent by the switch, and computing bandwidth budgets of the tenants based on the local traffic rate information of the tenants and the global bandwidth demand frames of the tenants; modifying rate limiting parameters, and limiting the rate of the outbound packets of the tenants in a next period.
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公开(公告)号:US11985078B2
公开(公告)日:2024-05-14
申请号:US17897557
申请日:2022-08-29
发明人: Tony Brewer , Kirk D. Pospesel , Michael Grassi
IPC分类号: H04L49/25 , H04L47/36 , H04L47/62 , H04L49/253 , H04L49/35
CPC分类号: H04L49/254 , H04L47/36 , H04L47/6225 , H04L49/35
摘要: Devices and techniques for packet arbitration for buffered packets in a network device are described herein. A packet can be received at an input of the network device. The packet can be placed in a buffer for the input and a characteristic of the packet can be obtained. A record for the packet, that includes the characteristic, is written into a data structure that is independent of the buffer. Arbitration, based on the characteristic of the packet in the record, can then be performed among multiple packets to select a next packet from the buffer for delivery to an output.
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公开(公告)号:US20240129256A1
公开(公告)日:2024-04-18
申请号:US18046693
申请日:2022-10-14
申请人: Cockroach Labs, Inc.
发明人: Sumeer Kumar Bhola
IPC分类号: H04L47/62 , H04L43/106
CPC分类号: H04L47/6245 , H04L43/106 , H04L47/6225
摘要: Methods and systems for managing requests in a distributed computing system are provided. A plurality of requests are received by one or more of the plurality of computing nodes in the distributed computing system. A respective timestamp is assigned to each of the plurality of requests. A subset of the plurality of requests are assigned to an epoch, wherein the epoch corresponds to an interval of time comprising the respective timestamp of each request of the subset of the plurality of requests. A present time is compared to a closing time of the epoch. Based on the comparison, the subset of the plurality of requests are queued for execution in a waiting data structure by last-in, first-out (LIFO) ordering based on the respective timestamp of each request of the subset.
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公开(公告)号:US20240129251A1
公开(公告)日:2024-04-18
申请号:US18390299
申请日:2023-12-20
发明人: Can HU , Yujie ZHANG , Lei WANG
摘要: Embodiments of this application provide a data processing method and apparatus, a computer device, and a readable storage medium. The method may be applied to an in-vehicle central control device, and includes polling data packets in the database, to obtain a to-be-added data packet set, and adding the to-be-added data packet set to the cache queue; polling the cache queue, to obtain a to-be-uploaded data packet set, and uploading the to-be-uploaded data packet set through a wireless communication connection of the in-vehicle central control device; storing a first data packet in the database in response to the first data packet in the to-be-uploaded data packet set meeting a continuous uploading failure condition; and deleting a second data packet from the database, in response to the second data packet in the to-be-uploaded data packet set being successfully uploaded to a server.
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187.
公开(公告)号:US20240121181A1
公开(公告)日:2024-04-11
申请号:US18544914
申请日:2023-12-19
IPC分类号: H04L45/28 , G06F9/50 , G06F9/54 , G06F12/0862 , G06F12/1036 , G06F12/1045 , G06F13/14 , G06F13/16 , G06F13/38 , G06F13/40 , G06F13/42 , G06F15/173 , H04L1/00 , H04L43/0876 , H04L43/10 , H04L45/00 , H04L45/02 , H04L45/021 , H04L45/028 , H04L45/12 , H04L45/122 , H04L45/125 , H04L45/16 , H04L45/24 , H04L45/42 , H04L45/745 , H04L45/7453 , H04L47/10 , H04L47/11 , H04L47/12 , H04L47/122 , H04L47/20 , H04L47/22 , H04L47/24 , H04L47/2441 , H04L47/2466 , H04L47/2483 , H04L47/30 , H04L47/32 , H04L47/34 , H04L47/52 , H04L47/62 , H04L47/625 , H04L47/6275 , H04L47/629 , H04L47/76 , H04L47/762 , H04L47/78 , H04L47/80 , H04L49/00 , H04L49/101 , H04L49/15 , H04L49/90 , H04L49/9005 , H04L49/9047 , H04L67/1097 , H04L69/22 , H04L69/40
CPC分类号: H04L45/28 , G06F9/505 , G06F9/546 , G06F12/0862 , G06F12/1036 , G06F12/1063 , G06F13/14 , G06F13/16 , G06F13/1642 , G06F13/1673 , G06F13/1689 , G06F13/385 , G06F13/4022 , G06F13/4068 , G06F13/4221 , G06F15/17331 , H04L1/0083 , H04L43/0876 , H04L43/10 , H04L45/02 , H04L45/021 , H04L45/028 , H04L45/122 , H04L45/123 , H04L45/125 , H04L45/16 , H04L45/20 , H04L45/22 , H04L45/24 , H04L45/38 , H04L45/42 , H04L45/46 , H04L45/566 , H04L45/70 , H04L45/745 , H04L45/7453 , H04L47/11 , H04L47/12 , H04L47/122 , H04L47/18 , H04L47/20 , H04L47/22 , H04L47/24 , H04L47/2441 , H04L47/2466 , H04L47/2483 , H04L47/30 , H04L47/32 , H04L47/323 , H04L47/34 , H04L47/39 , H04L47/52 , H04L47/621 , H04L47/6235 , H04L47/626 , H04L47/6275 , H04L47/629 , H04L47/76 , H04L47/762 , H04L47/781 , H04L47/80 , H04L49/101 , H04L49/15 , H04L49/30 , H04L49/3009 , H04L49/3018 , H04L49/3027 , H04L49/90 , H04L49/9005 , H04L49/9021 , H04L49/9036 , H04L49/9047 , H04L67/1097 , H04L69/22 , H04L69/40 , G06F2212/50 , G06F2213/0026 , G06F2213/3808 , H04L69/28
摘要: A network interface controller (NIC) capable of performing message passing interface (MPI) list matching is provided. The NIC can include a host interface, a network interface, and a hardware list-processing engine (LPE). The host interface can couple the NIC to a host device. The network interface can couple the NIC to a network. During operation, the LPE can receive a match request and perform MPI list matching based on the received match request.
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公开(公告)号:US20240113986A1
公开(公告)日:2024-04-04
申请号:US17937495
申请日:2022-10-03
发明人: Narasimha Rao KORAMUTLA , Arun GOTHEKAR , Susheel Kumar Yadav YADAGIRI , Akshat GUPTA , Srinivas MARAKALA , Naveen Kumar NARALA , Radvajesh MUNIBYRAIAH
IPC分类号: H04L47/62 , H04L47/2416 , H04L47/28 , H04L65/65 , H04L69/22
CPC分类号: H04L47/624 , H04L47/2416 , H04L47/28 , H04L65/65 , H04L69/22
摘要: Various embodiments include an automobile network device that includes a descriptor sorting engine (DSE). The DSE may include a direct memory access (DMA) controller, a memory organized by channel clusters that each include a plurality of first-in first-out (FIFO) memories, a timer, and a time stamp (TS) sorting logic component. The DMA controller may be configured to pull timestamp-pointer pairs from packet descriptors stored in an unsorted descriptor ring memory, store the timestamp-pointer pairs in the FIFO memories, trigger the TS sorting logic component to reorder the timestamp-pointer pairs in the FIFO memories so that they are sorted in ascending order, use the sorted timestamp-pointer pairs in the FIFO memories to read the packet descriptors stored in an unsorted descriptor ring memory, and store the packet descriptors in a sorted descriptor ring memory.
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189.
公开(公告)号:US20240113961A1
公开(公告)日:2024-04-04
申请号:US18539907
申请日:2023-12-14
发明人: Hess M. Hodge , Igor Gorodetsky
IPC分类号: H04L45/28 , G06F9/50 , G06F9/54 , G06F12/0862 , G06F12/1036 , G06F12/1045 , G06F13/14 , G06F13/16 , G06F13/38 , G06F13/40 , G06F13/42 , G06F15/173 , H04L43/0876 , H04L43/10 , H04L45/00 , H04L45/021 , H04L45/028 , H04L45/12 , H04L45/122 , H04L45/125 , H04L45/16 , H04L45/24 , H04L45/42 , H04L45/745 , H04L45/7453 , H04L47/10 , H04L47/11 , H04L47/12 , H04L47/122 , H04L47/20 , H04L47/22 , H04L47/24 , H04L47/2441 , H04L47/2466 , H04L47/2483 , H04L47/30 , H04L47/32 , H04L47/52 , H04L47/62 , H04L47/625 , H04L47/6275 , H04L47/629 , H04L47/76 , H04L47/762 , H04L47/80 , H04L49/00 , H04L49/101 , H04L49/90 , H04L49/9005 , H04L49/9047 , H04L67/1097 , H04L69/22 , H04L69/40
CPC分类号: H04L45/28 , G06F9/505 , G06F9/546 , G06F12/0862 , G06F12/1036 , G06F12/1063 , G06F13/14 , G06F13/16 , G06F13/1642 , G06F13/1673 , G06F13/1689 , G06F13/385 , G06F13/4022 , G06F13/4068 , G06F13/4221 , G06F15/17331 , H04L43/0876 , H04L43/10 , H04L45/021 , H04L45/028 , H04L45/122 , H04L45/123 , H04L45/125 , H04L45/16 , H04L45/20 , H04L45/22 , H04L45/24 , H04L45/38 , H04L45/42 , H04L45/566 , H04L45/745 , H04L45/7453 , H04L47/11 , H04L47/12 , H04L47/122 , H04L47/18 , H04L47/20 , H04L47/22 , H04L47/24 , H04L47/2441 , H04L47/2466 , H04L47/2483 , H04L47/30 , H04L47/32 , H04L47/323 , H04L47/39 , H04L47/52 , H04L47/621 , H04L47/6235 , H04L47/626 , H04L47/6275 , H04L47/629 , H04L47/76 , H04L47/762 , H04L47/80 , H04L49/101 , H04L49/30 , H04L49/3018 , H04L49/3027 , H04L49/90 , H04L49/9005 , H04L49/9021 , H04L49/9036 , H04L49/9047 , H04L67/1097 , H04L69/22 , H04L69/40 , G06F2212/50 , G06F2213/0026 , G06F2213/3808 , H04L69/28
摘要: A network interface controller (NIC) capable of on-demand paging is provided. The NIC can be equipped with a host interface, an operation logic block, and an address logic block. The host interface can couple the NIC to a host device. The operation logic block can obtain from a remote device, a request for an operation based on a virtual memory address. The address logic block can obtain, from the operation logic block, a request for an address translation for the virtual memory address and issue an address translation request to the host device via the host interface. If the address translation is unsuccessful, the address logic block can send a page request to a processor of the host device via the host interface. The address logic block can then determine that a page has been allocated in response to the page request and reissue the address translation request.
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公开(公告)号:US11943149B2
公开(公告)日:2024-03-26
申请号:US16949148
申请日:2020-10-15
IPC分类号: H04L47/62 , H04L12/44 , H04L45/00 , H04L45/122 , H04L45/48 , H04L47/6275 , H04L49/253
CPC分类号: H04L47/623 , H04L12/44 , H04L45/122 , H04L45/20 , H04L45/48 , H04L47/6275 , H04L49/254
摘要: Candidates for selection in a weighted arbitration system are assigned priority weights and random weights. The winning candidate is determined using a tree of selectors such as a comparators. At each stage of the tree, the candidate having the greatest priority weight is selected to pass to the next stage. If multiple candidates are tied for the greatest priority weight, the candidate having the greatest random weight is selected to pass to the next stage.
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